A
B
C
D
E
MSI
MS-7104 Ver:20A
4 4
3 3
2 2
CPU:
Intel Northwood/ Pr escott
(FMB1.5)
System Chipset:
P4M800CE
VIA VT8237 R Plus
On Board Chipset:
LPC Super I/O -- W83627THF Ver:E
LAN -- PHY RTL8201CL
AC'97 Codec --ALC655
BIOS --LPC FLASH ROM
CLOCK Chip :
CLOCK Generator -- I CS9 50917AF
Main Memory:
DDR * 2 (Max 2GB)
Expansion Slot s:
PCI2.3 SLOT * 3
PWM:
Richtek RT8800BPS
CHIPSET P4M800 + VT8237R_Plus
TITLE
Cover Sheet
Block Diagram
PWR map /CLOCK map
GPIO/ MEMORY/PCI/HW STRPPING
CLOCK S YNTHESIZER
PROCESSOR (SOCKET478)
NORTH BRIDGE PM800CE & VGA Connector
DIMM1 / DIMM2
DDR TERMINATIONS
AGP SLOT
SOUTH BRIDGE VT8237 R_Plus
83627THF-E / FAN / BIOS
KB / MS / LPT / COM
PCI SLOTS
IDE
USB CONNECTORS
LAN Realtek 8201CL
AC97 Audio CODEC / Connector
MS7 ACPI controller
VRM 9.0 Richtek RT8800BPS
Front Panel / ATX
PCB Components
Jumper Setting / Manual Part
SHEET
1
2
3
4
5
6,7
8,9,10,11
12
13
14
15,16,17
18
19
20
21
22
23
24
25
26
27
28
29
1 1
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Docume nt Number Re v
A
B
C
D
Date: Sheet
COVER SHEET
MS-7104
E
20A
of
12 9 Friday , No ve mb er 0 4, 2005
Block Diagram
1
VRM 10.1
Intersil
FMB1.5
P4 Socket 478 Processor
3-Phase PWM
FSB
AGP 1.5V
Connector
2X/4X/8X
P4M800CE
64bit DDR
2 DDR
DIMM
Modules
V-Link
IDE Primary
IDE Secondary
A A
USB Port 0
UltraDMA 33/66/100
VT8237 R+
MII
USB Port 1
USB Port 2
USB
LPC Bus
PCI CNTRL
PCI ADDR/DATA
LAN
REALTEK
RTL8201CL
PCI Slot 3
PCI Slot 2
PCI Slot 1
USB Port 3
USB Port 4
LPC SIO
USB Port 5
Winbond
83627THF
USB Port 6
Ver:E
USB Port 7
AC'97 Codec
AC'97 Link
SATA prot1 and
port2
KEYBOARD
MOUSE
FLASH
ROM
1
FDD
Par allel
Serial
X2
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Docum ent Number Re v
Dat e: Sheet
Block Di agram
MS-7104
22 9 Friday , N ovem b er 04, 2005
of
20A
8
7
6
5
4
3
2
1
P4M800CE PLATFORM CLOC K GENERATOR MAP
3.3V 5V 5VSB 12V
P4M800CE PLATFORM POWER DELIVERY MAP
PROCESSOR VCCP
D D
Intel mPAG478B Proc es so r
CPU HOST
CLK
DCLKO
NB
P4M800CE
AGP CLK
DCLKI
CLOCK GENERATOR
MEM CLK
0~5/CLK#0~5
C C
14.318MHZ
2 DDR DIMM
Modules
VRM
1.2V VREG
1.5VSB
VREG
1.5V VREG
3VSB VREG
DDR 2.5V
VREG
1.5V VREG
VTT 1.25V
VREG
PROCESSOR 1.2V
AGP SLO T 1.5V
NORTH BRIDGE +1.5VSB
NORTH BRIDGE VCCP
NORTH BRIDGE VCC_AGP
NORTH BRIDGE +1.5V
NORTH BRIDGE SYSEM MEMORY
VCC_DDR
DDR DIMM1 / DIMM2 / DIMM3 2.5V
DDR VTT 1.25V
APIC
48MHZ
VT8237 R+
PCI CLK
2.5V VREG
2.5VSB
VREG
SOUTH BRIDGE +2.5V
SOUTH BRIDGE VCC3
SOUTH BRIDGE RESUME 2.5V_SB
SOUTH BRIDGE RESUME VCC3_SB
SOUTH BRIDGE RTC 3.3V
PCI CLK 0~3
PCI Slot 1~3
LAN-PHY VCC3_SB
B B
PCI CLK
48MHZ
LPC SIO
Winbond
83627THF
PCI 1394 VCC3
FWH 3.3V
Ver:E
LPC SUPE R I/O 3.3V
AC97
AGP CLK
A A
8
7
AGP SLOT
6
AC97 VDD5
VREG
Title
Size Docum ent Nu m b er Rev
5
4
3
Date: Sheet
LPC SUPER I/O VCC5
CK-409 3.3V
CK-409 AND BUFFER +2.5V
AC97 VDD5
MSI
MICRO-STAR INt'L CO., LTD.
PWR AND CLOCK MAP
2
MS-7 104
20A
of
32 9 Frida y, November 04, 2005
1
1
VT8237R_Plus GPIO Function Define
PIN NAME Function define
GPO0
GPO1(VDDS)
GPO2/SUSA#
(VDDS)
GPO3/SUSST#(VDDS)
GPO4/SUSCLK(VDDS)
GPO5/CPUSTP#
GPO6/PCISTP#
GPO7/GNT5
GPO8/GPI8/VGATE
*
GPO9/GPI9/UDPWREN
*
GPO10/GPI10/PICD0
*
GPO11/GPI11/PICD1
*
GPO12/GPI12/INTE#
*
GPO13/GPI13/INTF#
*
GPO14/GPI14/INTG#
*
GPO15/GPI15/INTH#
*
GPO20/GPI20
/ACSDIN2/PCS0#
GPO21/GPI21/ACSDIN3
/PCS1#/SLPBTN#
A A
GPO22/GPI22/GHI#
GPO23/GPI23/DPSLP
/GPIOAGPO24/GPI24
GPO25/GPI25
GPO26/GPI26/SMBDT2
(VDDS)
GPO27/GPI27/SMBCK2
(VDDS)
GPO28/GPI28/VIDSEL
GPO29/GPI29/VRDSLP
GPO30/GPI30
GPO31/GPI31
/GPIOB
/GPIOC
/GPIOD
Default
Function
GPO0
GPO1 GPO1
SUSA#
SUSST#
SUSCLK
CPUSTP#
PCISTP#
GPO7
GPI8
UDPWREN
GPI10
GPI11
GPI12
GPI13
GPI14
GPI15
GPI20/ACSDIN2
GPI21/ACSDIN3
GPI22
GPI23
GPI24
GPI25
SMBDT2
SMBCK2
GPO28
/VIDSEL
GPO29
/VRDSLP
GPI30
GPI31
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3_SB
SUSST#
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
NC
1K ohm Pull up to VCC3
1K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
10K ohm Pull down
10K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull up to VCC3
BSEL1
4.7K ohm Pull down
2.7K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
SATA_LED
4.7K ohm Pull up to VCC3
BSEL0
4.7K ohm Pull down
4.7K ohm Pull up to VCC3_SB
PIN NAME Function define
GPI0
(VBAT)
GPI1
(VSUS3)
GPI2/EXTSMI#
(VSUS3)
GPI3/RING#
(VSUS3)
GPI4/LID#
(VSUS3)
GPI5/BATLOW# (VDDS)
GPI6/AGPBZ
GPI7/REQ5
GPI8/VGATE
*
GPI9/UDPWREN
*
GPI10/PICD0
*
GPI11/PICD1
*
GPI12/INTE#
*
GPI13/INTF#
*
GPI14/INTG#
*
GPI15/INTH# GPI15
*
GPI16/INTRUDER#
(VBAT)
GPI17/CPUMISS
GPI18/AOLGP1/THRM#
GPI19/APICCLK
PCI Config.
DEVICE
PCI Slot 1
PCI Slot 2
PCI Slot 3
Default
Function
GPI0
GPI1
EXTSMI#
RING#
LID#
BATLOW#
AGPBZ
GPI7
GPI8
UDPWREN
GPI10
GPI11
GPI12
GPI13
GPI14
INTRUDER#
CPUMISS
AOLGP1
APICCLK
1M ohm Pull up to VBAT
ATADET0=>Detect IDE1 ATA100/66
10K ohm Pull up to VCC3_SB
10K ohm Pull up to VCC3_SB
RING#
ATADET2=>Detect IDE2 ATA100/66
10K ohm Pull up to VCC3_SB
AGPBZ#
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
10K ohm Pull down
1K ohm Pull up to VCC3
1K ohm Pull up to VCC3
INTE# 2.7K ohm Pull up to VCC5
2.7K ohm Pull up to VCC5
2.7K ohm Pull up to VCC5
2.7K ohm Pull up to VCC5 INTH#
1M ohm Pull up to VBAT
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3
THRM#
APICCLK
INTA#
INTB#
INTC#
PREQ#0
PGNT#0
INTD#
INTB#
INTC#
INTD#
PREQ#1
PGNT#1
INTA#
INTC#
INTD#
PREQ#2
INTA# PGNT#2
INTB#
IDSEL
AD16
AD17
AD18
CLOCK REQ#/GNT#
PCICLK1
PCICLK2
PCICLK3
USB
Rear
Front
Port DATA +/-
USB1
LAN_USB1
JUSB1
JUSB2
USB1ÂUSB1+
USB0ÂUSB0+
USB2ÂUSB2+
USB3ÂUSB3+
USB4ÂUSB4+
USB5ÂUSB5+
USB6ÂUSB6+
USB7ÂUSB7+
PCI RES E T DEVICE
Signals Target
PCIRST# AGP , SB
PCIRST#1
NB , Super I/O , FWH
PCI slot 1-3 PCIRST#2
HD_RST#
Primary, Scondary IDE
DDR DIMM Config.
DEVICE
DIMM 1
DIMM 2
1010000B
1010001B
CLK GEN PIN OUT MCP1 INT Pin
14 (PCICLK3)
15 (PCICLK4)
17 (PCICLK5)
CLOCK ADDRESS
MDCLK0/MDCLK#0
MDCLK2/MDCLK#2
MDCLK4/MDCLK#4
MDCLK1/MDCLK#1
MDCLK3/MDCLK#3
MDCLK5/MDCLK#5
OC#
USB_OC#1
( OC#0~3 )
USB_OC#5
( OC#4~7 )
MSI
Title
Size Document Number Re v
1
Date: Sheet
MICRO -S T A R I Nt ' L C O., LTD.
General Purpose Spec
MS-7104
of
42 9 Friday, Nov ember 04, 2005
20A
5
4
3
2
1
Pull-Down Capacitors
NBCLK66
AGPCLK
VLCLK66
SIOPCLK
SBPCLK
PCICLK1
PCICLK2
PCICLK3
USBCLK
SB14MHZ
GUICLK
APICCLK
DCLK_FB
used on ly for EMI issue
Trace less 0.2"
X_C10P25V2NPOL C208
X_C10P25V2NPOL C210
X_C22P50V2NPOL C214
X_C10P25V2NPOL C215
CN10 X_8P4C-10P3
7
8
5
6
3
4
1
2
X_C10P25V2NPOL C212
X_C10P25V2NPOL C216
X_C10P25V2NPOL C199
X_C10P25V2NPOL C211
C22P50V2NPOL C195
VCC3V
VCC2.5A
SMBCLK1
SMBDATA1
VCC2.5B
DCLK_OUT
VCC3V
CB30
0.1u_0402
CB21
0.1u_0402
CB31
0.1u_0402
CB32
0.1u_0402
CB29
0.1u_0402
CB33
X_0.1u_0402
CB28
0.1u_0402
CB26
0.1u_0402
CB23
0.1u_0402
51
54
50
47
5
9
16
13
22
19
55
2
23
24
27
28
34
33
40
39
45
U10
ICS950917
CPU_VDD3.3
CPU_GND3.3
CPU_VDD2.5
CPU_GND2.5
3V66_VDD
3V66_GND
PCI_VDD
PCI_GND
48_VDD
48_GND
REF_VDD
REF_GND
CORE_VDD
CORE_GND
SCLK
SDATA
DDR_VDD1
DDR_GND1
DDR_VDD2
DDR_GND2
BUF_IN
CPUCLK
CPUCLK#
CPUCLKCS
CPUCLKCS#
AGP0
*SEL_CK408/K7/AGP1
AGP2
~*FS1/PCI_F
PCI1
MULTSEL/PCI2
PCI3
PCI4
PCI5
TURBO#
*FS3/48MHz
*FS2/24_48MHz
*FS0/REF0
VTT_GD#/**REF1
IREF
*PD#/RESET#
DDR0
DDR#0
DDR1
DDR#1
DDR2
DDR#2
DDR3
DDR#3
DDR4
DDR#4
DDR5
DDR#5
FB_OUT
CLK_CPU CPUCLK
53
CLK_CPU#
52
CLK_NB
48
CLK_NB#
49
CLK66_1
6
SEL_CK408
7
CLK66_2
8
FS1
10
CLK33_1
11
MULT
12
CLK33_3 PCICLK1
14
CLK33_4
15
CLK33_5
17
TURBO#
18
FS3
20
FS2
21
FS0
1
VTTGD#
56
X1
3
X1
X2
4
X2
IREF
25
PD#
26
44
43
42
41
38
37
36
35
32
31
30
29
46
FB_O
R150 27D4R3F
R144 27D4R3F
R145 27D4R3F
R151 27D4R3F
R191 33/0402
R181 33/0402
R189 33/0402
R182 33/0402
RN48
7 8
5 6
3 4
1 2
33
R186 10K_0402
R185 47R2
R187 33/0402
R197 33/0402
R194 22R2
R164 22R2
R179 22R2
X1 14M-32PF-HC49S-D
R177 475R3F
R178 X_33/0402
DCLKA0
DCLKA#0
DCLKA1
DCLKA#1
DCLKA2
DCLKA#2
DCLKA3
DCLKA#3
DCLKA4
DCLKA#4
DCLKA5
DCLKA#5
R153 33/0402
C56P50V3NPO C202
C56P50V3NPO C200
DCLK_FB
CPUCLK#
NBHCLK
NBHCLK#
NBCLK66
VLCLK66
AGPCLK
SIOPCLK
FWH_CLK
SBPCLK
PCICLK2
PCICLK3
VCC3V
USBCLK
SIO_48M
SB14MHZ
AC97XIN
GUICLK
APICCLK
FP_RST#
DCLK_FB 9
CPUCLK 6
CPUCLK# 6
NBHCLK 8
NBHCLK# 8
NBCLK66 10
VLCLK66 17
AGPCLK 14
SIOPCLK 18
FWH_CLK 18
SBPCLK 17
PCICLK1 20
PCICLK2 20
PCICLK3 20
USBCLK 15
SIO_48M 18
SB14MHZ 16
AC97XIN 24
GUICLK 11
APICCLK 17
VT8373b02_ECN
FP_RST# 25,27
DCLKA0
DCLKA#0
DCLKA1
DCLKA#1
DCLKA2
DCLKA#2
DCLKA3
DCLKA#3
DCLKA4
DCLKA#4
DCLKA5
DCLKA#5
RN45 8P4R-10
1 2
3 4
5 6
7 8
RN46 8P4R-10
1 2
3 4
5 6
7 8
RN44 8P4R-10
1 2
3 4
5 6
7 8
Pull Hi 4.7K to
3.3V in Page 23
MDCLK0
MDCLK#0
MDCLK1
MDCLK#1
MDCLK2
MDCLK#2
MDCLK3
MDCLK#3
MDCLK4
MDCLK#4
MDCLK5
MDCLK#5
MDCLK0 12
MDCLK#0 12
MDCLK1 12
MDCLK#1 12
MDCLK2 12
MDCLK#2 12
MDCLK3 12
MDCLK#3 12
MDCLK4 12
MDCLK#4 12
MDCLK5 12
MDCLK#5 12
filte ring from 10K~1M
VCC3
VCC2_5
D D
VCORE
C C
VCC2_5
B B
CP11 X_COPPER
FB16 X_80-700mA
CB27
X_0.1u_0402
FB14 X_80-700mA
CP9 X_COPPER
CB18 R190 33/0402
X_0.1u_0402
VCC3
R138
220R2
R148
1KR2
R141 10K_0402
Q16
2N3904S
FB15 X_80-700mA
CP10 X_COPPER
CB24
X_0.1u_0402
CB22
X_0.1u_0402
CB19
X_0.1u_0402
VTTGD#
SMBCLK1 12,16,25
SMBDATA1 12,16,25
CB25
X_0.1u_0402
DCLK_OUT 9
Shut Source Termination Resistors
CPUCLK
CPUCLK#
Trace less 0.2"
A A
* : Internal pull-up resistor
** : Internal pull-down resistor
~ : Have 2X drive strength
R154 49.9RST
R147 49.9RST
49.9ohm for 50ohm M/B impeda nce
5
CLOCK STRAPPING RESISTORS
VCC3V
FS3
FS2
FS1
FS0
R192 X_10K_0402
R188 X_10K_0402
R183 10K_0402
R196 10K_0402
FS3 FS2 FS1 FS0
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
4
C22P50V2NPOL C209
FSB (MHz)
100 MHz
133 MHz
200 MHz
166 MHz
R198
1K
VCC3V
R193
1K
BSEL1 6
BSEL0 6
VCC3V
MULT
MULT
1
SEL_CK408
PIN7 CPU output type
0 K7
1 CK408 / AGP
3
R184 10K_0402
Rr
22105.00mA 1.0V
475
2.32mA 0.7V
Vdd/3Rr
R180 X_10K_0402
4*Iref
6*Iref
Voh
Ioh Iref
Ioh*Rt
VCC3V
2
MSI
Title
Size Doc um e nt Number R e v
Date: Sheet of
Micro-Star
Clock Generator
MS-7104
1
52 9 Friday, N ove m b er 04 , 2005
20A
5
4
3
2
1
VIDPW R GD D C Specif ication s
VIL
CPU SIGNAL BLOCK
CPU1A
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
SLP#
A22
RESERVED0
A7
RESERVED1
RESERVED2
RESERVED3
RESERVED4
AD1
BOOTSELECT
OPTIMIZED/COMPAT#
AD6
BSEL0
AD5
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
Y21
D60#
Y24
D59#
Y23
D58#
W25
D57#
Y26
D56#
W26
D55#
V24
D54#
HA#[3..31]
HA#25
HA#27
HA#30
HA#29
HA#31
HA#28
AB1
A35#
A34#Y1A33#W2A32#V3A31#U4A30#T5A29#W1A28#R6A27#V2A26#T4A25#U3A24#P6A23#U1A22#T2A21#R3A20#P4A19#P3A18#R2A17#T1A16#N5A15#N4A14#N2A13#M1A12#N1A11#M4A10#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
T23
T22
T25
V22
V25
U21
U23
HD#50
HD#52
HD#53
HD#51
T26
U24
U26
R24
HD#43
HD#45
HD#47
HD#44
HD#49
HD#48
HD#46
HA#22
HA#26
D43#
D42#
R25
HD#41
HD#42
HA#20
HA#23
HA#24
HA#21
D41#
D40#
D39#
D38#
D37#
D36#
P24
R21
N25
N26
N23
M26
HD#40
HD#38
HD#39
HD#36
HD#35
HD#37
HA#4
HA#9
HA#5
HA#8
HA#6
HA#7
A9#L2A8#M6A7#L3A6#K1A5#L6A4#K4A3#
D24#
D23#
D22#
D21#
D20#
F26
F24
F23
E25
D26
HD#23
HD#22
HD#21
HD#20
HD#19
HA#3
A5
K2
D19#
G23
HD#18
A4
AE25
DBR#
VCC_SENSE
D18#
D17#
D16#
D15#
D14#
D13#
J21
E24
H22
D25
D23
C26
HD#12
HD#16
HD#15
HD#17
HD#14
HD#13
HA#17
HA#18
HA#19
D35#
D34#
D33#
P21
N22
M24
M23
HD#33
HD#32
HD#34
HA#11
HA#16
HA#12
HA#10
HA#14
HA#15
HA#13
M3
D32#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
J24
L22
K23
H25
HD#31
HD#30
L21
H24
G26
M21
HD#27
HD#26
HD#25
HD#29
HD#28
HD#24
HA#[3..31] 8
D D
HDBI#0
HDBI#0 8
HDBI#1
HDBI#1 8
HDBI#2
HDBI#2 8
HDBI#3
HDBI#3 8
FERR# 17
STPCLK# 17
CPUINIT# 17
HDBSY# 8
HDRDY# 8
HTRDY# 8
HADS# 8
BSEL0 5
BSEL1 5
HD#[0..63]
HLOCK# 8
HBNR# 8
HITM# 8
HBPRI# 8
HDEFER# 8
CPU_TMPA 18
VTIN_GND 18
THERMTRIP# 27
IGNNE# 17
A20M# 17
C C
CPU_TMPA
C73
X_220p_X7R
B B
PWRGD_CPU 25
CPURST# 8
A A
HD#[0..63] 8
IERR#
FERR#
STPCLK#
CPUINIT#
HDBSY#
HDRDY#
HTRDY#
HADS#
HLOCK#
HBNR#
HIT#
HIT# 8
HITM#
HBPRI#
HDEFER#
ITP_TDI
ITP_TRST#
ITP_TCK
CPU_TMPA
VTIN_GND
THERMTRIP#
PROCHOT#
IGNNE#
SMI#
SMI# 17
A20M#
SLP#
SLP# 17
Near CPU
C28 X_0.1u
BOOTSELECT
R25 60.4RST
BSEL0
BSEL1
PWRGD_CPU
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
AF26
AB26
AE21
AF24
AF25
AE26
AB23
AB25
AA24
AA22
AA25
VSS_SENSE
D12#
D11#
H21
HD#10
HD#11
DBRESET
CPUVID_GD
VID4
VID5
VID3
AD26
AC26
AE1
AE2
AD3
AD2
VID4#
VID5#
ITP_CLK1
ITP_CLK0
VIDPWRGD
D10#
D9#
D8#
D7#
D6#
D5#
B25
B24
C24
C23
D22
G22
C21
HD#6
HD#4
HD#5
HD#7
HD#8
HD#9
VID2
VID3#
D4#
HD#3
AE3
A25
VID1
AE4
VID2#
D3#
A23
HD#2
VID0
AE5
VID1#
VID0#
LINT1/NMI
LINT0/INTR
D2#
D1#
B22
B21
HD#1
HD#0
GTLREF3
GTLREF2
GTLREF1
GTLREF0
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
D0#
CPUVID_GD 26
VID[0..5] 26
AA21
AA6
F20
F6
AB4
BPM5#
AA5
BPM4#
Y6
BPM3#
AC4
BPM2#
AB5
BPM1#
AC6
BPM0#
H3
REQ4#
J3
REQ3#
J4
REQ2#
K5
REQ1#
J1
REQ0#
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
BCLK1#
AF22
BCLK0#
F4
RS2#
G5
RS1#
F1
RS0#
V5
AP1#
AC1
AP0#
H6
BR0#
P1
COMP1
L24
COMP0
L25
DP3#
K26
DP2#
K25
DP1#
J26
DP0#
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
SOCK478-DIP
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI0
CPUCLK#
CPUCLK
HRS#2
HRS#1
HRS#0
BREQ#0
COMP1
COMP0
HADSTB#1
HADSTB#0
HDSTB3
HDSTB2
HDSTB1
HDSTB0
HDSTB#3
HDSTB#2
HDSTB#1
HDSTB#0
NMI
INTR
GTLREF1
C58 220p_X7R
HREQ#4 8
HREQ#3 8
HREQ#2 8
HREQ#1 8
HREQ#0 8
R27 62
R47 62
R18 62
R34 62
R35 62
R23 62
R21 62
HRS#2 8
HRS#1 8
HRS#0 8
R41 61.9/6/1
R37 61.9/6/1
VCORE
CPUCLK# 5
CPUCLK 5
BREQ#0 8
HADSTB#1 8
HADSTB#0 8
HDSTB3 8
HDSTB2 8
HDSTB1 8
HDSTB0 8
HDSTB#3 8
HDSTB#2 8
HDSTB#1 8
HDSTB#0 8
NMI 17
INTR 17
VIH
It must r out t o the enable pin of PW M and CK-409.
VIDGD to Vcc p dela y time is from 1ms to 10ms.
VIDGD rising tim e is 150ns.
CPU GT L REFERNCE VOLTAGE BLOCK
GTLREF1
BREQ#0 8
CPURST# 8
FERR# 17
VCORE
Min Max Typ
0.9
0.62*Vccp
1u
C55
VCORE
0.3
R38
100RST
R39
169RST
CPU ITP BLOCK
ITP_TDI
ITP_TRST#
DBRESET
VT8373B REV: 0.2
ITP_TCK
PROCHOT#
PWRGD_CPU
BREQ#0
CPURST#
THERMTRIP#
IERR#
STPCLK#
SMI#
SLP#
CPUINIT#
INTR
NMI
A20M#
IGNNE#
CPU STRAPPING RESISTORS
RN3
7 8
5 6
3 4
1 2
8P4R-51R3
R48 X_150
R40 680
R905 X_150
R49 X_27
R50 62
R30 300
R51 51
R31 51
R14 62
R19 62
R20 X_150
RN4
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9
150
BPM#2
BPM#0
BPM#1
BPM#3
BPM#4
BPM#5
5
5
10
10
VCORE
VCORE
VCORE
VCORE
MSI
Title
Size Docum ent Nu m b er Rev
5
4
3
2
Date: Sheet
Micro-Star
CPU S o c k et 478 part1
MS-7 104
62 9 Frida y , November 04, 2005
1
20A
of
5
4
3
2
1
VCC_VID
CPU VOL T AGE BLOCK
VID Voltage is f rom 1.14V to 1.32V.
D D
VCORE
A10
A12
A14
A16
A18
A20
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
VCC
VSS
AF19
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSSC2VSS
VSS
VSS
VSSC5VSSC7VSSC9VSS
C15
C17
C19
C22
C25
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCCA8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
C C
B B
AA19
AA23
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
AA4
AA7
AA9
AB3
AB6
AB8
AC2
AC5
AC7
AC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B10
B12
B14
AF1
AE7
AD4
AD8
AE11
AD10
AD12
AD14
AD16
AE13
AD18
AD21
AD23
AE9
AF10
AF12
AF14
AF16
AE15
AE17
AE19
AE22
AE24
AF18
B16
AF6
AF8
AF20
VCC
VSS
VSS
VSS
VSS
VSSB4VSSB8VSS
B18
B23
B20
B26
C11
C13
It is derived fr om 3. 3V .
It should be able to source 150mA.
It drives the power logic of BSEL[1:0] and VID[5:0].
VID to VID GD delay time is from 1ms to 10ms.
VID to VIDGD deassertion time is 1ms for max.
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
C10
C12
C14
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCB7VCCB9VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSSD3VSS
VSSD6VSSD8VSSE1VSS
E11
D12
D14
D16
D18
D20
D21
E13
D24
VCC
VSS
C16
C18
C20
D11
D13
D15
D17
VCC
VCC
VCC
VCCC8VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSSE7VSSE9VSS
VSSE4VSS
E15
E17
E19
E23
E26
D19
VCC
F10
VCCD7VCCD9VCC
VSS
VSS
F12
F14
VCC_VID
E10
E12
VSS
F16
F18
NEAR CPU
E14
E16
VCC
VCC
VCC
VSS
VSSF2VSS
F22
E18
VCC
VSS
F25
E20
VCC
VCCE8VCC
VSSF5VSSF8VSS
C26
1u
Near processor
F11
F13
F15
VCC
VCC
VSSG3VSSH1VSS
G21
G24
1.2V 150mA
C27
X_0.1u
F17
F19
F9
VCC
VCC
VCC
VSSG6VSS
VSS
H23
H26
AF4
VCC-VID
VSSH4VSSJ2VSS
AF3
J22
VCC-VIDPRG
J25
VSS
AD20
VCC-IOPLL
VSSJ5VSS
K21
AE23
VCCA
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SOCK478-DIP
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
It support DC c ur ren t if 100mA.
CPU_IOPLL
C25
X_1u
VSSA
The ESL is l ess th an 5 n H, and the ESR is less than 0.3ohm.
L2 X_4.7uH-1206-100mA
L1 4.7uH-1206-100mA
DC voltage drop should
be less than 70mV.
C32
10u_1206
VCORE
CPU DEC O U PLING CAPACITORS
VCORE
C29 10u_1206
C20 10u_1206
C21 10u_1206
C30 10u_1206
C22 10u_1206
A A
C31 10u_1206
C23 10u_1206
Place these c aps wit hin north side of processor
5
C56 10u_1206
C53 10u_1206
C52 10u_1206
C45 10u_1206
Place these c aps wit hin s ock et cavity
4
VCORE VCORE VCORE
+
C50
C100U2VSP
VCORE
C44 10u_1206
C46 10u_1206
C49 10u_1206
C59 10u_1206
C72 10u_0805
C71 10u_0805
C70 10u_0805
Place these c aps with in s outh side of processor
3
2
VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE
1
SP8
X_SP
1
1
1
SP6
SP2
X_SP
X_SP
72 9 Friday, Nov ember 04 , 2005
of
1
1
1
1
1
SP1
X_SP
Title
Size Document Number R ev
Date: Sheet
SP7
X_SP
1
MSI
SP5
X_SP
1
1
1
1
SP4
SP3
X_SP
X_SP
Micro-Star
CPU Socket 478 part2
MS-7104
1
1
1
20A
4
3
2
1
BY PASS CAP
VCORE
D D
HA#[3..31] 6
C C
B B
near NB
0.01u
near NB
A A
HADSTB#0 6
HADSTB#1 6
HADS# 6
HBNR# 6
HBPRI# 6
BREQ#0 6
HDBSY# 6
HDEFER# 6
HDRDY# 6
HIT# 6
HITM# 6
HLOCK# 6
HTRDY# 6
HREQ#0 6
HREQ#1 6
HREQ#2 6
HREQ#3 6
HREQ#4 6
HRS#0 6
HRS#1 6
HRS#2 6
HDBI#0 6
HDBI#1 6
HDBI#2 6
HDBI#3 6
CPURST# 6
NBHCLK 5
NBHCLK# 5
GTLVREF_NB
C285
C116
0.01u
GTLVREF_NB1
C286
C119
0.01u
0.01u
0.01u C111
HA#[3..31]
Solder side
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HADSTB#0
HADSTB#1
HADS#
HBNR#
HBPRI#
BREQ#0
HDBSY#
HDEFER#
HDRDY#
HIT#
HITM#
HLOCK#
HTRDY#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HDBI#0
HDBI#1
HDBI#2
HDBI#3
CPURST#
NBHCLK
NBHCLK#
C290
0.01u
C294
0.01u
HRCOMP
HCOMPVREF
4
Y29
V27
AA29
Y27
Y26
AC27
AA28
AB27
AA27
AC29
AB29
AB28
AC26
AD29
T28
R28
N29
N28
P29
P27
R27
N26
T26
P26
R25
N27
N25
R29
T27
U26
T25
W28
R26
M29
M28
T29
K26
M25
U27
M26
L27
U29
L29
M24
W27
V28
V26
W29
V29
L26
M27
K25
C29
H27
B21
A21
D14
Y23
W23
R24
V24
F22
G24
F19
F16
L24
N24
W26
G25
G26
K24
P4M800 CE
U5A
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16
HA17
HA18
HA19
HA20
HA21
HA22
HA23
HA24
HA25
HA26
HA27
HA28
HA29
HA30
HA31
HA32
HA33
HADSTB0
HADSTB1
ADS
BNR
BPRI
BREQ
DBSY
DEFER
DRDY
HIT
HITM
HLOCK
HTRDY
HREQ0
HREQ1
HREQ2
HREQ3
HREQ4
RS0
RS1
RS2
HDBI0
HDBI1
HDBI2
HDBI3
CPURST
HCLK+
HCLK-
HAVREF0
HAVREF1
HDVREF0
HDVREF1
HDVREF2
HDVREF3
GTLVREF
HAP0
HAP1
HRCOMP
HCOMPVREF
DPWR
GND
GND
A16
A19
B22
GND
U19
T19
R19
P19
N19
M19
L19
L18
L17
L16
L15
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
L25
L28
E29
E26
E25
E22
B25
B28
D16
D15
H26
D19
H29
GND
GND
GND
GND
GND
P25
P28
Y25
Y28
P18
U28
U25
N18
R18
M18
3
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
HDSTB0P
HDSTB0N
HDSTB1P
HDSTB1N
HDSTB2P
HDSTB2N
HDSTB3P
HDSTB3N
GND
GND
GND
GND
T18
V18
U18
AC28
D27
D26
A29
C26
C28
D28
A27
B29
A26
B26
D25
E24
A25
A28
D24
C25
K28
K29
J28
K27
J26
J29
J25
J27
F28
G29
G27
D29
E27
F27
E28
F29
E23
B24
C24
A24
A23
B23
A22
C23
F21
C22
E21
C21
D20
D21
F20
E20
B19
C19
B20
B18
C20
A20
C18
B17
B16
A17
C14
C15
A18
B15
B14
A15
B27
C27
H28
G28
D23
D22
C17
C16
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDSTB0
HDSTB#0
HDSTB1
HDSTB#1
HDSTB2
HDSTB#2
HDSTB3
HDSTB#3
HDSTB0 6
HDSTB#0 6
HDSTB1 6
HDSTB#1 6
HDSTB2 6
HDSTB#2 6
HDSTB3 6
HDSTB#3 6
HD#[0..63] 6
VCORE
2
CB9
0.1u
Component Side
VCORE
CB42
10u_0805
CB45
0.1u
Solder Side
R93 100RST
VCORE
R87 100RST
VCORE
R88 100RST
VCORE
R92 20.5RST
Title
Size Docum ent Nu m b er Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
NORTH BRIDGE
GTLVREF_NB1
R98
169RST
GTLVREF_NB
R90
169RST
HCOMPVREF
R85
49.9RST
MS-7 104
1
HRCOMP
82 9 Frida y , November 04, 2005
20A
of
4
VDIMM
W12
W13
W14
W15
AD28
AE27
AF27
AG28
AD27
AE29
AG27
AG29
AH29
AJ29
AG25
AJ25
AJ28
AH27
AH26
AJ26
AJ24
AG24
AJ22
AG21
AH24
AG23
AG22
AJ21
AH21
AJ20
AG18
AH18
AG20
AH19
AJ18
AG17
AJ12
AG12
AJ10
AH12
AJ11
AG10
AH9
AG8
AH6
AG9
AG5
AH4
AH1
AG4
AF4
AG3
AG1
AF2
AD3
AD1
AG2
AF3
AE1
AD2
AF21
AF23
AE22
AF24
AF29
AG26
AH22
AG19
AH10
AG6
AF1
U5B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
AJ9
MD35
MD36
MD37
MD38
MD39
MD40
AJ7
MD41
AJ6
MD42
MD43
MD44
AJ8
MD45
MD46
AJ5
MD47
MD48
AJ4
MD49
AJ2
MD50
MD51
MD52
MD53
MD54
AJ1
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
CKE0
CKE1
CKE2
CKE3
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
AJ3
DQM6
DQM7
D D
C C
B B
MD[63..0] 12,13
CKE0 12,13
CKE1 12,13
CKE2 12,13
CKE3 12,13
DQM#[7..0] 12,13
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
CKE0
CKE1
CKE2
CKE3
DQM#0
DQM#1
DQM#2
DQM#3
DQM#4
DQM#5
DQM#6
DQM#7
V11
W16
W11
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
W17
3
W18
W19
V19
MA0
MA1
MA2
MA3
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
BA0
BA1
AF13
AD15
AJ15
AJ16
AJ17
AF16
AG15
AE18
AF17
AE19
AJ14
AF20
AE21
AD7
AF12
AJ13
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA[13..0] 12,13
BA0 12,13
BA1 12,13
Solder Side
R894 300RST
AE5
DMCOMP
AE24
MEMDET
SRAS
SCAS
SWE
CS0
CS1
CS2
CS3
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
MCLKIA
MCLKO-
MCLKO+
MEMVREF1
MEMVREF2
MEMVREF3
MEMVREF4
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AE12
AF9
AF11
AD9
AF8
AG7
AF7
AF28
AJ27
AJ23
AJ19
AG11
AH7
AH3
AE3
AD26
AE26
AF26
AD23
AD17
AD11
AD8
M16
N16
P16
R16
T16
U16
V16
M15
N15
P15
R895 1KRST
SRAS#A
SCAS#A
SWE#A
CS#0
CS#1
CS#2
CS#3
DCLK_FB
MCLKO#
DCLKO
SRAS#A 12,13
SCAS#A 12,13
SWE#A 12,13
CS#0 12,13
CS#1 12,13
CS#2 12,13
CS#3 12,13
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DCLKO as short as passable
DCLKI = DCLKx + 2 "
MVREF_NB
DQS#[7..0] 12,13
2
R63 22R2
DCLK_FB 5
DCLK_OUT 5
VDIMM
R114
100
MVREF_NB
R116
100
VDIMM VDIMM
C143
4.7u_0805
CB8
10u_0805
CB3
10u_0805
CB6
1u
Component Side
Near to NB chip
R896 X_10KR0402
MCLKO#
DCLK_FB
X_C5P50VNPOL C842
Solder Side
U5_1
V-Class
1
1
E31-0401520-E25
1
MVREF_NB = 0.5* VCCDDR
C142
X_1000p
C293
1000p
Solder Side
2
2
solder side
CB50
10u_0805
CB46
10u_0805
CB48
1u
CB44
X_1u
CB41
1u
CB43
10u_0805
Heatsink
A A
P4M800 CE
4
GND
AE2
AE8
GND
GND
GND
GND
GND
GND
AE20
AE17
AE16
AE14
AE11
AE23
GND
AE25
GND
GND
GND
GND
GND
GND
GND
GND
AH8
AH5
AH2
AE28
AH11
AH14
AH17
AH20
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AF5
M17
AH23
AH25
AH28
3
GND
GND
GND
GND
GND
T17
P17
N17
R17
T15
V17
V15
U17
U15
R15
Title
Size Docum ent Nu m b er Rev
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
NORTH BRIDGE
MS-7 104
1
of
92 9 Frida y , November 04, 2005
20A