MSI MS-7088 Schematic 0A

5

4

3

2

1

Title

Cover Sheet

D D

MS-7088 uATX

Block Diagram
GPIO SPEC

*Intel LGA775
*INTEL Springdale GMCH / ICH5 Chipset

(DDR 400 / AGP 8X) / (integrated serial ATA)
*CLOCK -- ICS952642
*LAN - REALTEK RTL8110S/8100C
*VIA/6307,IEEE1394 2port
*Winbond 83627THF LPC I/O
*ALC655 Audio codec 6 channel support

C C

*USB 2.0 support x8

Intel LGA775
Clock Synthesizer
Intel Springdale
System Memory

/ DDR Terminations
AGP SLOT
ICH5
PCI Slot
LAN RTL8110S / 8100C
VIA 1394(6307)
Intel IDE connector
MS-7 ACPI Controller
Audio Codec / 6 Channel connector
VRM 10.1

Page

1
2
3
4,5,6
7
8,9,10
11,12
13
14,15
16
17
18
19
20
21
22

23VGA CONNECTOR
USB CONNECTOR
W627THF LPC I/O / FWH
FAN

B B

KB/MS/LPT/COM Port/FAN
ATX connector / Front Panel
Manual Part
HISTORY

24

25

26

27

28

29

30

A A

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

Cover Sheet

MS-7088

1

Last Revision Date:

Tuesday, June 15, 2004

Sheet

Rev

0A

130

of

5

4

3

2

1

Block Diagram

+5V : VCC5
+3.3V : VCC3
+12V : +12V
5VSB : VCC5_SB

D D

-12V : -12V
+2.55V for DDR : VCC_DDR

1.275V for DDR VTT : VTT_DDR

POWER DELIVERY MAP

Dual 3.3V : 3VDUAL

1.2V for CPU VID : VCC_VID

1.5V for AGP VI/O : VCC_AGP
Dual 5V : 5VDUAL
CPU Vcore : VCCP
+5V for analog CODEC : AVDD5

2.5V for LAN : 2_5VSB
+12V for 1394 bus power : CPWR

C C

A
G
P

AGP 8X/4X
(1.5V)
VGA CONN

B B

1394
Controller

1394
6307

USB 2.0
Rear x4

Front X4

A A

IDE CONN 1&2

USB Port 0:1
USB Front Panel

USB Port 6:7
USB Front Panel

USB Port 2:3
USB Front Panel

USB Port 4:5
USB Front Panel

AGP 8X /Fast Write

RTLVIA
8100C/
8110S

ATA33/ATA66/ATA100

Dual USB 1.1 OHCI
/2.0 EHCI 8 Ports

PS2 Mouse &
Keyboard

5 PCI Slots

Intel LGA775

PCI-33

LPC Bus

SUPER I/O

Winbond
LPC I/O
83627THF

Parallel (1)
Serial (1)

FSB 400/533/800

Springdale

HUB Interface

ICH5

Controller HUB

(33MHz)

Floppy Disk
Drive

(200/266/333/400 MHz)

(200/266/333/400 MHz)

LPC BUS

FWH: Firmware HUB

DDR DIMM1,2

2 channel DDR 333

DDR DIMM3,4

Serial ATA

Dual ATA 33/66/100

AC Link

AC97 Codec

6 CHANNEL
+ SPDIF

SATA Con x2

3.3V 5V 5VSB 12V

1.2V VREG

1.5V VREG

3VSB VREG

DDR 2.5V
VREG

VRM

2.5V VREG

Lan 2.5VSB
VREG

AC97 VDD5
VREG

VTT 1.25V
VREG

PROCESSOR VCCP

PROCESSOR 1.2V

AGP SLOT 1.5V

NORTH BRIDGE VCCP
NORTH BRIDGE VCC_AGP

NORTH BRIDGE SYSEM MEMORY
VCC_DDR

DDR DIMM1 / DIMM2 2.5V
DDR VTT 1.25V

SORTH BRIDGE +1.5V
SORTH BRIDGE VCC3
SORTH BRIDGE RESUME VCC5_SB
SORTH BRIDGE RESUME VCC3_SB
SORTH BRIDGE RTC 3.3V

LAN

VT6150 VCC3_SB
VT6150 2.5VSB

FWH 3.3V

LPC SUPER I/O 3.3V
LPC SUPER I/O VCC5

CK-409 3.3V

AC97 VDD5

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

Block Diagram

MS-7088

1

Last Revision Date:
Sheet

Tuesday, June 15, 2004

30

2

of

Rev

0A

5

4

3

2

1

GPIO FUNCTION

ICH5

D D

C C

GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22 GPO22
GPIO 23

PREQ#B

I

PREQ#B

I

PIRQ#E

I
I

PIRQ#F

I

PIRQ#G

I

PIRQ#H
GPI6

I

GPI7

I

GPI8

I

OC4#

I

OC5#

I

SIO_SMI#

I

EXTSMI#

I

SIO_PME#

I
I OC#6

OC#7

I

PGNT#A

O
O

PGNT#B

O GPO18

BIOS_WP#

O
O

GPO20
O GPO21
OD
O

GPO23

GPIO 24 I/O GPIO24

FunctionTypeGPIO Pin

GPIO 25 I/O
GPIO 27
GPIO 28

*

GPIO 32

B B

GPIO 33
GPIO 34
GPIO 40 PREQ#4
GPIO 41
GPIO 48
GPIO 49

GPIO25
I/O

GPIO27
I/O GPIO28
I/O

GPIO32
I/O

GPIO33
I/O

GPIO34
I

GPI41

I
O PGNT#4

CPUPWRGD

OD

FWH

Function

GPI 0 PD_DET
GPI 1

*

GPI 3
GPI 4

*

TypeGPIO Pin

I

SD_DET

I
I

BOM strapping for Bit 0GPI 2

Pull down through 1K ohms (unused)

I
I

BOM strapping for Bit 1

Power well

MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN

default output
default output
default output
default output
default output
default output
default output

DDR DIMM Config.

DEVICE

DIMM 1 MCLK_A0/MCLK_A0#

1010000B

CLOCKADDRESS

DDR DIMM Config.

DEVICE

DIMM 3 MCLK_B0/MCLK_B0#
MCLK_A1/MCLK_A1#
MCLK_A2/MCLK_A2#

DIMM 2

1010001B

MCLK_A3/MCLK_A3#

DIMM 4
MCLK_A4/MCLK_A4#
MCLK_A5/MCLK_A5#

PCI RESET DEVICE

Signals
PCIRST#_ICH5 AGP,FWH,MS-5
PCIRST#1

HD_RST#

PCI

Clock NC pin : PCI 33MHz(Pin 19 ,20) , 66MHz(Pin 27)

DEVICES

Mini PCI 1

PCI SLOT 1

PCI SLOT 2

PCI SLOT 3

PCI SLOT 4

Lan 6105L INT#E AD25 Lan_PCLK-Pin-16

Target

Springdale,LAN,
Super I/O,1394,MS-1

PCI slot 1-3 & Mini PCIPCIRST#2
Primary, Scondary IDE

INT#

INT#A
INT#B

INT#B
INT#C
INT#D
INT#A

INT#C
INT#D
INT#A
INT#B

INT#D
INT#A
INT#B
INT#C

INT#G

IDSEL

AD16

AD17

AD18

AD19

AD20

REQ#/GNT#

PREQ#1

PGNT#1

PCI1PREQ#1

PCI1PGNT#1

PREQ#3

PGNT#3

PCI3PREQ#3

PCI3PGNT#3

PREQ#5

PGNT#5

PREQ#4

PGNT#4

CLOCK

PCICLK1-Pin-14

PCICLK2-Pin-15

PCICLK3-Pin-20

MS1

(MS1PCLK-Pin-8)

PCICLK5-Pin-21

1010010B

1010011B

CLOCKADDRESS

MCLK_B1/MCLK_B1#
MCLK_B2/MCLK_B2#
MCLK_B3/MCLK_B3#
MCLK_B4/MCLK_B4#
MCLK_B5/MCLK_B5#

A A

5

4

1394 INT#F AD26 1394_PCLK-Pin-12

MS-1

3

PREQ#2
PGNT#2

PREQ#0

PGNT#0

MS1PCLK-Pin-8

2

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

GPIO Spec.

MS-7088

Last Revision Date:

Tuesday, June 15, 2004

Sheet

330

1

Rev

0A

of

8

R135 249R1%

D

D

Q22

GS

GTL_DET6,8

VCC3

R136 110R1%

D D

V_FSB_VTT

V_FSB_VTT

N-2N7002_SOT23

G

S

R138

61.9R1%

HDBI#[0..3]8

R99 X_62R

HIERR#5

FERR#5,15

STPCLK#15

1.18V

H_TESTHI0

C90

0.1u

HDBI#0
HDBI#1
HDBI#2
HDBI#3

EDRDY#

HINIT#15,25

HDBSY#8

HDRDY#8

HTRDY#8

C C

HADS#8

HLOCK#8

HBNR#8

HIT#8

HITM#8

HBPRI#8

HDEFER#8

CPU_TMPA25
VTIN_GND25

TRMTRIP#5,15

PROCHOT#5,8

IGNNE#15

SMI#15

A20M#15

SLP#15

H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK

C36 X_0.1u

B B

H_FSBSEL05
H_FSBSEL15,7
H_FSBSEL25,7

R79 X_1KR

LL_ID022

CPU_BOOTVTT_OUT_RIGHT

LL_ID0 H_COMP1

PWRGD5,15

CPURST#5,8

HD#[0..63]8

HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54

G11
D19
C20

AB2
AB3

AD3

AD1
AF1
AC1
AG1
AE1
AL1
AK1

AE8
AL2

AH2
AE6
G10

D16
A20

AA2
G29

H30
G30

G23
B22

A22
A19
B19
B21
C21
B18
A17
B16
C18

VCC3

A8

F2

R3
M3

P3

H4

B2

C1

E3

D2
C3
C2
D4

E4
G8
G7

M2

N2

P2

K3

L2

N5
C9

Y1

V2

N1

7

HA#[3..31]8

CPU1A

DBI0#
DBI1#
DBI2#
DBI3#

EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#

RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5

BOOTSELECT
LL_ID0
LL_ID1

BSEL0
BSEL1
BSEL2

PWRGOOD
RESET#
D63#

D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

B15

D53#

6

CPU SIGNAL BLOCK

5

R78 X1KR

4

ICH_RST# 7,15,28

3

2

1

VID[0..5] 22

CPU_GTLREF 5

HRS#[0..2] 8

R62 0R

R61 0R

V_FSB_VTT

VTT_OUT_LEFT

C43
X_0.1u

RN20 8P4R-62R

1 2
3 4
5 6
7 8

R95 62R

R134 62R
R80 62R
R137 X_62R
R66 X_62R
R70 X_62R

R85 100R1%
R97 100R1%
R82 60.4R1%
R119 60.4R1%

T3
T6
T4
T5

VCC_SENSE

VSS_SENSE

R92 X_62R

HREQ#[0..4] 8

CPU_CLK# 7
CPU_CLK 7

HBR#0 5,8

PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE

HADSTB#1 8
HADSTB#0 8
HDSTBP#3 8
HDSTBP#2 8
HDSTBP#1 8
HDSTBP#0 8
HDSTBN#3 8
HDSTBN#2 8
HDSTBN#1 8
HDSTBN#0 8

NMI 15
INTR 15

VID5

VID2

VID4

VID0

VID1

AK3

ITP_CLK1

ITP_CLK0

D7#

D6#

D5#

AM5

RSVD

D4#

D3#

AL4

AK4

VID5#

D2#

VID4#

D1#

VID3

AL6

VID3#

TESTHI12
TESTHI11
TESTHI10

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

LINT1/NMI

LINT0/INTR

D0#

AM3

AL5

AM2

VID2#

VID1#

VID0#

H1

GTLREF

AG3

BPM5#

AF2

BPM4#

AG2

BPM3#

AD2

BPM2#

AJ1

BPM1#

AJ2

BPM0#

G5

PCREQ#

J6

REQ4#

K6

REQ3#

M6

REQ2#

J5

REQ1#

K4

REQ0#

W2
P1
H5
G4

TESTHI9

G3

TESTHI8

F24

TESTHI7

G24

TESTHI6

G26

TESTHI5

G27

TESTHI4

G25

TESTHI3

F25

TESTHI2

W3

TESTHI1

F26

TESTHI0

AK6

RSVD

G6

RSVD

G28

BCLK1#

F28

BCLK0#

A3

RS2#

F5

RS1#

B3

RS0#

U3

AP1#

U2

AP0#

F3

BR0#

R1

COMP3

G2

COMP2

T1

COMP1

A13

COMP0

J17

DP3#

H16

DP2#

H15

DP1#

J16

DP0#

AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8

L1
K1

ZIF-SOCK775-15u

CPU_GTLREF

H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0

PCREQ
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0

H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8

H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6

HRS#2
HRS#1
HRS#0

T2
T1

H_COMP3
H_COMP2

H_COMP0

VSS_SENSE

A4#

D17#

HA#3

A3#

D16#

D15#

AC2

DBR#

D14#

C12

AN3

RSVD

D13#

D12#

B12D8C11

AN4

VCC_SENSE

AN5

AN6

AJ3

RSVD

VSS_SENSE

VCC_SENSE

D11#

D10#

D9#

D8#

B10

A11

A10A7B7B6A5C6A4C5B4

HA#22

HA#27

HA#26

HA#29

HA#25

HA#28

HA#30

HA#31

AJ6

AJ5

AH5

AH4

AG5

AG4

AG6

AF4

AF5

AB4

AC5

A35#

A34#

A33#

A32#

A31#

A30#

A29#

A28#

A27#

A26#

D52#

D51#

D50#

D49#

D48#

D47#

D46#

D45#

D44#

D43#

D42#

D41#

D40#

D39#

C14

C15

A14

D17

D20

G22

D22

E22

G21

F21

E21

F20

E19

E18

F18

HA#18

HA#24

HA#23

HA#20

HA#19

HA#17

HA#21

AB5

AA5

AD6

AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5

A25#

A24#

A23#

A22#

A21#

A20#

A19#

A18#

D38#

D37#

D36#

D35#

D34#

D33#

D32#

D31#

F17

G17

G18

E16

E15

G16

G15

F15

HA#16

A17#

D30#

G14

HA#15

A16#

D29#

F14

HA#14

A15#

D28#

G13

HA#13

A14#

D27#

E13

HA#12

A13#

D26#

D13

A12#

D25#

HA#10

HA#11

A11#

D24#

F12

F11

A10#

D23#

HA#9

A9#

D22#

D10

HA#7

HA#5

HA#8

HA#6

HA#4

A8#

A7#

A6#

A5#

D21#

D20#

D19#

D18#

E10D7E9F9F8G9D11

VCC_VRM_SENSE

VSS_VRM_SENSE

V_FSB_VTT

V_FSB_VTT

VTT_OUT_RIGHT 5

VTT_OUT_LEFT 5,6

VTT_OUT_RIGHT

C34 0.1u
C35 0.1u

VCC_VRM_SENSE 22

VSS_VRM_SENSE 22

RN8

8P4R-680R

VID1

1

VID2
VID3
VID4
VID0
VID5

RN14 8P4R-51R

2

3

4

5

6

7

8

R42 680R
R33 680R

RN11 8P4R-51R

1 2
3 4
5 6
7 8
1 2
3 4
5 6

7 8

R76 49.9R1%
R74 49.9R1%
R73 49.9R1%

PLACE BPM TERMINATION NEAR CPU

VTT_OUT_RIGHT

H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_TDI
H_BPM#2
H_TDO
H_BPM#4

H_TMS
H_TCK
H_TRST#

HD#26

HD#53

HD#52

HD#51

HD#50

A A

8

7

HD#49

HD#48

HD#47

HD#46

HD#45

HD#43

HD#44

HD#42

HD#41

HD#40

HD#39

HD#37

HD#38

HD#36

HD#35

6

HD#34

HD#33

HD#32

HD#31

HD#30

HD#29

HD#28

HD#27

HD#25

HD#24

HD#23

HD#22

HD#20

HD#21

HD#18

HD#19

HD#17

HD#16

HD#14

HD#15

HD#13

HD#12

5

HD#11

HD#10

HD#9

HD#8

HD#7

HD#6

HD#4

HD#3

HD#2

HD#1

HD#0

Micro Star Restricted Secret

Title

Intel LGA775 CPU - Signals

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan

4

3

http://www.msi.com.tw

2

MS-7088

Last Revision Date:

Tuesday, June 15, 2004

Sheet

430

1

Rev

0A

of

HD#5

8

VCCP

AG21

AG19

AG18

AG15

AG14

AG12

AG11

AF9

AF8

AF22

AF21

AF19
AF18
AF15
AF14
AF12
AF11

AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11

AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23

AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

AB8

AA8

VCCP

CPU1B

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

W30W8Y23

Y24

Y25

Y26

Y27

Y28

Y29

Y30

Y8

VCCP

D D

C C

AG22

VCC

VCC

W29

AG25

VCC

VCC

W28

AG26

VCC

VCC

W27

AG27

VCC

VCC

W26

AG28

W25

VCC

VCC

AG29

VCC

VCC

W24

7

AG30

VCC

VCC

W23

AG8

VCC

VCC

AG9

VCC

VCC

AH11

VCC

VCC

U30U8V8

AH12

VCC

VCC

U29

AH14

U28

VCC

VCC

AH15

VCC

VCC

U27

AH18

VCC

VCC

U26

AH19

VCC

VCC

U25

AH21

VCC

VCC

U24

AH22

VCC

VCC

AH25

VCC

VCC

AH26

VCC

VCC

T30T8U23

AH27

VCC

VCC

T29

AH28

VCC

VCC

T28

AH29

T27

VCC

VCC

AH30

T26

VCC

VCC

AH8

T25

VCC

VCC

AH9

T24

VCC

VCC

AJ11

VCC

VCC

AJ12

VCC

VCC

AJ14

VCC

VCC

AJ15

VCC

VCC

6

AJ18

AJ19

AJ21

AJ22

AJ25

AJ26

AJ8

AJ9

AK11

AK12

AK14

AK15

AK18

AK19

AK21

AK22

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

M24

M25

M26

M27

M28

M29

M30M8N23

N24

N25

N26

N27

N28

N29

N30N8P8R8T23

VCC

VCC

AK25

VCC

VCC

M23

AK26

VCC

VCC

5

AK8

AK9

AL11

AL12

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL8

AL9

AM11

AM12

AM14

AM15

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

J22

J23

J24

J25

J26

J27

J28

J29

J30J8J9

K23

K24

K25

K26

K27

K28

K29

K30K8L8

AM18

VCC

VCC

J21

AM19

VCC

VCC

J20

AM21

VCC

VCC

J19

AM22

VCC

VCC

J18

AM25

VCC

VCC

J15

AM26

VCC

VCC

J14

4

AM29

VCC

VCC

J13

AM30

VCC

VCC

J12

AM8

J11

VCC

VCC

AM9

J10

VCC

VCC

AN11

VCC

VCC

AN9

AN12

AN14

AN15

AN18

AN19

AN21

AN22

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC-IOPLL

VTTPWRGD

VTT_OUT
VTT_OUT
VTT_SEL

RSVD/VTT_PKGSENSE

VCC

VCC

VCC

VCC

VCC

HS1

HS2

AN25

AN26

AN29

AN30

AN8

123

VCCA
VSSA
RSVD

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

HS3

HS4

4

H_VCCA

A23

H_VSSA

B23
D23

H_VCCA

C23

A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30

VTT_PWG

AM6

VTT_OUT_RIGHT

AA1

VTT_OUT_LEFT

J1
F27

F29

ZIF-SOCK775-15u

3

VTT_SEL

R129 X_1KR

V_FSB_VTT

TEJ/PSC

0

1

VCC3

RSVD

2

V_FSB_VTT

V_FSB_VTT

V_FSB_VTT

C118 0.1u
C74 1u_0805
C116 C10U10Y0805
C78 X_C10U10Y0805

CAPS FOR FSB GENERIC

1

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS

100 OHMS OVER 210 OHMS RESISTORS

R93
210R1%

0.8V

C48

0.1u

C47
C220P50N

CPU_GTLREF 4

VTT_OUT_RIGHT CPU_GTLREF

B B

GTLREF VOLTAGE SHOULD BE

0.67*VTT = 0.8V

R91 100R1%

V_FSB_VTT

V_FSB_VTT

PLACE AT CPU END OF ROUTE

PWRGD
HBR#0
CPURST#

FERR#
TRMTRIP#
HIERR#

7

PROCHOT#

PROCHOT# 4,8

PWRGD 4,15
HBR#0 4,8
CPURST# 4,8

FERR# 4,15
TRMTRIP# 4,15
HIERR# 4

FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED

V_FSB_VTT

6

V_FSB_VTT

5

RN42

1
3
5
7

8P4R-470R

2
4
6
8

VTT_OUT_RIGHT4

VTT_OUT_LEFT4,6

VTT_OUT_RIGHT

VTT_OUT_LEFT

R69 120R

R88 100R
R100 62R
R68 62R

PLACE AT ICH END OF ROUTE

A A

8

V_FSB_VTT

V_FSB_VTT

RN18

1 2
3 4
5 6
7 8

8P4R-62R

L1 X_10U100m_0805

CP4
X_COPPER

VID_GD#20,22

H_FSBSEL1

H_FSBSEL0
H_FSBSEL2

4

VCC5_SB

R27
10KR

H_FSBSEL1 4,7
H_FSBSEL0 4
H_FSBSEL2 4,7

VTT_OUT_RIGHT

R35
1KR

R45
680R

Q10
N-MMBT3904_SOT23

3

C69
C10U10Y1206

C63
X_1u

1.25V VTT_PWRGOOD

VTT_PWG

H_VSSA

H_VCCA

Micro Star Restricted Secret

Title

Intel LGA775 CPU - Power

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

2

MS-7088

Last Revision Date:

Tuesday, June 15, 2004

Sheet

530

1

Rev

0A

of

8

VTT_OUT_LEFT4,5

R83 X_60.4R1%
R94 X_60.4R1%

T10

AC4

AE3

AE4D1D14

E23

CPU1C

AA23
AA24
AA25
AA26
AA27
AA28
AA29

AA30

AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AC3
AC6
AC7
AD4

AD7
AE10
AE13
AE16
AE17

AE2
AE20
AE24
AE25
AE26
AE27
AE28

A12

VSS

A15

VSS

A18

VSS

A2

VSS

A21

VSS

A24

VSS

A6

VSS

A9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AA3

VSS
VSS

AA6

VSS

AA7

VSS

AB1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AB7

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

D D

C C

VSS

AE29

E24E5E6E7F23F6B13H2J2J3N4P5T2V1W1Y3Y7Y5Y2W7W4V7V6

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AE30

AE5

AE7

AF10

AF13

AF16

AF17

AF20

RSVD

VSS

AF23

T8

RSVD

VSS

AF24

T7

RSVD

VSS

AF25

T9

RSVD

VSS

AF26

RSVD

VSS

AF27

RSVD

VSS

AF28

7

RSVD

VSS

AF29

RSVD

COMP4

VSS

VSS

AF3

RSVD

VSS

AF30

AF6

RSVD

VSS

AF7

RSVD

COMP5

VSS

VSS

AG10

RSVD

VSS

AG13

RSVD

VSS

AG16

VSS

AG17

AG20

VSS

VSS

VSS

AG23

VSS

VSS

AG24

AG7

VSS

VSS

AH1

VSS

VSS

AH10

VSS

VSS

AH13

VSS

VSS

VSS

VSS

AH16

V30V3V29

VSS

VSS

VSS

VSS

AH17

AH20

AH23

VSS

VSS

V28

VSS

VSS

AH24

V27

AH3

VSS

VSS

6

V26

V25

V24

VSS

VSS

VSS

VSS

VSS

VSS

AH6

AH7

AJ10

V23U7U1T7T6T3R7R5R30

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ13

AJ16

AJ17

AJ20

AJ23

AJ24

AJ27

AJ28

AJ29

VSS

VSS

R29

AJ30

VSS

VSS

5

4

3

2

1

GTL_DET 4,8

H17

H18

H19

H20

H21

H22

H23

H24

H25

H26

H27

H28

AM4

VSS

VSS

AM7

VSS

VID7#

AN1

VSS

VSS

VSS

VSS

AN10

VSS

VSS

AN13

VSS

VSS

AN16

H29H3H6H7H8H9J4J7K2

VSS

VSS

VSS

GTLREF_SEL

VSS

VSS

VSS

VSS

AN17

AN2

AN20

AN23

VSS

VSS

AN24

VSS

VSS

AN27

AN28

VSS

VSS

VSS

VSS

VID_SELECT

VSS

AN7B1B11

VSS

VSS

VSS

VSS

VSS

VSS

B14

ZIF-SOCK775-15u

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17

R28

R27

R26

R25

R24

R23R2P7P4P30

P29

P28

P27

P26

P25

P24

P23N7N6N3M7M1L7L6L30L3L29

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ4

AJ7

AK10

AK13

AK16

AK17

AK2

AK20

AK23

AK24

AK27

AK28

AK29

AK30

AK5

AK7

AL10

AL13

AL16

AL17

AL20

VSS

VSS

AL23

AL24

VSS

VSS

AL27

VSS

VSS

AL28

VSS

VSS

L28

L27

L26

L25

L24

L23K7K5

VSS

VSS

VSS

AM13

VSS

VSS

AM16

VSS

VSS

AM17

VSS

VSS

AM20

VSS

VSS

AM23

VSS

VSS

AM24

VSS

VSS

AM27

VSS

AM28

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AL3

AL7

AM1

AM10

B B

A A

Micro Star Restricted Secret

Title

Intel LGA775 CPU - GND

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan

8

7

6

5

4

3

http://www.msi.com.tw

2

MS-7088

Last Revision Date:

Tuesday, June 15, 2004

Sheet

630

1

Rev

0A

of

5

4

3

2

1

Clock Synthesizer

*Trace less 0.5"

D D

C C

B B

A A

CP7 X_COPPER

VCC3

Use 2 VIA hole on BEAD both side

FB7

C130

0.1u

CP9 X_COPPER
FB8 X_80-0805-3A

VCC3

Use 2 VIA hole on BEAD both side

X_80-0805-3A

EC42

+

X_10U/16V/S

PWROK_SMB20

5

VCC3V

C151

0.1u

C147

0.1u

C148

0.1u

C149

0.1u

C142
X_0.1u

C194

0.1u

C193

0.1u

C176

0.1u

C156

0.01u_X7R

SMBDATA_ISO
SMBCLK_ISO

U9

41 39

CPU_VDD CPU0#

44

CPU_GND

35

SRC_VDD

38

SRC_GND

28

3V66_VDD

10

PCI_VDD

11

PCI_GND

17

PCI_VDD

18

PCI_GND

25

48_VDD

24

48_GND

3

REF_VDD

6

REF_GND

48

VDDA

47

GND

33

SDATA

32

SCLK

*120k Pull-up

**120k Pull-down

^^External 2.2k Pull-down

SMBCLK_ISO
SMBDATA_ISO

+12V

C150
X_0.1u

R212

X_1K

R211 2.7K
R199 2.7K

CPU0
CPU1

CPU1#

SRC#

3V66_0
3V66_1
3V66_2

3V66_3/VCH3V66_GND

**FS2/PCI_F0
**FS4/PCI_F1

PCI_F2

^^PCI0

~PCI6

*TURBO#

**SEL24_48#/24_48

**FS3/48M_0

**FS_1(A)/REF_0

*FS_0(B)/REF_1

XOUT

VTT_PWRGD/PD#

RESET#

ICS952642AF

VCC3

R200 X_4.7K

R194 X_4.7K

SRC

PCI1
PCI2
PCI3
PCI4
PCI5

XIN

IREF

X_NDS7002AS

X_NDS7002AS

4

CPUCLK

40

CPUCLK#

MCHCLK

43

MCHCLK#

42

SATA100 SATA_100

37

SATA100#

36

MCH66

31

ICH66

30
27

AGPCLK

2629
7

FS_4

8

PCICLK3

9

PCICLK0

12

1394PCLK 1394_PCLK

13

SIOPCLK SIO_PCLK

14

PCICLK1 PCI_CLK1

15
16
19

PCICLK2 PCI_CLK2

20
21

SIO48

22

FS_3

23

FS_1 AUDIO_14

1
2

4

5
34
45

R187 475

46

Iref = 2.32mA

CPUCLK#
CPUCLK
MCHCLK#
MCHCLK

R188 33
R189 33

R191 33
R192 33

R208 33
R256 33

R257 33
R235 33

RN65

7 8

33

5 6
3 4
1 2

R237 33

R238 4.7K

R223 33

R220 G_33
R221 33

Add R618 for 865G

R253 33
R233 33

Y1

14.318M

CG_PWRGD# VCC3V

ICH_RST# 4,15,28

SMBus Isolation

SMBCLK

Q31

SMBCLK_ISO

SMBDATA

Q30

SMBDATA_ISO

SMBCLK 15,16,17

R217

0

SMBCLK_ISO 11,12,20

SMBDATA 15,16,17

R186

0

SMBDATA_ISO 11,12,20

RN60 33

7 8
5 6
3 4
1 2

SATA_100#

ICH_PCLKFS_2
FWH_PCLK
PCI_CLK4

LAN_CLKLANPCLK

ICH_14

18PC169

18PC162

Q29

2N3904S

14 ICH5
16 PCI
25 IO

CPU_CLK#
CPU_CLK
MCH_CLK#
MCH_CLK

VCC3

2N3904S

10 DDR
11 DDR
21 MS5

SATA_100 15
SATA_100# 15

MCH_66 10
ICH_66 15

AGP_CLK 13
ICH_PCLK 14

FWH_PCLK 25
PCI_CLK3 16

1394_PCLK 18
SIO_PCLK 25
PCI_CLK1 16
LAN_CLK 17

PCI_CLK2 16

SIO_48 25
DOT_48 10

USB_48 15

AUDIO_14 21
ICH_14 15

R190 10K

Q28

CPU_CLK# 4
CPU_CLK 4
MCH_CLK# 8
MCH_CLK 8

R180 10K

R179 10K

3

VCC3

VCCP

H_FSBSEL24,5

H_FSBSEL14,5

FS_3

R219 1K

FS_4

R234 1K

SIO48

R229 1K

PCICLK0

The pin12 must be
pull down 2.2K

V_FSB_VTT

X_N-MMBT3904_SOT23

R236 2.2K

R299
X_1K

X_N-MMBT3904_SOT23

V_FSB_VTT

Q44

Q43

CPU_CLK#
CPU_CLK
MCH_CLK#
MCH_CLK

SATA_100
SATA_100#

MCH_66
ICH_66
AGP_CLK

USB_48
SIO_48
DOT_48

7 8
5 6
3 4
1 2

R182 49.9RST
R183 49.9RST

X_10PC140
X_10PC141
X_10PC164

10PC173
10PC178
X_10PC174

RN55
51

EMC HF filter capacitors, located close to PLL

ICH_PCLK
FWH_PCLK
SIO_PCLKFS_0

1394_PCLK
PCI_CLK1

LAN_CLK

PCI_CLK2

ICH_14
AUDIO_14
PCI_CLK3

CPU_CLK#
CPU_CLK

R300
X_4.7K

FS_2

FS_1

FS_0

VCC3

123456

R292 1K

R255 1K

R232 1K

78

RN67
8P4R-1KR

MCH_CLK#
MCH_CLK

R268 2KST

R254 2KST

Micro Star Restricted Secret

Title

Clock Synthesizer

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan

2

http://www.msi.com.tw

CN11

7 8
5 6
3 4
1 2

8P4C-10P
CN10

7 8
5 6
3 4
1 2

X_8P4C-10P

X_10PC195

10PC192
10PC218
X_10PC208

CN9

7 8
5 6
3 4
1 2

X_8P4C-10P

Q40
N-MMBT3904_SOT23

2.49KST

R267

2.49KST

MS-7088

R279

Last Revision Date:
Sheet

1

BSEL0 8

BSEL1 8

Rev

0A

Tuesday, June 15, 2004

730

of

5

VCCA_FSB

VCC_AGP

C93 0.1u

A31

B4

J6J7J8J9K6K7K8K9L6L7L9

VCC

VCCA_FSB

VCCA_FSB

VSS

VSS

VSS

VSS

VSS

C12

C14

C16

C18

C10

C8

VCC

VSS

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

C20

C22

C24

C26

AE14

D26
D30

L23
E29
B32
K23
C30
C31

J25
B31
E30
B33

J24
F25
D34
C32
F28
C34

J27
G27
F29
E28
H27
K24
E32
F31
G30

J26
G26

B30
D28

B24
B26

B28
E25
F27
B29

J23

L22
C29

J21
K21

E23

L21
D24

E27
G24

G22
C27
B27

AK4
AJ8

L20

L13

L12
E24
C25
F23

B7
C7

E8

U8A

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HAD_STB0#
HAD_STB1#

BREQ0#
BPRI#

BNR#
HLOCK#
ADS#
HREQ0#

HREQ1#
HREQ2#
HREQ3#
HREQ4#

HIT#
HITM#
DEFER#

HTRDY#
DBSY#
DRDY#

RS0#
RS1#
RS2#

HCLKP
HCLKN

PWROK
CPURST#

RSTIN#
ICH_SYNC#

PROCHOT#

BSEL0
BSEL1

HDRCOMP
HDSWING
HDVREF

HA#[3..31]4

D D

HADSTB#04
HADSTB#14

C C

HBR#04,5

HBPRI#4

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HBNR#4

HLOCK#4

HADS#4

HREQ#[0..4]4

HITM#4

HDEFER#4

HTRDY#4
HDBSY#4

HDRDY#4

HRS#[0..2]4

MCH_CLK7

MCH_CLK#7

B B

CPURST#4,5
PCIRST#117,18,20

PROCHOT#4,5

BSEL07
BSEL17

R148 20RST

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

HIT#4

HRS#0
HRS#1
HRS#2

MS7_POK

ICH_SYNC#

HRCOMP
HSWING

GTLREF

C97

220p_X7R

VCC

VCC

VCC

VSS

VSS

VSS

C28D1D11

D9

VCC

VSS

4

N11N9P10

P11

R11

T16

T17

T18

T19

U16

U17

U20

V16

V18

V20

W16

N10

M10

M11M8M9

L10

L11

VCC

VCC

VCC

VSS

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

D19

D21

D23

D25

D27

D29

D31

D33

VCC

VCC

VSS

VSS

D13

D15

D17

VCC

VSS

T20

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

D35

F3F5F8

E3

F1

E1

F10

W19

W20

Y16

Y17

Y18

Y19

Y20

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

F18

F20

F22

F14

F16

F12

VSS

VSS

VSS

VSS

G31

G35

H5

F24

F26

G28

3

A3

A33

A35B2B25

B34C1C23

C35

E26

M31

AF13

AF23

AJ12

AN1

R25

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

VSS

VSS

VSS

VSS

VSS

VSS

H12

H14

H16H2H20

H18

H8

H9

VSS

NC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

H22

H24

H26

H30

H33

J10

J12

J14

J16

J18

2

V_FSB_VTT

D5D6D7E6E7

F7

AP2

AR3

AR33

AR35

A7A9A11

A13

A16

A20

A23

A25

A27

A29

A32

C4

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

J20

J22

J28

J32

J35

K11

K12

K14

K16

K18

K33

K20

K22

K25

K27

K29

L24

L25

A4A5A6B5B6C5C6

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VSS

VSS

VSS

VSS

VSS

VSS

M3M6M26

VSS

M27

M28

M30

M33N1N4

VSS

VSS

VSS

L26

L35

L31

A15

VTT

VTT

VTT

HD_STBP0#
HD_STBN0#

HD_STBP1#
HD_STBN1#

HD_STBP2#
HD_STBN2#

HD_STBP3#
HD_STBN3#

VSS

VSS

Intel Springdale-N

{Priority}

VTT_FSB1
VTT_FSB2

A21

HD0#
HD1#
HD2#
HD3#

VTT_FSB

VTT_FSB

HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

DINV_0#
DINV_1#
DINV_2#
DINV_3#

B23
E22
B21
D20
B22
D22
B20
C21
E18
E20
B16
D16
B18
B17
E16
D18
G20
F17
E19
F19
J17
L18
G16
G18
F21
F15
E15
E21
J19
G14
E17
K17
J15
L16
J13
F13
F11
E13
K15
G12
G10
L15
E11
K13
J11
H10
G8
E9
B13
E14
B14
B12
B15
D14
C13
B11
D10
C11
E10
B10
C9
B9
D8
B8

C17
L17
L14
C15

B19
C19

L19
K19

G9
F9

D12
E12

C113 0.47u
C107 0.47u

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HDBI#0
HDBI#1
HDBI#2
HDBI#3

HD#[0..63] 4

HDBI#[0..3] 4

HDSTBP#0 4
HDSTBN#0 4

HDSTBP#1 4
HDSTBN#1 4

HDSTBP#2 4
HDSTBN#2 4

HDSTBP#3 4
HDSTBN#3 4

1

V_FSB_VTT

VCC3

+12V

VCCP

R126
619R1%

A A

GTL_DET4,6

10K
R127

DS

Q23

G

N-2N7002_SOT23

C101

0.1u

5

C91

0.1u

GTLREF

V_FSB_VTT

0.8V

R145
100R1%

R139
210R1%

HSWING

C128
X_0.01u_X7R

1/4*Vccp

C127

0.01u_X7R

{VOLTAGE}

4

V_FSB_VTT

R177
301RST

R176
100RST

I=30mA

VCCA_FSB

0.1u

C121

+

CP5 X_COPPER

L9 X_0.82uH-30mA

EC41

10U/16V/S

+

MS5_POK

ICH_PWROKICH_SYNC#

0

1
0

0
0

0

1

VCC_AGP

0
0
1
11

ICH_SYNC#

MS7_POK15,20

MS7_POK

VCC3

R260 X_220

3

R261

X_220

Q34 X_2N3904S

Q36 X_2N3904S

R250 X_0

2

R264

X_1K

ICH_PWROK 15,20

Micro Star Restricted Secret

Title

Intel Springdale - CPU

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

MS-7088

1

EC40

Last Revision Date:

Tuesday, June 15, 2004

Sheet

830

1000U/6.3V

Rev

0A

of

5

4

3

2

1

MDQ_A[0..63]11 MCKE_A[0..1] 11

MDQ_A4

MDQ_A9

MDQ_A3

MDQ_A6

MDQ_A2

AM12

AN13

AM10

SDQ_A1

SDQ_A2

SDQ_A3

VCC_DDR

VCC_DDR

VCC_DDR

AA35

R35

AR21

MDQ_A7

MDQ_A5

AL10

AL12

AP13

SDQ_A4

SDQ_A5

SDQ_A6

VCC_DDR

VCC_DDR

VCC_DDR

AL7

AR15

AL6

MDQ_A8

MDQ_A10

AP14

AM14

AL18

SDQ_A7

SDQ_A8

SDQ_A9

VCC_DDR

VCC_DDR

VCC_DDR

AM1

AM2

AN8

MDQ_A12

MDQ_A11

MDQ_A13

AP19

AL14

AN15

SDQ_A10

SDQ_A11

SDQ_A12

VCC_DDR

VCC_DDR

VCC_DDR

AP3

AP4

AP5

MDQ_A15

MDQ_A16

MDQ_A14

AP18

AM18

AP22

SDQ_A13

SDQ_A14

SDQ_A15

VCC_DDR

VCC_DDR

VCC_DDR

AR4

AP6

AP7

MDQ_A18

MDQ_A17

MDQ_A19

AM22

AL24

AN27

SDQ_A16

SDQ_A17

SDQ_A18

VCC_DDR

VCC_DDR

VCC_DDR

AR5

AR7

AR31

MDQ_A22

MDQ_A21

MDQ_A20

AP21

AL22

SDQ_A19

SDQ_A20

SDQ_A21

VCC_DDR

SDQ_B0

AJ10

MDQ_A24

MDQ_A23

AP25

AP27

AP28

SDQ_A22

SDQ_A23

SDQ_B1

SDQ_B2

AE15

AL11

AE16

MDQ_A25

MDQ_A26

AP29

AP33

SDQ_A24

SDQ_A25

SDQ_A26

SDQ_B3

SDQ_B4

SDQ_B5

AL8

AF12

MDQ_A28

MDQ_A27

AM33

AM28

SDQ_A27

SDQ_B6

AK11

AG12

MDQ_A30

MDQ_A29

AN29

AM31

SDQ_A28

SDQ_A29

SDQ_A30

SDQ_B7

SDQ_B8

SDQ_B9

AE17

AL13

MDQ_A31

MDQ_A32

AN34

AH32

SDQ_A31

SDQ_A32

SDQ_B10

SDQ_B11

AK17

AL17

MDQ_A33

MDQ_A34

AG34

AF32

SDQ_A33

SDQ_A34

SDQ_B12

SDQ_B13

AK13

AJ14

MDQ_A35

MDQ_A36

AD32

AH31

SDQ_A35

SDQ_A36

SDQ_B14

SDQ_B15

AJ16

AJ18

MDQ_A38

MDQ_A37

AG33

AE34

SDQ_A37

SDQ_A38

SDQ_B16

SDQ_B17

AE19

AE20

MDQ_A40

MDQ_A39

AD34

AC34

SDQ_A39

SDQ_A40

SDQ_B18

SDQ_B19

AG23

AK23

MDQ_A42

MDQ_A41

AB31

V32

SDQ_A41

SDQ_A42

SDQ_B20

SDQ_B21

AL19

AK21

MDQ_A44

MDQ_A43

V31

AD31

SDQ_A43

SDQ_A44

SDQ_B22

SDQ_B23

AJ24

AE22

MDQ_A45

MDQ_A46

AB32

U34

SDQ_A45

SDQ_A46

SDQ_B24

SDQ_B25

AK25

AH26

MDQ_A48

MDQ_A47

U33

T34

SDQ_A47

SDQ_B26

AG27

AF27

MDQ_A50

MDQ_A49

T32

K34

SDQ_A48

SDQ_A49

SDQ_A50

SDQ_B27

SDQ_B28

SDQ_B29

AJ26

AJ27

MDQ_A51

MDQ_A52

K32

T31

SDQ_A51

SDQ_A52

SDQ_B30

SDQ_B31

AD25

AF28

MDQ_A54

MDQ_A53

P34

L34

SDQ_A53

SDQ_A54

SDQ_B32

SDQ_B33

AE30

AC27

MDQ_A56

MDQ_A55

L33

J33

SDQ_A55

SDQ_A56

SDQ_B34

SDQ_B35

AC30

Y29

MDQ_A58

MDQ_A57

H34

E33

SDQ_A57

SDQ_A58

SDQ_B36

SDQ_B37

AE31

AB29

MDQ_A59

F33

AA26

MDQ_A1

MDQ_A0

AP10

U8B

D D

MCS_A#011
MCS_A#111

MRAS_A#11
MCAS_A#11

MWE_A#11

MA_A[0..12]11

C C

MBA_A011
MBA_A111

MDQM_A[0..7]11

MDQS_A[0..7]11

MCLK_A011

MCLK_A#011

MCLK_A111

MCLK_A#111

MCLK_A211

B B

MCLK_A#211

0.01u_X7RC209

0.01u_X7RC181

0.01u_X7RC202

0.1uC83

C87 1u

AA34

SCS_A0#

Y31

SCS_A1#

Y32

SCS_A2#

W34

SCS_A3#

AC33

SRAS_A#

Y34

SCAS_A#

AB34

SWE_A#

MA_A0

AJ34
AL33
AK29
AN31
AL30
AL26
AL28
AN25
AP26
AP24

AJ33
AN23
AN21

AL34

AM34

AP32
AP31

AM26

AE33
AH34

AP12
AP16

AM24

AP30
AF31

AN11
AP15
AP23

AM30

AF34

AK32
AK31

AP17
AN17

AK33
AK34

AM16

AL16

W33
M34

M32

AK9
AN9

H32

V34
H31

N33
N34

P31
P32

AL9
E34

SMAA_A0
SMAA_A1
SMAA_A2
SMAA_A3
SMAA_A4
SMAA_A5
SMAA_A6
SMAA_A7
SMAA_A8
SMAA_A9
SMAA_A10
SMAA_A11
SMAA_A12

SMAB_A1
SMAB_A2
SMAB_A3
SMAB_A4
SMAB_A5

SBA_A0
SBA_A1

SDM_A0
SDM_A1
SDM_A2
SDM_A3
SDM_A4
SDM_A5
SDM_A6
SDM_A7

SDQS_A0
SDQS_A1
SDQS_A2
SDQS_A3
SDQS_A4
SDQS_A5
SDQS_A6
SDQS_A7

SMDCLK_A0
SMDCLK_A0#

SMDCLK_A1
SMDCLK_A1#

SMDCLK_A2
SMDCLK_A2#

SMDCLK_A3
SMDCLK_A3#

SMDCLK_A4
SMDCLK_A4#

SMDCLK_A5
SMDCLK_A5#

SMXRCOMP
SMXCOMPVOH

SMXCOMPVOL
SMVREF_A

MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11 MA_B12
MA_A12

MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7

MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7

XRCOMP
XCOMPH

XCOMPL
XVREF

AP11

SDQ_A0

E35

MDQ_A62

MDQ_A61

MDQ_A60

K31

J34

SDQ_A59

SDQ_A60

SDQ_A61

SDQ_B38

SDQ_B39

SDQ_B40

AA27

AA30

MDQ_A63

G34

F34

SDQ_A62

SDQ_A63

SDQ_B41

SDQ_B42

W30

U27

MCKE_A1

MCKE_A0

AL20

SCKE_A0

SDQ_B43

SDQ_B44

T25

AA31

AN19

AM20

SCKE_A1

SCKE_A2

SDQ_B45

SDQ_B46

V29

U25

C95 474P
C86 224P

VCC_DDR

A A

C180

XCOMPH

0.01u_X7R

5

C146 224P
C160 0.1u

C203 X_1u
R259 42.2RST
R258 42.2RST

R161 42.2RST
R153 42.2RST

VCC_DDR_C2
VCC_DDR_C3

values still need verification

VCC_DDR VCC_DDR

AA35AA33

VCC_DDR

MDQ_B[0..63]12

C214 X_1u
R247 30.1KST
R246 10KST

C210 1u
R224 10KST
R225 30.1KST

MDQ_B0

MDQ_B10

YCOMPLXCOMPLXRCOMP

R33

YCOMPHXCOMPHYRCOMP VCC_DDR_C3

VCC_DDR

4

R34

MDQ_B11

MDQ_B12

MDQ_B14

MDQ_B13

MDQ_B15

R131 30.1KST
R141 10KST

R146 10KST
R143 30.1KST

MDQ_B17

MDQ_B19

MDQ_B22

MDQ_B16

MDQ_B18

MDQ_B21

MDQ_B20

MDQ_B29

MDQ_B27

MDQ_B26

MDQ_B25

MDQ_B23

MDQ_B24

MDQ_B28

VCC_DDR_C2

R35

YCOMPH

MDQ_B36

MDQ_B33

MDQ_B30

MDQ_B32

MDQ_B34

MDQ_B35

MDQ_B31

C99

0.01u_X7R

3

MDQ_B38

MDQ_B39

MDQ_B37

VCCA_DDR

0.1u

MDQ_B43

MDQ_B44

MDQ_B42

MDQ_B45

MDQ_B41

MDQ_B40

MDQ_B46

C132

+

MDQ_B9

MDQ_B8

MDQ_B4

MDQ_B5

MDQ_B3

MDQ_B6

MDQ_B7

MDQ_B1

MDQ_B2

AP20

AB25

AC25

SCKE_A3

VCCA_DDR

VCCA_DDR

SDQ_B47

SDQ_B48

SDQ_B49

SDQ_B50

R27

P29

R30

K28

MDQ_B49

MDQ_B48

MDQ_B47

MDQ_B50

EC43

X_10U/16V/S

VCCA_DDR

AC26

AL35

VCCA_DDR

VCCA_DDR

SDQ_B51

SDQ_B52

SDQ_B53

L30

R31

R26

MDQ_B53

MDQ_B52

MDQ_B51

AN4

AM3

VCC_DDR

VCC_DDR

SDQ_B54

SDQ_B55

P25

L32

MDQ_B56

MDQ_B55

MDQ_B54

0.1uC119

AN5

AM5

AM6

VCC_DDR

VCC_DDR

SDQ_B56

SDQ_B57

K30

H29

F32

MDQ_B58

MDQ_B57

VCC_DDR

AM7

AM8

AN2

VCC_DDR

VCC_DDR

VCC_DDR

SDQ_B58

SDQ_B59

SDQ_B60

G33

N25

M25

MDQ_B59

MDQ_B60

MDQ_B61

VCC_AGP

AN6

AN7

VCC_DDR

VCC_DDR

VCC_DDR

SDQ_B61

SDQ_B62

SDQ_B63

J29

G32

MDQ_B63

MDQ_B62

P3P6P8

N35

N32

VSS

VSS

SCKE_B0

SCKE_B1

AK19

AF19

AG19

MCKE_B0

MCKE_B1

SCS_B0#

VSS

VSS

VSS

SCS_B1#
SCS_B2#
SCS_B3#

SRAS_B#
SCAS_B#

SWE_B#

SMAA_B0
SMAA_B1
SMAA_B2
SMAA_B3
SMAA_B4
SMAA_B5
SMAA_B6
SMAA_B7
SMAA_B8

SMAA_B9
SMAA_B10
SMAA_B11
SMAA_B12

SMAB_B1

SMAB_B2

SMAB_B3

SMAB_B4

SMAB_B5

SBA_B0
SBA_B1

SDM_B0
SDM_B1
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_B6
SDM_B7

SDQS_B0

SDQS_B1

SDQS_B2

SDQS_B3

SDQS_B4

SDQS_B5

SDQS_B6

SDQS_B7

SCMDCLK_B0

SCMDCLK_B0#

SCMDCLK_B1

SCMDCLK_B1#

SCMDCLK_B2

SCMDCLK_B2#

SCMDCLK_B3

SCMDCLK_B3#

SCMDCLK_B4

SCMDCLK_B4#

SCMDCLK_B5

SCMDCLK_B5#

SMYRCOMP

SMYCOMPVOH

SMYCOMPVOL

SMVREF_B

SCKE_B2

SCKE_B3

Intel Springdale-N

AE18

{Priority}

2

Its current is 5.1A.

U26
T29
V25
W25

W26
W31

W27
AG31

AJ31
AD27
AE24
AK27
AG25
AL25
AF21
AL23
AJ22
AF29
AL21
AJ20

AE27
AD26
AL29
AL27
AE23

Y25
AA25

AG11
AG15
AE21
AJ28
AC31
U31
M29
J31

AF15
AG13
AG21
AH27
AD29
U30
L27
J30

AG29
AG30

AF17
AG17

N27
N26

AJ30
AH29

AK15
AL15

N31
N30

AA33
R34

R33
AP9

MCKE_B[0..1] 12

MA_B0
MA_B1
MA_B2
MA_B3
MA_B4
MA_B5
MA_B6
MA_B7
MA_B8
MA_B9
MA_B10
MA_B11

MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7

MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7

YRCOMP
YCOMPH

YCOMPL

YVREF

MCS_B#0 12
MCS_B#1 12

MRAS_B# 12
MCAS_B# 12

MWE_B# 12

MA_B[0..12] 12

MBA_B0 12
MBA_B1 12

MDQM_B[0..7] 12

MDQS_B[0..7] 12

MCLK_B0 12
MCLK_B#0 12

MCLK_B1 12
MCLK_B#1 12

MCLK_B2 12
MCLK_B#2 12

0.01u_X7RC109

0.01u_X7RC103

0.01u_X7RC92

0.1uC172

C213 X_1u
R266 150RST
R263 150RST
C212 1u

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

VCC_DDR

Micro Star Restricted Secret

Intel Springdale - Memory

MS-7088

Last Revision Date:

Tuesday, June 15, 2004

Sheet

1

Rev

0A

930

of