MSI MS-7085 Schematic 0B
1
2
3
4
5
MS-7085
Title
A A
B B
COVER SHEET
BLOCK DIAGRAM
Intel LGA775
Intel Grantsdale
ICH6
ICS954119 Gen. & FWH
LPC I/O - LPC47M287
AC97 ADI1981A
RTL8101L
DDR DIMM 1 & 2
DDR Termination Resistors
USB CONNECTORS and PS2
PCI Slot 20
SATA1,2 , IDE1& Fan control 21
ATX ,Front Panel, VGA
VRM10.1 Intersil 6565 3Phase
MS7 ACPI Controller
Misc
Version 0B
Page
1
2
3 , 4 , 5
6 , 7 , 8 , 9
10,11,12
13
14
15
16
17
18
19
22
23
24
25
CPU:
Intel LGA775 CPU
System Chipset:
Intel 915GV (North Bridge)
Intel ICH6 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
AC'97 Codec -- ADI1981B
LPC Super I/O -- SMSC LPC47M287
LAN -- Realtek 8101L
CLOCK -- ICS954119
Main Memory:
DDR 1 * 2 (Max 2GB)
Expansion Slots:
PCI configuration and GPIO 26
C C
change note 27
PCI SLOT * 1
Intersil PWM:
Controller: HIP6565 3 Phase
Driver: HIP6602B * 1 + HIP6601B * 1
PCI Routing Table
PCI Device
D D
PCI Slot 1
RTL8101L LAN
1
AD16 1 A
INTERRUPTIDSEL REQ/GNT
F3AD29
Engineer
1
Shun Min Hsu
Drawn by
Shun Min Hsu
0B
272004/09/03
MICRO-STAR INt ' L CO., LTD.
Title
COVER SHEET
Size Project Name Rev
A3
2
3
4
Date: Sheet of
MS-7085
5
1
2
3
4
5
VRM 10.1
A A
Intersil 6565
Intel LGA775 Processor
Block Diagram
3-Phase PWM
FSB 133/200MHz Core Clock
Analog
Video
Intel 915GV
Out
B B
UltraDMA
33/66/100
DMI
64bit DDR
133/166/200MHz
IDE Primary
SATA
SATA 0~1
USB
ICH6
2 DDR 1
DIMM
Modules
PCI Slot
PCI
USB Port 0~7
RTL8101L
AC'97
33MHz@16.5MB/s
LPC Bus
LAN
ADI1981B
C C
LPC SIO
LPC47M287
Flash
Keyboard
Floopy Parallel Serial
FAN control
Mouse
D D
Engineer
2
Shun Min Hsu
Drawn by
Shun Min Hsu
0B
272004/09/03
MICRO-STAR INt ' L CO., LTD.
Title
BLOCK DIAGRAM
Size Project Name Rev
A3
1
2
3
4
Date: Sheet of
MS-7085
5
1
A A
U1A
TP21
H_PWRGD4,10
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
LL_ID0
H_BSL04,8,13
H_BSL14,8,13
H_BSL24,8,13
H_DBI#[0..3]6
H_EDRDY#6
H_IERR#4
H_FERR#4,10
H_STPCLK#10
H_INIT#10
H_DBSY#6
H_DRDY#6
H_TRDY#6
B B
VTT_OUT_RIGHT
C C
D D
1
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
H_DEFER#6
RN11B 62-8P4R
3 4
RN8A 62-8P4R
1 2
RN11A 62-8P4R
1 2
RN8C 62-8P4R
5 6
RN11D 62-8P4R
7 8
CPU_TMPA14
VTIN_GND14
TRMTRIP#4,10
H_PROCHOT#4,11
H_IGNNE#10
ICH_H_SMI#10
H_SLP#10
TP18
H_CPURST#4,6
H_D#[0..63]6
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
2
CPU SIGNAL BLOCK
H_A#[3..31]6
AD6
A22#
D35#
G18
H_A#21
AA4
E16
H_D#34
H_A#20
A21#
D34#
E15
H_D#33
H_A#19
H_A#17
H_A#18
AB6
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
D31#
F15
G16
G15
H_D#32
H_D#30
H_D#31
H_A#16
H_A#14
H_A#12
H_A#13
H_A#15
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D30#
D29#
D28#
D27#
D26#
F14
E13
D13
G14
G13
H_D#28
H_D#25
H_D#26
H_D#27
H_D#29
H_A#11
D25#
F12
H_D#24
D24#
H_A#25
AF4
F20
H_A#27
AF5
A28#
D41#
E19
H_D#40
H_A#26
AB4
A27#
D40#
E18
H_D#39
AC5
A26#
D39#
F18
H_D#38
H_A#24
A25#
D38#
H_D#37
AB5
F17
H_A#23
AA5
A24#
D37#
G17
H_D#36
H_A#22
A23#
D36#
H_D#35
H_A#30
H_A#31
H_A#29
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
A35#
A34#
A33#
A32#
A31#
A30#
A29#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
B15
A14
C14
C15
D17
H_D#53
H_D#49
H_D#52
H_D#50
H_D#51
2
F21
E22
D20
H_D#48
E21
D22
G22
G21
H_D#42
H_D#41 H_A#28
H_D#43
H_D#47
H_D#44
H_D#45
H_D#46
H_A#10
H_A#8
H_A#7
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
F11
E10
D10
H_D#23
H_D#20
H_D#21
H_D#22
3
H_A#6
H_A#4
H_A#5
H_A#3
L5
AC2
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
C12
H_D#17
H_D#16
H_D#18
H_D#19
H_D#14
H_D#15
3
DBR#
D14#
B12
H_D#13
AN3
D13#
H_D#12
AN4
RSVD
D12#D8D11#
C11
H_D#11
C627 X-0805-C
C628
X-0805-C
AN6
AJ3
AK3
AN5
RSVD
ITP_CLK1
ITP_CLK0
VSS_SENSE
VCC_SENSE
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
H_D#10
H_D#8
H_D#9
H_D#7
H_D#6
H_D#5
H_D#4
AM7
AM5
VID7#
H_D#3
VID5
VID3
VID4
AL4
AK4
AL6
VID6#
VID5#
VID4#
VID_SELECT
GTLREF_SEL
LINT1/NMI
LINT0/INTR
B4
H_D#0
H_D#2
H_D#1
R514 0-0603
R515 0-0603
VID0
VID2
VID1
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
RSVD
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
ZIF-SOCK775-15u
VID[0..5] 23
VID_SELECT
AN7
CPU_GTLREF
H1
H2
GTLREF_SEL
H29
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
H_PCREQ#
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
RSVD_AK6
AK6
RSVD_G6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
U3
U2
F3
T2
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
4
VCC_VRM_SENSE 23
VSS_VRM_SENSE 23
TP11
CPU_GTLREF 4
RN5A 62-8P4R
RN8B 62-8P4R
RN8D 62-8P4R
RN11C 62-8P4R
RN5B 62-8P4R
RN5C 62-8P4R
R70 62-0603
RN23A 62-8P4R
RN23B 62-8P4R
RN23D 62-8P4R
RN23C 62-8P4R
TP1
TP2
R69 X-0603-R
R77 X-0603-R
R72 100RST
R82 100RST
R71 60.4RST
R131 60.4RST
PLACE RESISTORS OUTSIDE SOCKET
TP5
CAVITY IF NO ROOM FOR VARIABLE
TP6
RESISTOR DON'T PLACE
TP3
TP4
4
GTLREF_SEL 6
12
34
78
56
34
56
H_PCREQ# 6
H_REQ#4 6
H_REQ#3 6
H_REQ#2 6
H_REQ#1 6
H_REQ#0 6
1 2
3 4
7 8
5 6
R123 62-0603
R68 62-0603
R124 62-0603
R58 X-0603-R
R79 X-0603-R
CK_H_CPU# 13
CK_H_CPU 13H_A20M#10
H_RS#[0..2] 6
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 10
H_INTR 10
5
RN2
680-8P4R
VID3
1
VID1
3
VID2
5
VID4
7
VID0
R55 680-0603
VID5
R52 680-0603
VTT_OUT_RIGHT
R433
X-0603-R
GTLREF_SEL
Q57
X-2N7002S
VTT_OUT_LEFT
V_FSB_VTT 4,6,8,12,24,25
VTT_OUT_RIGHT 4
H_BR#0 4,6
VTT_OUT_LEFT 4
C63
X-0603-C
MICRO-STAR INt ' L CO., LTD.
Title
Intel LGA775 Signals
Size Project Name Rev
A3
Date: Sheet of
MS-7085
2
4
6
8
VTT_OUT_RIGHT
0.1u-0603
VCC3
DS
G
5
C33
R434
X-0603-R
H_TESTHI0
R435
X-0603-R
3
C37
X-0603-C
Engineer
Shun Min Hsu
Drawn by
Shun Min Hsu
272004/09/03
0B
1
2
3
4
5
VCCP
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U1B
VCCP
A A
B B
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y25
Y26
Y27
Y28
Y29
Y30
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
Y23
Y24
W28
W29
W30
W27
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W23
W24
W25
W26
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
U25
U26
U27
U28
U29
U30
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U24
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
RSVD
VCC-IOPLL
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
U23
T30
N30
N29
N28
N27
N26
N25
N24
N23
M30
M29
M28
M27
M26
M25
M24
M23
K26
K27
K28
K29
K30
T23
T24
T25
T26
T27
T28
T29
J30
K23
K24
K25
AN8
AN9
HS11HS22HS33HS4
4
AN25
AN26
AN29
AN30
H_VCCA
A23
H_VSSA
B23
D23
H_VCCIOPLL
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
ZIF-SOCK775-15u
VTT_SEL
V_FSB_VTT
CAPS FOR FSB GENERIC
V_FSB_VTT
R130 X-0603-R
0
1
C148 10u-0805
C118 10u-0805
C99 X-1206-C
VCC3
TEJ/PSC
RSVD
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
GTLREF VOLTAGE SHOULD BE
C C
VTT_OUT_LEFT CPU_GTLREF
0.67*VTT = 0.8V
R76
100RST
C60
0.1u-0603
CPU_GTLREF 3
C56
X-0603-C
V_FSB_VTT
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT3
VTT_OUT_LEFT3
D D
VTT_OUT_RIGHT
VTT_OUT_LEFT
R57 62-0603
R56 120RST
R75 100-0603
R87 62-0603
R133 62-0603
H_CPURST#
H_PROCHOT#
H_PWRGD
H_BR#0
H_IERR#
H_CPURST# 3,6
H_PROCHOT# 3,11
H_PWRGD 3,10
H_BR#0 3,6
H_IERR# 3V_FSB_VTT3,6,8,12,24,25
PLACE AT ICH END OF ROUTE
V_FSB_VTT3,6,8,12,24,25
V_FSB_VTT
1
R272 62-0603
R273 62-0603
H_FERR#
TRMTRIP# 3,10
H_FERR# 3,10
2
V_FSB_VTTTRMTRIP#
L56 10uH-0805-100mA
C95
10u-0805R78 49.9RST
C96
VTT_OUT_LEFT
R44
1K-0603
1
3
5
7
X-0805-C
R45
10K-0603
R60
680-0603
Q13
2N3904S
2
4
6
8
H_BSL1 3 , 8 ,13
H_BSL2 3 , 8 ,13
H_BSL0 3 , 8 ,13
L57
X-0805-L
VCC5_SB
VID_GD#23,24
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
3
RN31 470-8P4R
H_VCCIOPLL
H_VSSA
H_VCCA
1.25V VTT_PW RGOOD
VTT_PWG
4
Engineer
4
Shun Min Hsu
Drawn by
Shun Min Hsu
of
272004/09/03
MICRO-STAR INt ' L CO., LTD.
Title
Intel LGA775 Power
Size Project Name Rev
A3
Date: Sheet
MS-7085
5
0B
1
A A
TP7
TP8 TP10
AC4
AE3
AE4
U1C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
B B
C C
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D14
RSVD
RSVD
RSVD
RSVDD1RSVD
VSS
VSS
VSS
VSS
VSS
AE5
AE7
AF10
AF13
AE29
AE30
VSS
E23
RSVD
VSS
AF16
E24
RSVD
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
AF17
AF20
TP9
F23
B13
RSVDF6RSVD
VSS
VSS
VSS
VSS
VSS
VSS
AF23
AF24
AF25
AF26
AF27
AF28
RSVDJ3RSVDN4RSVDP5RSVDV1RSVDW1RSVD
VSS
VSS
VSS
VSS
VSS
AF3
AF6
AF7
AF29
AF30
2
VSS
VSS
AG10
AG13
Y3
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
VSS
VSS
AG16
AG17
AG20
AG23
3
V30
V29
V28
V27
V26
V25
V24
V23
VSSV3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AG7
AH10
AH13
AG24
AH3
AH6
AH7
AJ10
AJ13
AJ16
AH16
AH17
AH20
AH23
AH24
AJ17
VSS
R30
R29
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AK2
AK10
AK13
AK16
AK17
AK20
AK23
AK5
AK7
AL10
AL13
AK24
AK27
AK28
AK29
AL16
AK30
VSS
L30
L29
L28
L27
L26
L25
VSSL3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL3
AL7
AL17
AL20
AL23
AM1
AL24
AL27
AL28
AM10
AM13
AM16
VSS
VSS
4
HS8
1
2
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
K2
L24
L23
K5
VSS
VSS
VSSK7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM17
AM4
AM20
AM23
AM24
AM27
AM28
H28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN1
AN2
AN10
AN13
AN16
AN17
AN20
AN23
AN24
AN27
AN28
VSSB1VSS
B11
VSS
B14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ZIF-SOCK775-15u
1
2
CPU_HS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
3
3
4
4
5
D D
Engineer
5
Shun Min Hsu
Drawn by
Shun Min Hsu
0B
272004/09/03
MICRO-STAR INt ' L CO., LTD.
Title
Intel LGA775 GND
Size Project Name Rev
A3
1
2
3
4
Date: Sheet of
MS-7085
5
1
AC11
AB11
Y20
Y19
Y17
H29
K29
J29
G30
G32
K30
L29
M30
L31
L28
J28
K27
K33
M28
R29
L26
N26
M26
N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29
J31
N27
E31
R33
E30
M35
L33
M31
F33
E32
H31
G31
F31
L34
N35
J35
N34
L35
M32
P33
K34
P34
J32
M23
M22
AG7
G24
AF7
M14
B23
D24
A23
A24
HXSCOMP
U12A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
HDRCOMP
HDSCOMP
HDSWING
HDVREF
H_A#[3..31]3
A A
H_ADSTB#03
H_ADSTB#13
H_REQ#[0..4]3
H_RS#[0..2]3
R181
20RST
H_PCREQ#3
H_BR#03,4
H_BPRI#3
H_BNR#3
H_LOCK#3
H_ADS#3
CK_H_MCH#13
H_CPURST#3,4
PLTRST#10,13,24
ICH_SYNC#11
R271
8.2K-0603
R171
60.4RST
1
H_HIT#3
H_HITM#3
H_DEFER#3
H_TRDY#3
H_DBSY#3
H_DRDY#3
H_EDRDY#3
CK_H_MCH13
PWRGD11,24
B B
C C
V_2P5_MCH
D D
V_FSB_VTT3,4,8,12,24,25
H_A#3 H_D#0
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
ICH_SYNC#
HXRCOMP
HXSCOMP
HXSWING
MCH_GTLREF
ICH_SYNC#
C162
X-0603-C
Y16
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
AJ21
AL21
AK21
AK24
GTLREF_SEL3
2
W20
W16
U20
U16
T20
T19
T17
T16
AA13
AA14
AA16
AA18
AA20
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
V31
V30
V32
Y30
U30
VCCP
R31
AB29
R437
X-0603-R
AJ24
AJ23
AJ18
AJ20
AL20
AK18
+12V
R436
X-0603-R
When install this circuit,must
change R169 to 100R,R162 to 210R.
2
AA21
R30
AA22
VCCNCTF
VCCNCTF
RSVRD
RSVRD
AA31
AA23
AA24
AB13
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AA30
AC12
AC13
V_FSB_VTT
X-2N7002S
D S
G
V_1P5_CORE
AB14
AB15
AB16
AB17
AB18
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
AC14
AC15
AC16
AC17
AC18
3
AB19
AB20
AB21
AB22
AB23
AB24
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
NC
NC
NC
NC
NC
T12
P12NCP23NCP24
N12NCN22NCN23NCN24
AC19
AC20
AC21
AC22
R169
49.9RSTQ58
MCH_GTLREF
R162
100RST
R12NCR24
U12
GTLREF VOLTAGE SHOULD BE
0.67*VTT=0.8V
100 OHM OVER 210 RESISTORS
C153
0.1u-0603
CAPS SHOULD BE PLACED NEAR MCH PIN
3
P17
V12
P19
VCCNCTF
NC
W12
P21
P22
VCCNCTF
VCCNCTF
NC
NC
Y12
AA12NCAB12
C159
X-0603-C
4
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
V24
W13
W14
W22
W24
Y13
Y14
Y15
Y21
Y23
Y24
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
J12
AC23NCAC24NCAN19
L19NCL12
P30
K12
AG6
AJ14
AL28
AH24
AD30
H17NCH15NCH12
V_FSB_VTT
G12
F24NCF12
E16
C16
AP1
AR2NCAR1
AP35
AR35NCAR34
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R177
301RST
R178
100RST
NC
NC
B35
4
NCB1NC
A34
NC
A2
HD_STBN3#
Intel Grantsdale
C169
0.01u-0603
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HXSWING
J33
H_D#1
H33
H_D#2
J34
H_D#3
G35
H_D#4
H35
H_D#5
G34
H_D#6
F34
H_D#7
G33
H_D#8
D34
H_D#9
C33
H_D#10
D33
H_D#11
B34
H_D#12
C34
H_D#13
B33
H_D#14
C32
H_D#15
B32
H_D#16
E28
H_D#17
C30
H_D#18
D29
H_D#19
H28
H_D#20
G29
H_D#21
J27
H_D#22
F28
H_D#23
F27
H_D#24
E27
H_D#25
E25
H_D#26
G25
H_D#27
J25
H_D#28
K25
H_D#29
L25
H_D#30
L23
H_D#31
K23
H_D#32
J22
H_D#33
J24
H_D#34
K22
H_D#35
J21
H_D#36
M21
H_D#37
H23
H_D#38
M19
H_D#39
K21
H_D#40
H20
H_D#41
H19
H_D#42
M18
H_D#43
K18
H_D#44
K17
H_D#45
G18
H_D#46
H18
H_D#47
F17
H_D#48
A25
H_D#49
C27
H_D#50
C31
H_D#51
B30
H_D#52
B31
H_D#53
A31
H_D#54
B27
H_D#55
A29
H_D#56
C28
H_D#57
A28
H_D#58
C25
H_D#59
C26
H_D#60
D27
H_D#61
A27
H_D#62
E24
H_D#63
B25
H_DBI#0
E34
H_DBI#1
J26
H_DBI#2
K19
H_DBI#3
B26
E33
E35
H26
F26
J19
F19
B29
C29
H_DSTBP#0 3
H_DSTBN#0 3
H_DSTBP#1 3
H_DSTBN#1 3
H_DSTBP#2 3
H_DSTBN#2 3
H_DSTBP#3 3
H_DSTBN#3 3
MICRO-STAR INt ' L CO., LTD.
Title
Intel 915GV CPU
Size Project Name Rev
A3
Date: Sheet of
MS-7085
5
H_D#[0..63] 3
H_DBI#[0..3] 3
5
6
Engineer
Shun Min Hsu
Drawn by
Shun Min Hsu
0B
272004/09/03
1
DATA_A[0..63]17,18
A A
MAA_A[0..13]17,18
B B
DQS_A[0..7]17,18
C C
D D
SCS_A#017,18
SCS_A#117,18
RAS_A#17,18
CAS_A#17,18
P_DDR0_A17
N_DDR0_A17
P_DDR1_A17
N_DDR1_A17
P_DDR2_A17
N_DDR2_A17
PLACE 0.1UF CAP CLOSE TO MCH
1
SCS_A#0
SCS_A#1
RAS_A#
CAS_A#
WE_A#17,18
SBS_A017,18
SBS_A117,18
SM_XSLEWIN
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
SBS_A0
SBS_A1
DQS_A0
DQS_A1
DQS_A2
DQS_A3
DQS_A4
DQS_A5
DQS_A6
DQS_A7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
MCH_VREF_A
SMPCOMP_P
SMPCOMP_N
MCH_VREF_A
SMPCOMP_P MCH_VREF_A
AM34
AL35
AK34
AL33
AN29
AL34
AP31
AN22
AP22
AN21
AP21
AM21
AP19
AR20
AN16
AN18
AM15
AN23
AP15
AP13
AB33
AP33
AR24
AR28
AR29
AN28
AP26
AR23
AG1
AG2
AR7
AF17
AG17
AM30
AL29
AG35
AG33
AA34
AA35
AM24
AN25
AN2
AN3
AB34
AC33
AP25
AN26
AM2
AM3
AC35
AC34
AN31
AH15
AE16
AJ12
AK12
AG8
AG4
C313
0.1u-0603
VCC_DDR
AL3
AL2
AP7
U34
U35
AE7
AE5
AF5
DATA_B[0..63]17,18
R253 80.6RSTR255 80.6RST
C277
0.1u-0603
U12B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
RSV
RSV
RSV
RSV
SABA0
SABA1
RSV
SADQS0
RSV
SADQS1
RSV
SADQS2
RSV
SADQS3
RSV
SADQS4
RSV
SADQS5
RSV
SADQS6
RSV
SADQS7
RSV
SACK0
SACK0#
SACK1
SACK1#
SACK2
SACK2#
SACK3
SACK3#
SACK4
SACK4#
SACK5
SACK5#
RSV
RSV_TP1
RSV_TP0
SMXSLEWIN
SMXSLEWOUT
SMVREF0
SRCOMP1
SRCOMP0
RSV
RSV
DATA_A1
DATA_A0
AE3
AF3
SADQ0
SADQ1
2
DATA_A3
DATA_A4
DATA_A2
DATA_A5
AH2
AJ2
AE2
AE1
SADQ2
SADQ3
SADQ4
SADQ5
SBDQ0
SBDQ1
SBDQ2
SBDQ3
AJ6
AL5
AH7
AN6
DATA_B3
DATA_B0
DATA_B2
DATA_B1
SMPCOMP_N
2
3
DATA_A7
DATA_A8
DATA_A6
AG3
AH3
SADQ6
SADQ7
SBDQ4
SBDQ5
AH4
AG9
DATA_B4
DATA_B5
DATA_B6
AJ1
AM5
SADQ8
SBDQ6
DATA_A9
AK2
SADQ9
SBDQ7
AL6
DATA_B7
DATA_A10
DATA_A11
AN4
AP4
SADQ10
SADQ11
SBDQ8
SBDQ9
AJ7
AL7
DATA_B9
DATA_B8
DATA_A12
DATA_A13
AJ3
AK3
SADQ12
SADQ13
SBDQ10
SBDQ11
AF11
AE11
DATA_B11
DATA_B10
VCC_DDR
DATA_A14
DATA_A15
DATA_A17
DATA_A16
AP2
AP3
AP5
AR5
SADQ14
SADQ15
SADQ16
SBDQ12
SBDQ13
SBDQ14
AJ8
AL8
AG10
AG11
DATA_B12
DATA_B13
DATA_B15
DATA_B14
R252 1KST
DATA_A18
AN8
SADQ17
SADQ18
SBDQ15
SBDQ16
AE13
DATA_B16
DATA_A19
DATA_A20
AP9
SADQ19
SBDQ17
AF13
DATA_B18
DATA_B17
DATA_A21
AN5
SADQ20
SBDQ18
AG14
DATA_B19
DATA_A22
AP6
SADQ21
SBDQ19
AD14
DATA_B20
DATA_A23
AR8
SADQ22
SBDQ20
AD12
DATA_B21
DATA_A24
AN9
SADQ23
SBDQ21
AH12
DATA_B22
DATA_A25
AK16
SADQ24
SBDQ22
AF14
DATA_B23
DATA_A26
AL17
SADQ25
SBDQ23
AD15
DATA_B24
DATA_A27
AD17
SADQ26
SBDQ24
AD18
DATA_B25
R257
DATA_A28
AF19
SADQ27
SBDQ25
AK19
DATA_B26
1KST
DATA_A34
DATA_A32
DATA_A33
DATA_A30
DATA_A31
DATA_A29
AF16
SADQ28
SBDQ26
AE22
DATA_B27
DATA_A35
AJ17
AE19
AH18
AH27
AK27
AN30
AK31
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
AL18
AF22
AF23
AH21
AF25
AH19
AD21
DATA_B29
DATA_B32
DATA_B31
DATA_B28
DATA_B33
DATA_B30
CP11 X_COPPER
R251 X-0603-R
DATA_A36
AL27
SADQ35
SADQ36
SBDQ33
SBDQ34
AL25
DATA_B34
DATA_A38
DATA_A37
AJ28
AL30
SADQ37
SADQ38
SBDQ35
SBDQ36
AJ26
AD23
DATA_B35
DATA_B36
3
DATA_A40
DATA_A42
DATA_A41
DATA_A39
AL31
AJ34
AH35
AG32
SADQ39
SADQ40
SADQ41
SBDQ37
SBDQ38
SBDQ39
AJ25
AJ29
AL26
AF24
DATA_B37
DATA_B38
DATA_B39
DATA_B40
MCH_VREF_B
DATA_A43
AF34
SADQ42
SADQ43
SBDQ40
SBDQ41
AJ31
DATA_B41
DATA_A44
DATA_A45
AJ33
AH33
SADQ44
SADQ45
SBDQ42
SBDQ43
AG30
AG31
DATA_B43
DATA_B42
DATA_A47
DATA_A46
AF33
AE33
SADQ46
SADQ47
SBDQ44
SBDQ45
AK33
AK32
DATA_B44
DATA_B45
DATA_A48
DATA_A49
AE35
AE34
SADQ48
SADQ49
SBDQ46
SBDQ47
AF28
AG27
DATA_B47
DATA_B46
DATA_A51
DATA_A50
Y33
W34
SADQ50
SADQ51
SBDQ48
SBDQ49
AF27
AE31
DATA_B48
DATA_B49
DQM_A[0..7]17,18
DATA_A53
DATA_A52
AD31
AD35
SADQ52
SADQ53
SBDQ50
SBDQ51
AB27
AB26
DATA_B51
DATA_B50
SCKE_A117,18
SCKE_A017,18
DATA_A54
DATA_A55
AA32
Y35
SADQ54
SADQ55
SBDQ52
SBDQ53
AE29
AE27
DATA_B53
DATA_B52
DQM_B[0..7]17,18
DATA_A57
DATA_A56
V34
V33
SADQ56
SADQ57
SBDQ54
SBDQ55
AC28
AC26
DATA_B55
DATA_B54
SCKE_B017,18
SCKE_B117,18
DATA_A59
DATA_A58
R32
R34
SADQ58
SADQ59
SBDQ56
SBDQ57
W29
AA29
DATA_B56
DATA_B57
DATA_A61
DATA_A60
W35
W33
SADQ60
SADQ61
SBDQ58
SBDQ59
V29
U26
DATA_B58
DATA_B59
DATA_A62
DATA_A63
T33
T35
SADQ62
SADQ63
SBDQ60
SBDQ61
Y26
AA28
DATA_B60
DATA_B61
W26
DATA_B62
SCKE_A0
SCKE_A1
AL12
AN11
SACKE0
SACKE1
SBDQ62
SBDQ63
V28
DATA_B63
AP11
AR11
SACKE2
SACKE3
SBCKE0
SBCKE1
AM9
AP10
AN10
SCKE_B0
SCKE_B1
SBCKE2
4
DQM_A6
DQM_A2
DQM_A4
DQM_A1
DQM_A0
AF2
SADM0
SBCKE3
AR9
DQM_A7
DQM_A3
DQM_A5
AL1
AN7
AH16
AK29
AG34
AA33
U33
SBCS0#
SBCS1#
SADM4
SADM5
SADM6
SBCS2#
SADM7
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
RSV
RSV
RSV
RSV
SBBA0
SBBA1
RSV
SBDQS0
RSV
SBDQS1
RSV
SBDQS2
RSV
SBDQS3
RSV
SBDQS4
RSV
SBDQS5
RSV
SBDQS6
RSV
SBDQS7
RSV
SBCK0
SBCK0#
SBCK1
SBCK1#
SBCK2
SBCK2#
SBCK3
SBCK3#
SBCK4
SBCK4#
SBCK5
SBCK5#
RSV
RSV_TP3
RSV_TP2
SMYSLEWIN
SMYSLEWOUT
SADM1
SADM2
SADM3
SMVREF1
SBDM0
SBDM1
SBDM2
SBDM3
SBDM4
SBDM5
SBDM6
SBDM7
AJ5
AH9
AH13
AG20
DQM_B3
DQM_B1
DQM_B2
DQM_B0
Intel Grantsdale
W31
AH31
AD24
AG24
DQM_B5
DQM_B6
DQM_B7
DQM_B4
SCS_B#0
AP34
SCS_B#1
AN34
AN33
AM33
RAS_B#
AP27
CAS_B#
AN27
WE_B#
AR27
MAA_B0
AM18
MAA_B1
AP18
MAA_B2
AN17
MAA_B3
AR16
MAA_B4
AR15
MAA_B5
AN15
MAA_B6
AP17
MAA_B7
AL15
MAA_B8
AP14
MAA_B9
AN13
MAA_B10
AN20
MAA_B11
AR12
MAA_B12
AM12
MAA_B13MAA_A13
AD32
AN32
AP29
AP30
AP32
SBS_B0
AM27
SBS_B1
AR19
AP23
DQS_B0
AK5
AL4
DQS_B1
AK10
AH10
DQS_B2
AK13
AL14
DQS_B3
AD20
AF20
DQS_B4
AH25
AG26
DQS_B5
AH28
AH30
DQS_B6
AB31
AC30
DQS_B7
W27
Y28
P_DDR0_B
AH22
N_DDR0_B
AG23
P_DDR1_B
AL11
N_DDR1_B
AJ11
P_DDR2_B
AE26
N_DDR2_B
AE25
AL23
AK22
AK9
AL9
AD29
AD28
AL24
AK15
AN14
SM_YSLEWIN
AF9
AE10
MCH_VREF_B
AE8
PLACE 0.1UF CAP CLOSE TO MCH
SBS_B0 17,18
SBS_B1 17,18
P_DDR0_B 17
N_DDR0_B 17
P_DDR1_B 17
N_DDR1_B 17
P_DDR2_B 17
N_DDR2_B 17
MICRO-STAR INt ' L CO., LTD.
Title
Intel 915GV Memory
Size Project Name Rev
A3
4
Date: Sheet of
MS-7085
5
SCS_B#0 17,18
SCS_B#1 17,18
RAS_B# 17,18
CAS_B# 17,18
WE_B# 17,18
MAA_B[0..13] 17,18
DQS_B[0.. 7] 17,18
C266
0.1u-0603
5
7
Engineer
Shun Min Hsu
Drawn by
Shun Min Hsu
0B
272004/09/03
1
V_1P5_CORE
C629 0.1u-0603
A A
B B
For EMI request
V_1P5_CORE
C C
VCC_DDR
C85
X-0603-C
D D
C630 0.1u-0603
C631 1u-0603
C632 1u-0603
C633 X-0603-C
C634 X-0603-C
V_1P5_CORE
V_2P5_MCH
V_FSB_VTT3,4,6,12,24,25
X-0805-C
C232
X-0805-C
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
MTYPE
EXP_SLR
VCCA_MPLL
C200
VCCA_DPLLB
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLB
VCCA_GPLL
C171
10u-0805
C231
0.1u-0603
DMI_ITP_MRP_010
DMI_ITN_MRN_010
DMI_ITP_MRP_110
DMI_ITN_MRN_110
DMI_ITP_MRP_210
DMI_ITN_MRN_210
DMI_ITP_MRP_310
DMI_ITN_MRN_310
CK_PE_100M_MCH13
CK_PE_100M_MCH#13
H_BSL0 BSEL0
H_BSL03,4,13 VGA_RED 22
H_BSL1 BSEL1
R194 10K-0603
H_BSL2 BSEL2
R205 10K-0603
R200 X-0603-R
R195 X-0603-R
V_2P5_DAC_FILTERED22
C189 X-0603-C
C174 X-0603-C
C67
X-0603-C
H_BSL13,4,13
H_BSL23,4,13
V_FSB_VTT
C44
0.1u-0603
FSB GENERIC DECOUPLING
CP6
X_COPPER
V_1P5_CORE
V_1P5_CORE V_1P5_CORE
L9 X-0805-L
CP8
X_COPPER
L11 X-0805-L
1
C212
X-0603-C
U12C
E11
EXPARXP0
F11
EXPARXN0
J11
EXPARXP1
H11
EXPARXN1
F9
EXPARXP2
E9
EXPARXN2
F7
EXPARXP3
E7
EXPARXN3
B3
EXPARXP4
B4
EXPARXN4
D5
EXPARXP5
E5
EXPARXN5
G6
EXPARXP6
G5
EXPARXN6
H8
EXPARXP7
H7
EXPARXN7
J6
EXPARXP8
J5
EXPARXN8
K8
EXPARXP9
K7
EXPARXN9
L6
EXPARXP10
L5
EXPARXN10
P10
EXPARXP11
R10
EXPARXN11
M8
EXPARXP12
M7
EXPARXN12
N6
EXPARXP13
N5
EXPARXN13
P7
EXPARXP14
P8
EXPARXN14
R6
EXPARXP15
R5
EXPARXN15
U5
DMI RXP0
U6
DMI RXN0
T9
DMI RXP1
T8
DMI RXN1
V7
DMI RXP2
V8
DMI RXN2
V10
DMI RXP3
U10
DMI RXN3
A11
GCLKINP
B11
GCLKINN
K13
SDVOCTRLDATA
J13
SDVOCTRLCLK
H16
BSEL0
E15
BSEL1
D17
BSEL2
M16
RSV
F15
RSV
C15
MTYPE
A16
EXP_SLR
B15
RSV
C14
RSV
K15
RSV
L10
VCC
M10
VSS
A17
VCCAHPLL
B17
VCCAMPLL
A12
VCCADPLLA
B13
VCCADPLLB
A14
VCCA3GPLL
A13
VCCHV
E13
VCCACRTDAC
D13
VCCACRTDAC
F13
VSSACRTDAC
Intel Grantsdale
V_FSB_VTT
C192
0.1u-0603
V_1P5_CORE V_1P5_CORE
C204
0.1u-0603
V_1P5_CORE
AD10
AD9
AD8
VCC
VCC
VTT
H22
G22
C188
0.1u-0603
X_COPPER
L13 X-0805-L
X_COPPER
L8 X-0805-L
VCC
VTT
AD7
G21
CP9
CP5
VCC
VTT
AD6
F22
2
VCC
VTT
2
AD5
F21
VCC
VTT
AD4
F20
VCC
VTT
AD3
E22
VCC
VTT
AD2
E21
VCC
VTT
AD1
E20
VCC
VTT
AC10
VCC
VTT
E19
AC9
D22
AC8
VCC
VTT
D21
AC7
AC6
VCC
VCC
VCC
VTT
VTT
VTT
D20
D19
VCCA_DPLLA
C241
X-0805-C
VCCA_HPLL
C194
X-0805-C
AC5
C22
VCC
VTT
AC4
C21
VCC
VTT
AC3
C20
VCC
VTT
AC2
C19
VCC
VTT
AC1
B22
AB10
VCC
VTT
B21
AB9
AB8
VCC
VCC
VTT
VTT
B20
B19
C242
0.1u-0603
C197
0.1u-0603
AB7
VCC
VTT
A22
VCC
VTT
AB6
VCC
VTT
A21
AB5
AB4
AB3
VCC
VCC
VCC
VTT
VTT
A20
A19
V_1P5_CORE
AB2
AB1
VCC
AC25
W18
V19
VCC
VCC
VCC
VSSNCTF
VSSNCTF
VSSNCTF
AB25
AA25
VCC_DDR
AR33
V17
U18
VCC
VCC
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
Y25
Y18
Y11
W25
AA11
L10
10uH-0805-100mA
L14 X-0805-L
3
AR31
AR26
AR22
AR18
AR14
AR10
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
V25
V20
V16
V11
U25
W11
CP7 X_COPPER
R204
CP12
X_COPPER
3
AP28
AP24
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
T25
U11
X-0603-R
C276
C314
AP20
AP16
AP12
AN35
AM32
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
T18
T11
P25
R25
R11
C223
X-0805-C
V_1P5_PCIEXPRESS
AM28
AM26
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
P11
N25
VCCA_GPLL
AM25
AM23
AM22
VCCSM
VCCSM
VSSNCTF
VSSNCTF
N11
M11
AD25
1u-0603
X-0805-C
AM20
AM19
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
AA15
AA17
AM17
AM16
AM14
VCCSM
VCCSM
VSSNCTF
VSSNCTF
N17
N19
AA19
C225
0.1u-0603
AM13
AM11
AM10
AK35
VCC3GW1VCC3GW2VCC3GW3VCC3GW4VCC3GW6VCC3GW7VCC3GW8VCC3GW9VCC3GY1VCC3GY2VCC3GY3VCC3GY4VCC3GY5VCC3GY6VCC3GY7VCC3GY8VCC3G
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
T22
P16
P18
P20
R17
V_2P5_MCH
V22
R19
R21
U15
U21
U23
L12 0 . 1uH-0603
C489
X-1206-C
W15
VSSNCTF
VSSNCTF
VSSNCTF
W21
W23
4
VSSNCTF
Y22
10u-0805
4
Y9
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXPACOMPO
EXPACOMPI
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CTRBLUEB
CRTDDCDATA
CRTDDCCLK
DREFCLKINP
DREFCLKINN
CRTIREF
PMEXTTS
PMBMBUSY#
TESTIN#
MCHDETECT
V_2P5_DAC_FILTERED
C240
V_1P5_PCIEXPRESS
C10
C9
A9
A8
C8
C7
A7
A6
C6
C5
C2
D2
E3
F3
F1
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
DMI_MTP_IRP_0
R3
DMI_MTN_IRN_0
T3
DMI_MTP_IRP_1
T1
DMI_MTN_IRN_1
U1
DMI_MTP_IRP_2
U3
DMI_MTN_IRN_2
V3
DMI_MTP_IRP_3
V5
DMI_MTN_IRN_3
W5
Y10
W10
E12
D12
F14
D14
H14
G14
E14
J14
L14
M15
CK_96M_DREF
M13
CK_96M_DREF#
M12
DACREFSET
A15
EXTTSVCCA_DPLLA
K16
G16
R35
A35
C239
0.1u-0603
5
V_1P5_CORE
C317
DMI_MTP_IRP_0 10
DMI_MTN_IRN_0 10
DMI_MTP_IRP_1 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_2 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_3 10
R249
24.9RST
MCH_DDC_DATA
MCH_DDC_CLK
R206 255RST
R219 10K-0603
DMI_MTN_IRN_3 10
HSYNC
VSYNC
L24 0-0603R189 10K-0603
L25 0-0603
L26 0-0603
MCH_DDC_DATA 22
MCH_DDC_CLK 22
CK_96M_DREF 13
CK_96M_DREF# 13
V_2P5_MCH
HSYNC 22
VSYNC 22
GRCOMP V_1P5_PCIEXPRESS
R516 39.2RST
R517 39.2RST
F_VGA_RED
F_VGA_GREEN
F_VGA_BLUE
BSEL
2
1
0
0 133 MHZ (533)
C222
0.01u-0603
C315
VCC_DDR
C132 10u-0805
C131 10u-0805
C161 X-0805-C
VCC_DDR
C136 10u-0805
C219 X-0805-C
C193 10u-0805
MCH MEMORY DEC O UPLING
X-0603-CC482
X-0603-CC483
X-0603-CC484
TABLE
0
PSB FREQUENCY
1
01 200 MHZ (800)0
10u-0805
VGA_GREEN 22
VGA_BLUE 22
MICRO-STAR INt'L CO., LTD.
Title
Intel 915GV VGA
Size Project Name Re v
Custom
Date: Sheet
MS-7085
5
8
X-0805-C
Engineer
Shun Min Hsu
Drawn by
Shun Min Hsu
of
0B
272004/09/03
1
AR30
AR25
AR21
AR17
AR13
AR6
AR3
AP8
AN1
AM31
AM29
AM8
AM7
AM6
AM4
AL32
AL22
AL19
AL16
AL13
AL10
AK30
AK28
AK26
VSS
VSS
VSS
H10
VSS
H13
VSS
VSS
H21
VSS
VSS
AK25
VSS
VSS
H24
A10
A18
A26
A30
A33
B10
B12
B14
B16
B18
B24
B28
C11
C13
C17
C18
C23
C35
D10
D11
D15
D16
D18
D23
D25
D26
D28
D30
D31
D32
E10
E17
E18
E23
E26
E29
F10
F16
F18
F23
F25
F29
F30
F32
F35
U12D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G23
G26
VSS
VSS
G27
VSS
VSS
VSSH2VSSH4VSSH5VSSH6VSSH9VSS
G28
A3
VSS
A5
VSS
VSS
VSS
VSS
VSS
VSS
B2
VSS
B5
VSS
B6
VSS
B7
VSS
B8
VSS
B9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C1
VSS
C3
VSS
C4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D3
VSS
D4
VSS
D6
VSS
D7
VSS
D8
VSS
D9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E1
VSS
E2
VSS
E4
VSS
E6
VSS
E8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F2
VSS
F4
VSS
F5
VSS
F6
VSS
F8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSG2VSSG4VSSG7VSSG8VSSG9VSS
G10
G11
VSS
G13
VSS
G15
VSS
G17
VSS
G19
VSS
VSS
G20
A A
B B
C C
AK23
H25
VSS
VSS
AK20
VSS
VSS
H27
AK17
H30
VSS
VSS
AK14
VSS
VSS
H32
2
AK11
AK8
AK7
AK6
VSS
VSS
VSS
VSS
VSS
VSSJ2VSSJ4VSSJ7VSSJ8VSSJ9VSS
H34
AK4
VSS
AK1
VSS
3
AJ35
AJ32
AJ30
AJ27
AJ22
AJ19
AJ16
AJ15
AJ13
AJ10
AJ9
AJ4
AH34
AH32
AH29
AH26
AH23
AH20
AH17
AH14
AH11
AH8
AH6
AH5
AH1
AG29
AG28
AG25
AG22
AG21
AG19
AG18
AG16
AG15
AG13
AG12
AG5
AF35
AF32
AF31
AF30
AF29
AF26
AF21
AF18
AF15
AF12
AF10
AF8
AF6
AF4
AF1
AE32
AE30
AE28
AE24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSK2VSSK4VSSK5VSSK6VSSK9VSS
J10
J15
J16
J17
J18
J20
J23
J30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSL2VSSL4VSSL7VSSL8VSSL9VSS
K10
K11
K14
K20
K24
K26
K28
K31
K32
K35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSM2VSSM4VSSM5VSSM6VSSM9VSS
L11
L13
L15
L16
L17
L18
L20
L21
L22
L24
L27
L30
L32
M17
M20
VSS
M24
VSS
VSS
M25
M27
VSS
VSS
M29
VSS
VSSN2VSSN4VSSN7VSSN8VSSN9VSS
M34
VSS
4
AE23
AE21
AE20
AE18
AE17
AE15
AE14
AE12
AE9
AE6
AE4
AD34
AD27
AD26
AD22
AD19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD16
VSS
AD13
VSS
AD11
VSS
AC32
VSS
AC31
VSS
AC29
VSS
AC27
VSS
AB35
VSS
AB32
VSS
AB30
VSS
AB28
VSS
AA27
VSS
AA26
VSS
AA10
VSS
AA9
VSS
AA8
VSS
AA7
VSS
AA6
VSS
AA5
VSS
AA4
VSS
AA3
VSS
AA2
VSS
AA1
VSS
Y34
VSS
Y32
VSS
Y31
VSS
Y29
VSS
Y27
VSS
W32
VSS
W30
VSS
W28
VSS
W19
VSS
W17
VSS
V35
VSS
V27
VSS
V26
VSS
V18
VSS
V9
VSS
V6
VSS
V4
VSS
V2
VSS
V1
VSS
U32
VSS
U31
VSS
U29
VSS
U27
VSS
U19
VSS
U17
VSS
U9
VSS
U8
VSS
U7
VSS
U4
VSS
U2
VSS
T34
VSS
T32
VSS
T30
VSS
T28
VSS
T10
VSS
T7
VSS
T6
VSS
T5
VSS
T4
VSS
T2
VSS
R27
VSS
R26
VSS
R9
VSS
R8
VSS
R7
VSS
R4
VSS
R2
VSS
P35
VSS
P32
VSS
VSS
VSS
VSS
N10
N28
N30
VSSP2VSSP4VSSP5VSSP6VSSP9VSS
N32
VSS
P27
P29
P31
VSS
Intel Grantsdale
U12_X1
5
X5
MCH
X6
X7
X8
Heatsink
Grantsdale_heatsink
X1
X2
X3
X4
D D
Engineer
9
Shun Min Hsu
Drawn by
Shun Min Hsu
0B
272004/09/03
U12_41
HS-HOOK-L
U12_42
HS-HOOK-L
1
U12_43
HS-HOOK-L
U12_44
HS-HOOK-L
Title
Intel 915GV GND
Size Project Name Rev
A3
2
3
4
Date: Sheet of
MS-7085
5
MICRO-STAR INt ' L CO., LTD.
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