8
7
6
5
4
3
2
1
MS-6787 Ver : 10D
Cover Sheet
Block Diagram
VIA P4M266A + VT8235 Chipset
D D
CPU:
P4 Socket 478
CLOCK GEN
Intel CPU Sockets 478
VIA VT8751A P4M266A North Bridge
DDR1,2 SLOT
System Chipset:
VIA P4M266A + VT8235
On Board Chipset:
C C
LPC Super I/O -- W83697HF
Lan : Via PHY VT6103
DDR TERMINATOR
AGP SLOT
VIA VT8235CD South Bridge 12 - 14
LPC I/O(W83697HF)
KB / MS / LPT / COM Port / FAN Connector
AMR & ROM & Screw hole
Expansion Slots:
AGP 3.0 Slot * 1
PCI 1,2,3 SLOTS
IDE & VGA Connector
1
2
3
4 - 5
6 - 8
9
10
11
15
16
17
18
19
DDR Slot * 2
PCI 2.2 Slot * 3
CNR Slot * 1
USB Connector
AC97 Audio CODEC & Connector
20
21
LAN VT6103 & Connector
B B
MS5 ACPI Controller & , Regulators
VRM9.0 INTERSIL HIP6302
Front Panel & ATX power Com & thermal protection
HISTORY
ORCAD Config. MODEL Config. ERP Number Function
MS6787 STD
A A
8
7
STD cfg6787-LAN
Option
STD
6
601-6787-020
5
MSI
Title
Size Document Number Rev
4
3
Date: Sheet of
2
Micro-Star
Cover Sheet
MS-6787
22
23
24
25
26
1 27 Tuesday, February 17, 2004
1
10B1
Block Diagram
VRM
AGP / ADD
Slot
AGPCLK 66MHZ
AGP BUS
INT & PWR-MNG
P4 478-Pin Processor
CTRL
ADDR
ADDR
AGTL+ BUS
VCORE
CTRL
DATA
DATA
VT8751 (P4M266A)
1
14.318MHZ
CPUCLK, CPUCLK# 100/133MHZ
NBHCLK, NBHCLK# 100/133MHZ
NBCLK66 66MHZ
GUICLK 14.318MHZ
DCLK_OUT 133MHZ
DCLK_FB 133MHZ
MDCLK0 ~ MDCLK5 133MHZ
MDCLK#0~MDCLK#5
X'TEL
ICS950910
Clock
Generator
AGPCLK 66MHZ
VLCLK66 66MHZ
SBPCLK 33MHZ
SIOPCLK 33MHZ
PCICLK1,2,3 33MHZ
LAN_PCLK 33MHZ
SIO_48M 48MHZ
USBCLK 48MHZ
SB14MHZ 14.318MHZ
APICCLK 14.318MHZ
VGA
VGA BUS
Connector
IDE Primary
A A
UltraDMA 66/100
IDE Secondary
INT & PWR-MNG
AC'97 Link / LAN / EEPROM
AMR Slot
BGA 664 Pin
VDDQ 1.5V VDIMM 2.5V
VCC2_5
V- LINK BUS
VT8235 CD
VCC3SBY 3.3V
VCC25SBY 2.5V
VCC3 3.3V
VCC2_5 2.5V
DDR BUS
PCICLK1,2,3 33MHZ
VLCLK66 66MHZ
SBPCLK 33MHZ
USBCLK 48MHZ
SB14MHZ 14.318MHZ
APICCLK 14.318MHZ
PCI BUS
MII Bus
ISA BUS
Onboard
AC'97 Codec
USB 6 PORT
LPC SIO
W83697HF
SIOPCLK 33MHZ
SIO_48M 48MHZ
DDR1
DDR2
PCI Slot 1
PCI Slot 2
VT6103
LAN Chip
Flash ROM
BIOS
PCI Slot 3
LAN Port
Audio port
USB Port 5
USB Port 6
USB Port 3
USB Port 4
USB Port 1
USB Port 2
Mouse Floopy Parallel
Keyboard
Serial1,2
1
Game Port
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Block Diagram
MS-6787
2 27 Tuesday, February 03, 2004
10B1
5
VCC3
CB20
X_104P
CP9 X_COPPER
FB10 X_80_0805
FB7
X_80_0805
CP6
X_COPPER
CB8
X_104P
VCC3
R184
4.7K
R97
220
R199 10K
Q29
2N3904S
SMBDATA1 9,13,17,23
FB8 X_80_0805
CP8
X_COPPER
CB12
X_104P
VCC3V
CB17
X_104P
VCC2.5A
CB11
X_104P
VTTGD#
CB14
X_104P
SMBCLK1
SMBDATA1
VCC2.5B
SMBCLK1 9,13,17,23
DCLK_OUT 7 DCLK_FB 7
CB5
104P
CB13
104P
CB23
104P
CB10
104P
CB24
104P
CB16
X_104P
CB21
104P
CB7
104P
CB6
104P
filtering from 10K~1M
VCC2_5
D D
VCORE
C C
VCC2_5
B B
4
U16
51
CPU_VDD3.3
54
CPU_GND3.3
50
CPU_VDD2.5
47
CPU_GND2.5
16
PCI_VDD
13
PCI_GND
22
48_VDD
19
48_GND
55
REF_VDD
2
REF_GND
23
CORE_VDD
24
CORE_GND
27
SCLK
28
SDATA
34
DDR/SDR_VDD
33
DDR/SDR_GND
40
DDR/SDR_VDD
39
DDR/SDR_GND
45 46
BUF_IN FB_OUT
ICS950910
CPUCLK
CPUCLK#
CPUCLKCS
CPUCLKCS#
Mode/AGP0 3V66_VDD
SEL_CK408/K7/AGP1
PCISTOP#/AGP2 3V66_GND
FS1/PCI_F
SEL_SDR/DDR#/PCI1
MULTSEL/PCI2
PCI3
PCI4
PCI5
CLKSTOP#/PCI6
FS3/48MHz
FS2/24_48MHz
FS0/REF0
VTT_GD#/REF1
IREF
PD#/RESET#
DDR0/SDR0
DDR#0/SDR1
DDR1/SDR2
DDR#1/SDR3
DDR2/SDR4
DDR#2/SDR5
DDR3/SDR6
DDR#3/SDR7
DDR4/SDR8
DDR#4/SDR9
DDR5/SDR10
DDR#5/SDR11
X1
X2
53
52
48
49
6 5
7
8 9
10
11
12
14
15
17
18
20
21
1
56
3
4
25
26
44
43
42
41
38
37
36
35
32
31
30
29
R210 27.4RST
R204 27.4RST
R206 27.4RST
R205 27.4RST
MODE
R266 33
SEL_CK408
R267 33
R253 33
FS1
R280 33
SEL_SDR/DDR
MULT
FS3
VTTGD# GUICLK
X1
X2
DCLK4
DCLK#4
DCLK1
DCLK#1
DCLK5
DCLK#5
DCLK2
DCLK#2
DCLK0
DCLK#0
DCLK#3
R257 10K
7 8
RN86
5 6
3 4
1 2
8P4R-33
R273 47
R276 47
R251 22
R249 22
R191 33
X2 14M-32pf-HC49S-D
R275 475RST
R262 33
1 2
3 4
5 6
7 8
RN67 X_8P4R-10
1 2
3 4
5 6
7 8
RN68 X_8P4R-10
1 2
3 4
5 6
7 8
RN69 X_8P4R-10
R207 33
3
CPUCLK
CPUCLK#
NBHCLK
NBHCLK#
NBCLK66
AGPCLK
VLCLK66
SBPCLK
SIOPCLK
PCICLK1
PCICLK2
PCICLK3
USBCLK
SIO_48M FS2
SB14MHZ
APICCLK FS0
22P C241
22P C239
FP_RST# 23,25
MDCLK4
MDCLK#4
MDCLK1
MDCLK#1
MDCLK5
MDCLK#5
MDCLK2
MDCLK#2
MDCLK0
MDCLK#0
MDCLK3
MDCLK#3
DCLK_FB
CPUCLK 4
CPUCLK# 4
NBHCLK 6
NBHCLK# 6
NBCLK66 8
AGPCLK 11
VLCLK66 12
SBPCLK 12
SIOPCLK 15
PCICLK1 18
PCICLK2 18
PCICLK3 18
USBCLK 14
SIO_48M 15
SB14MHZ 13
APICCLK 12
GUICLK 6
MDCLK4 9
MDCLK#4 9
MDCLK1 9
MDCLK#1 9
MDCLK5 9
MDCLK#5 9
MDCLK2 9
MDCLK#2 9
MDCLK0 9
MDCLK#0 9
MDCLK3 9
MDCLK#3 9
7774
7774
8533
8534
4939.17
3570.36
7477.03
1888.27
5494.28
4879.14
4812.54
4804.1
1002.89
5668.7
2758.67
2758.25
7616.74
6585.86
6571.65
6572.72
6558.81
6534.08
6559.35
6530.34
6538.01
6526.65
6527.7
6517.22
6523.13
8504.56 4709.51
2
1
Pull-Down Capacitors
CPUCLK
CPUCLK#
NBHCLK
NBHCLK#
NBCLK66
AGPCLK
VLCLK66
SBPCLK
SIOPCLK
PCICLK1
PCICLK2
PCICLK3
USBCLK
SIO_48M
SB14MHZ
GUICLK
APICCLK
MDCLK4
MDCLK#4
MDCLK1
MDCLK#1
MDCLK5
MDCLK#5
MDCLK2
MDCLK#2
MDCLK0
MDCLK#0
MDCLK3 DCLK3
MDCLK#3
DCLK_FB
used only for EMI issue
X_10p C225
X_10p C226
X_10p C210
X_10p C219
X_10p C254
X_10p C255
X_10p C252
X_10p C258
7
8
CN14
5
6
X_8P4C-10P
3
4
1
2
X_10P C256
X_10P C170
X_10P C251
X_10P C224
X_10P C248
CN11 X_8P4C-10P
1
2
3
4
5
6
7
8
CN12 X_8P4C-10P
1
2
3
4
5
6
7
8
CN13 X_8P4C-10P
1
2
3
4
5
6
7
8
X_10P C220
Trace less 0.2"
MDCLK4 DCLK4
Shut Source Termination Resistors
CPUCLK
R192 49.9RST
CPUCLK#
R193 49.9RST
Trace less 0.2"
A A
49.9ohm for 50ohm M/B impedance
5
CLOCK STRAPPING RESISTORS
FS3
FS2
FS1
R268 10K
FS0
R250 10K
1 1 0 1
1 1 1 0
1 1 1 1
MODE
SEL_CK408
4
R259 10K
R260 10K
R274 X_10K
R271 10K
R252 10K
FSB (MHz) FS3 FS2 FS1 FS0
100 MHz 1 1 0 0
133 MHz
200 MHz
166 MHz
VCC3V
VCC3V
BSEL1 4
BSEL0 4,13
R254 10K
R272 X_10K
5.00mA 1.0V
221 0
VCC3V MULT
Ioh Iref Rr MULT
4*Iref
Voh
2.32mA 0.7V 6*Iref 475 1
3
2
DCLK1 MDCLK1
DCLK#1 MDCLK#1
DCLK2 MDCLK2
DCLK3 MDCLK3
MSI
Title
Size Document Number Rev
Date: Sheet of
MDCLK#4 DCLK#4
MDCLK5 DCLK5
MDCLK#5 DCLK#5
MDCLK#2 DCLK#2
MDCLK0 DCLK0
MDCLK#0 DCLK#0
MDCLK#3 DCLK#3
Micro-Star
Clock Generator
MS-6787
1
3 27 Monday, February 09, 2004
10B1
5
4
3
2
1
VIDPWRGD DC Specifications
VIL
CPU SIGNAL BLOCK
VID3
AE2
VID3#
D4#
C21
HD#4
VID2
AE3
VID2#
D3#
A25
HD#3
VID1
AE4
A23
HD#2
CPUVID_GD 24
VID[0..5] 24
VID0
AE5
VID1#
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
PGA-S478-GD10-A10
B22
B21
{Priority}
HD#1
HD#0
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
TESTHI12
TESTHI10
TESTHI7
TESTHI0
HRS#2
HRS#1
HRS#0
COMP1
COMP0
HADSTB#1
HADSTB#0
HDSTB3
HDSTB2
HDSTB1
HDSTB0
HDSTB#3
HDSTB#2
HDSTB#1
HDSTB#0
NMI
INTR
BREQ#0
GTLREF1
C84 220p_X7R
R68 62
R390 62
R45 62
R391 62
R392 62
R67 62
R73 62
HRS#[0..2]
R34 51.1 1%
R76 51.1 1%
HREQ#[0..4]
CPUCLK# 3
CPUCLK 3
BREQ#0 6
HADSTB#1 6
HADSTB#0 6
HDSTB3 6
HDSTB2 6
HDSTB1 6
HDSTB0 6
HDSTB#3 6
HDSTB#2 6
HDSTB#1 6
HDSTB#0 6
NMI 12
INTR 12
HREQ#[0..4] 6
VCORE
HRS#[0..2] 6
CPU1A
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AE21
RESERVED2
AF24
RESERVED3
AF25
RESERVED4
AD1
BOOTSELECT
AE26
OPTIMIZED/COMPAT#
AD6
BSEL0
AD5
BSEL1
AB23
PWRGOOD
AB25
RESET#
AA24
D63#
AA22
D62#
AA25
D61#
Y21
D60#
Y24
D59#
Y23
D58#
W25
D57#
Y26
D56#
W26
D55#
V24
D54#
HA#[3..33]
HA#22
HA#23
A23#
D38#
N26
HD#38
HD#37
M26
HA#21
A22#
D37#
N23
HD#36
HA#20
A21#
D36#
M24
HD#35
HA#19
A20#
D35#
P21
HD#34
HA#18
A19#
D34#
N22
HD#33
HA#17
A18#
D33#
M23
HD#32
HA#16
A17#
D32#
H25
HD#31
HA#15
A16#
D31#
K23
HD#30
HA#14
A15#
D30#
J24
HD#29
HA#13
A14#
D29#
L22
HD#28
HA#12
A13#
D28#
M21
HD#27
A12#
D27#
HA#25
HA#27
HA#30
HA#26
HA#29
A30#
D45#
T25
T26
HD#45
HD#44
HA#28
A29#
D44#
R24
HD#43
A28#
D43#
R25
HD#42
A27#
D42#
P24
HD#41
A26#
A25#
D41#
D40#
R21
HD#40
HA#24
A24#
D39#
N25
HD#39
HA#31
HA#32
HA#33
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
V22
U21
V25
U23
U24
U26
T23
T22
HD#50
HD#52
HD#53
HD#47
HD#49
HD#51
HD#48
HD#46
HA#11
HA#10
A11#
D26#
H24
G26
HD#26
HD#25
HA#9
A10#
D25#
L21
HD#24
HA#8
A9#
D24#
D26
HD#23
HA#7
A8#
D23#
F26
HD#22
HA#6
A7#
D22#
E25
HD#21
HA#5
A6#
D21#
F24
HD#20
HA#4
A5#
D20#
F23
HD#19
HA#3
A4#
D19#
G23
HD#18
A3#
D18#
E24
HD#17
D17#
H22
HD#16
AE25A5A4
DBR#
D16#
D15#
D14#
D25
J21
HD#15
HD#14
AD26
VSS_SENSE
VCC_SENSE
D13#
D12#
D11#
D23
C26
H21
G22
HD#12
HD#10
HD#13
HD#11
AC26
AD2
ITP_CLK1
ITP_CLK0
D10#
D9#
D8#
B25
C24
C23
HD#7
HD#8
HD#9
VID4
VID5
AE1
AD3
VID4#
VID5#
VIDPWRGD
D7#
D6#
D5#
B24
D22
HD#6
HD#5
HA#[3..33] 6
D D
HDBI#0
HDBI#0 6
HDBI#1
HDBI#1 6
HDBI#2
HDBI#2 6
HDBI#3
HDBI#3 6
STPCLK# 12
CPUINIT# 12
HDBSY# 6
HDRDY# 6
HTRDY# 6
BSEL0 3,13
BSEL1 3
PWRGD_CPU 23
CPURST# 6
HD#[0..63]
HLOCK# 6
HBPRI# 6
HDEFER# 6
CPU_TMPA 15
VTIN_GND 15
THERMTRIP# 25
IGNNE# 12
C C
B B
A A
HD#[0..63] 6
FERR# 12
HADS# 6
HBNR# 6
HIT# 6
HITM# 6
SMI# 12
A20M# 12
SLP# 12
R393 X_0
R394 60.4 1%
IERR#
FERR#
STPCLK#
CPUINIT#
HDBSY#
HDRDY#
HTRDY#
HADS#
HLOCK#
HBNR#
HIT#
HITM#
HBPRI#
HDEFER#
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
THERMTRIP#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
PWRGD_CPU
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
VIH
It must rout to the enable pin of PWM and CK-409.
VIDGD to Vccp delay time is from 1ms to 10ms.
VIDGD rising time is 150ns.
CPU GTL REFERNCE VOLTAGE BLOCK
GTLREF1
BREQ#0 6
CPURST# 6
FERR# 12
VCORE
Min Max Typ
0.9
2/3*Vccp
C104 C101
X_220P
105P
VCORE
0.3
R72
49.9RST
R74
100RST
CPU ITP BLOCK
ITP_TDI
ITP_TRST#
ITP_TMS
ITP_TDO
ITP_TCK
PROCHOT#
PWRGD_CPU
BREQ#0
CPURST#
THERMTRIP#
IERR#
STPCLK#
SMI#
SLP#
CPUINIT#
INTR
NMI
A20M#
IGNNE#
CPU STRAPPING RESISTORS
7 8
5 6
3 4
1 2
8P4R-51
RN108
R46 150
R31 680
R28 39
R29 X_75
R32 27
R30 62
R77 300
R41 51
R71 51
R49 62
R27 62
R44 150
RA1
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
150
BPM#2
BPM#0
BPM#5
BPM#1
BPM#3
BPM#4
5
10
VCORE
VCORE
VCORE
VCORE
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
Micro-Star
CPU Socket 478 part1
MS-6787
1
4 27 Monday, February 09, 2004
10B1
5
4
3
2
1
E20E8F11
VCC
VCC
VSS
VSS
VCC
VSS
C39
105P
VCC
VSS
G21G6G24
Near processor
F13
F15
F17
VCC
VCC
VCC
VSS
VSS
VSS
G3H1H23
1.2V 150mA
C44
X_104P
F19
AF4
F9
VCC
VCC
VCC-VID
VSS
VSS
VSS
VSS
H26H4J2
AD20
AF3
VCC-VIDPRG
VSS
VSS
VSS
J22
J25J5K21
AE23
VCCA
VSSA
VCC-IOPLL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PGA-S478-GD10-A10
{Priority}
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
It support DC current if 100mA.
CPU_IOPLL
C95
105P
C98
C94
X_22u/1206
105P
VSSA
The ESL is less than 5nH, and the ESR is less than 0.3ohm.
L3 10uH-1206-100mA
L4 10uH-1206-100mA
DC voltage drop should
be less than 70mV.
C97
10U/1206
VCORE
VCC_VID 23,24
VCC_VID
CPU VOLTAGE BLOCK
VID Voltage is from 1.14V to 1.32V.
D D
VCORE
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
VCC
VSS
AF19
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
C15
C17C2C19
C22
C25C5C7C9D12
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
C C
B B
AA19
AA23
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
VSS
VSS
VSS
VSS
AA4
VSS
AA7
VSS
AA9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB3
VSS
AB6
VSS
AB8
VSS
VSS
VSS
VSS
VSS
VSS
AC2
VSS
VSS
VSS
AC5
VSS
AC7
VSS
AC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
VSS
AF6
AF8
B10
B12
B14
B16
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B18
B23
B20
B26B4B8
C11
C13
It is derived from 3.3V.
It should be able to source 150mA.
It drives the power logic of BSEL[1:0] and VID[5:0].
VID to VIDGD delay time is from 1ms to 10ms.
VID to VIDGD deassertion time is 1ms for max.
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D14
D16
D18
D20
D21D3D24D6D8E1E11
VCC
VSS
VCC
VSS
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
E4
E26
VSS
F12
F14
F16
F18F2F22
F25F5F8
CPU DECOUPLING CAPACITORS
C64
X_10U/1206
C83
X_10U/1206
A A
Place these caps within north side of processor
5
C52
X_10U/1206
C57
10U/1206
C66
X_10U/1206
C73
10U/1206
C76
X_10U/1206
C85
10U/1206
C89
X_10U/1206
C61
10U/1206
C60
10U/1206
C59
10U/1206
C58
10U/1206
VCORE VCORE VCORE VCORE VCORE VCORE
+
C69
C100U2VSP
Place these caps within socket cavity
4
C78
10U/1206
C79
10U/1206
C80
10U/1206
C81
10U/1206
C53
X_10U/1206
C63
X_10U/1206
C71
X_10U/1210
C77
X_10U/1206
C86
X_10U/1206
Place these caps within south side of processor
3
VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE
1
1
SP4
X_SP
1
1
1
SP6
X_SP
10B1
1
1
1
1
1
SP5
X_SP
Title
Size Document Number Rev
2
Date: Sheet of
SP3
X_SP
1
MSI
SP1
X_SP
1
1
1
1
SP8
X_SP
SP2
X_SP
SP7
X_SP
Micro-Star
CPU Socket 478 part2
MS-6787
1
1
5 27 Monday, February 09, 2004
5
U9A VIA-VT8751-BGA664
N29
HA3
R27
HA4
R26
HA5
R29
HA6
N28
HA7
T29
HA8
T27
HA9
V25
HA10
R28
HA11
U28
HA12
U29
HA13
V26
HA14
T28
HA15
U26
HA16
V29
HA17
V28
HA18
V27
HA19
AA28
HA20
AA27
HA21
W28
HA22
AA25
HA23
W29
HA24
W27
HA25
AA26
HA26
AB29
HA27
AA29
HA28
Y29
HA29
Y26
HA30
AB28
HA31
AC27
HA32
AB27
HA33
T25
HADSTB0
Y27
HADSTB1
P25
ADS
M29
BNR
L29
BPRI
L26
BREQ0
K25
DBSY
M27
DEFFER
M28
DRDY
L27
HIT
J25
HITM
L25
HLOCK
M26
HTRDY
R25
HREQ0
P27
HREQ1
N27
HREQ2
P29
HREQ3
P26
HREQ4
K28
RS0
K29
RS1
K27
RS2
G27
DBI0
C25
DBI1
B22
DBI2
D16
DBI3
E14
CPURST
N25
HCLK
M25
HCLK
R24
HAVREF0
V24
HAVREF1
F24
HDVREF0
F22
HDVREF1
F19
HDVREF2
F16
HDVREF3
L24
GTLREF
F25
HRCOMP
G24
HCOMPVREF
GND
B16
HADSTB#0 4
HADSTB#1 4
HDBSY# 4
HDEFER# 4
HDRDY# 4
HLOCK# 4
HTRDY# 4
HREQ#0 4
HREQ#1 4
HREQ#2 4
HREQ#3 4
HREQ#4 4
CPURST# 4
NBHCLK 3
NBHCLK# 3
BC42
X_0.01u (B)
HA#[3..33]
HADS# 4
HBNR# 4
HBPRI# 4
BREQ#0 4
HIT# 4
HITM# 4
HRS#0 4
HRS#1 4
HRS#2 4
HDBI#0 4
HDBI#1 4
HDBI#2 4
HDBI#3 4
HADSTB#0
HADSTB#1
HADS#
HBNR#
HBPRI#
BREQ#0
HDBSY#
HDEFER#
HDRDY#
HIT#
HITM#
HLOCK#
HTRDY#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HDBI#0
HDBI#1
HDBI#2
HDBI#3
CPURST#
NBHCLK
NBHCLK#
GTLVREF1_NB
BC6
0.01u
HRCOMP
HCOMPVREF
BC45
0.01u (B)
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HA#32
HA#33
HA#[3..33] 4 HD#[0..63] 4
R115
49.9_1%
R107
R85
BC46
0.1u (B)
BC51
0.01u (B)
GTLVREF1_NB
R114
100_1%
HCOMPVREF
R106
150 1%
HRCOMP
BC44
0.1u (B)
BC54
0.01u (B)
VCORE
D D
VCORE
301 1%
20.5 1%
C C
B B
4
VCORE
E16
E23
K14
K15
F17
F18
K16
K17
F23
K18
K19
K20
L20
M20
N20
P20
R20
T20
U20
K24
T24
U24
Y25
AA24
AB24
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
E24
E25
E26
G26
H27
H28
D26
D24
D21
C21
C22
D15
D18
D19
C16
K26
GND
B28
C14
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
L28
P28
N26
T26
U25
U27
W26
Y28
AB25
AB26
AC26
AC28
K10
GND
M18
GND
3
HD#[0..63]
HD#0
J28
HD0
HD#1
F29
HD1
HD#2
J27
HD2
HD#3
F26
HD3
HD#4
E28
HD4
HD#5
H25
HD5
HD#6
J26
HD6
HD#7
E29
HD7
HD#8
J29
HD8
HD#9
F27
HD9
HD#10
H29
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
HDSTB0
HDSTB0
HDSTB1
HDSTB1
HDSTB2
HDSTB2
HDSTB3
HDSTB3
VSSTT
VSSTT
GND
GND
GND
N18
P18
R18
GND
GND
GND
F28
E27
D29
G25
H26
A25
D27
A26
B25
C28
D25
A28
B29
D28
C27
C26
A29
C24
B26
D23
C29
A23
B24
E22
A21
A24
D22
C23
B23
A22
C20
E21
B21
A20
B20
B19
A19
A18
B18
C19
C18
E18
E17
D17
B15
A16
E15
A15
C15
D14
A14
A17
B14
G28
G29
A27
B27
D20
E20
C17
B17
P24
E19
T18
U18
V18
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDSTB0
HDSTB#0
HDSTB1
HDSTB#1
HDSTB2
HDSTB#2
HDSTB3
HDSTB#3
HDSTB0 4
HDSTB#0 4
HDSTB1 4
HDSTB#1 4
HDSTB2 4
HDSTB#2 4
HDSTB3 4
HDSTB#3 4
FPD9
FPD10
FPD11
2
VCC2_5
X_60-500mA
CP17 X_COPPER
GND_RGBPLL
VCC2_5
X_60-500mA
CP19 X_COPPER
GND_RGBDAC
+2.5VRGBPLL +2.5VRGBDAC
U9D
C13
FPD0
B13
FPD1
A13
FPD2
D13
FPD3
E13
FPD4
D12
FPD5
C12
FPD6
A12
FPD7
B12
FPD8
E12
FPD9
B11
FPD10
A11
FPD11
E10
GPO0
D11
GPOUT
A10
FPDDET
B10
FPDDEN
D10
FPDHS
C10
FPDVS
E11
FPDCLK
VIA-VT8751-BGA664
DSOCLKI
FPD11
FPD9
FPD10
L12
L13
C7
E7
PLLVDD
PLLVDD
GND
GND
F8
F12
C11
RN49
1 2
3 4
5 6
7 8
4.7K
GND
GND
F13
C6
E6
DACVDD
DACVDD
GND
GND
M13
N13
1
+2.5VRGBPLL
C164
BC8
1000p
BC9
1000p
K11
K12
VCC5
VCC5
GND
GND
GND
GND
P13
R13
T13
U13
K13
V13
VCC5
GND
M14
GND
N14
CP18 X_COPPER
1u
X_60-500mA
C168
1u
CP20 X_COPPER
X_60-500mA
RSET
HSYNC
VSYNC
BISTIN
SPCLK0
SPCLK1
SPD0
SPD1
DSOCLKI
DSOCLKO
PLLGND
PLLGND
DACGND
DACGND
GND
GND
GND
GND
GND
P14
R14
T14
U14
V14
BISTIN
RSET
L11
+2.5VRGBDAC
L14
VCC3
C321
0.1u(B)
B6
AR
A5
AG
B5
AB
A6
B8
A8
A7
XIN
A9
INTA
B9
C9
E9
D9
E8
C8
D8
B7
D7
C5
D6
GND
R118 4.7K
R119 140
RSET
BISTIN
DSOCLKI
CRT_R 19
CRT_G 19
CRT_B 19
HSYNC 19
VSYNC 19
GUICLK 3
INTA# 11,12,18
3VDDCCL 19
3VDDCDA 19
GND_RGBPLL
GND_RGBDAC
VCC3
A A
5
These capacitance must be closed NB
VCORE VCORE
C150
C159
1u/0805
X_1u
4
BC43
X_0.1u (B)
BC57
X_0.1u (B)
BC50
1u (B)
MSI
Title
Size Document Number Rev
3
2
Date: Sheet of
Micro-Star
VT8751A Host & VGA
MS-6787
6 27 Monday, February 09, 2004
1
10B1
5
Y10
Y11
Y12
Y13
Y14
W20
VCCM
GND
AE18
VCCM
GND
AE19
VCCM
GND
AF2
VCCM
GND
AF7
VCCM
GND
AF10
AF13
Y15
VCCM
GND
AF16
VCCM
GND
AC2
GND
AC6
GND
AD6
GND
AE4
GND
W10
VCCM
GND
AE17
NBMD0
NBMD1
NBMD2
NBMD3
NBMD4
NBMD5
CKE[3..0]
NBMD6
NBMD7
NBMD8
NBMD9
NBMD10
NBMD11
NBMD12
NBMD13
NBMD14
NBMD15
NBMD16
NBMD17
NBMD18
NBMD19
NBMD20
NBMD21
NBMD22
NBMD23
NBMD24
NBMD25
NBMD26
NBMD27
NBMD28
NBMD29
NBMD30
NBMD31
NBMD32
NBMD33
NBMD34
NBMD35
NBMD36
NBMD37
NBMD38
NBMD39
NBMD40
NBMD41
NBMD42
NBMD43
NBMD44
NBMD45
NBMD46
NBMD47
NBMD48
NBMD49
NBMD50
NBMD51
NBMD52
NBMD53
NBMD54
NBMD55
NBMD56
NBMD57
NBMD58
NBMD59
NBMD60
NBMD61
NBMD62
NBMD63
NBDQM#0
NBDQM#1
NBDQM#2
NBDQM#3
NBDQM#4
NBDQM#5
NBDQM#6
NBDQM#7
5
CKE0
CKE1
CKE2
CKE3
D D
C C
B B
CKE[3..0] 9
A A
U9B
AC29
MD0
AD27
MD1
AD26
MD2
AG29
MD3
AD29
MD4
AD28
MD5
AE27
MD6
AF29
MD7
AG28
MD8
AG27
MD9
AG25
MD10
AH26
MD11
AH29
MD12
AJ29
MD13
AJ27
MD14
AG26
MD15
AJ25
MD16
AF24
MD17
AF23
MD18
AH23
MD19
AJ26
MD20
AG24
MD21
AG23
MD22
AJ23
MD23
AH21
MD24
AF20
MD25
AJ19
MD26
AG18
MD27
AJ21
MD28
AG20
MD29
AF18
MD30
AH18
MD31
AH11
MD32
AG10
MD33
AG9
MD34
AJ8
MD35
AG11
MD36
AJ10
MD37
AF9
MD38
AG8
MD39
AG6
MD40
AE7
MD41
AG5
MD42
AF5
MD43
AJ6
MD44
AF6
MD45
AJ4
MD46
AJ3
MD47
AH3
MD48
AG4
MD49
AG2
MD50
AF1
MD51
AG3
MD52
AJ2
MD53
AF4
MD54
AG1
MD55
AE3
MD56
AE1
MD57
AD1
MD58
AC5
MD59
AF3
MD60
AE2
MD61
AD2
MD62
AD5
MD63
AF15
MECC0/CKE0
AF14
MECC1/CKE1
AH14
MECC2/CKE2
AG13
MECC3/CKE3
AH15
MECC4/CKE4
AJ15
MECC5/CKE5
AJ13
MECC6/CKE6
AE13
MECC7/CKE7
AE28
DQM0/CKE0
AH27
DQM1/CKE1
AJ24
DQM2/CKE2
AJ20
DQM3/CKE3
AJ9
DQM4/CKE4
AH5
DQM5/CKE5
AJ1
DQM6/CKE6
AD4
DQM7/CKE7
AJ14
DQM8
VIA-VT8751-BGA664
Y16
AF19
Y17
VCCM
GND
AF22
Y18
VCCM
VCCM
GND
GND
AF25
Y19
VCCM
GND
AF28
Y20
VCCM
GND
AH2
AA9
AH4
4
AA10
VCCM
GND
AH7
4
AA11
VCCM
GND
AH10
AA12
VCCM
GND
AH13
AA13
VCCM
GND
AH16
AA14
VCCM
GND
AH19
AA15
VCCM
VCCM
GND
GND
AH22
AA16
AH25
AA17
VCCM
VCCM
GND
GND
AH28
AA18
VCCM
GND
M17
AA19
VCCM
GND
N17
AA20
P17
V20
VCCM
GND
R17
VCCM
GND
VDIMM
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
SRASA
SRASB
SCASA
SCASB
SWEA
SWEB
DQS0/CKE0
DQS1/CKE1
DQS2/CKE2
DQS3/CKE3
DQS4/CKE4
DQS5/CKE5
DQS6/CKE6
DQS7/CKE7
DQS8
MCLKF
MCLK
MVREF0
MVREF1
MVREF2
MVREF3
RESERVED0
RESERVED1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
T17
U17
V17
CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS7
3
C163
0.1u
VDIMM
MAA[14..0]
MAB[14..0]
SRAS#A 9,10
SRAS#B 9,10
SCAS#A 9,10
SCAS#B 9,10
SWE#A 9,10
SWE#B 9,10
CS#0 9,10
CS#1 9,10
CS#2 9,10
CS#3 9,10
DCLK_FB<Lddr+2"
R78 close NB DCLK_OUT 1~8"
DCLK_FB
DCLK_OUT
C320
C155
0.1u(B)
1u
DCLK_OUT
C123 X_5pF
BC61
1u/0805 (B)
BC41
1u/0805 (B)
MAA0
AF12
MAA1
AE16
MAA2
AJ17
MAA3
AG17
MAA4
AF17
MAA5
AE21
MAA6
AE20
MAA7
AE22
MAA8
AG22
MAA9
AF26
MAA10
AH12
MAA11
AJ7
MAA12
AG12
MAA13
AE25
MAA14
AJ22
MAB0
AJ12
MAB1
AG15
MAB2
AJ16
MAB3
AH17
MAB4
AJ18
MAB5
AF21
MAB6
AG19
MAB7
AE24
MAB8
AE23
MAB9
AF27
MAB10
AE11
MAB11
AH8
MAB12
AJ11
MAB13
AE26
MAB14
AG21
SRAS#A
AG16
SRAS#B
AD19
SCAS#A
AE10
SCAS#B
AD16
SWE#A
AE14
SWE#B
AD17
CS#0
AE9
CS#1
AF8
CS#2
AH6
CS#3
AG7
AE12
AF11
AE5
AE6
NBDQS#0
AE29
NBDQS#1
AJ28
NBDQS#2
AH24
NBDQS#3
AH20
NBDQS#4
AH9
NBDQS#5
AJ5
NBDQS#6
AH1
NBDQS#7
AD3
AG14
AD25
R88 10
AC25
AD23
AD18
AD12
AD7
AD8
AE8
M16
N16
Each pin placed one capacitance
P16
R16
T16
U16
V16
M15
N15
P15
R15
T15
U15
V15
These capacitance must be closed NB
3
MAA[14..0] 9,10
MAB[14..0] 9,10
DCLK_FB 3
DCLK_OUT 3
R105 1K
R104
1K
BC58
1u (B)
VDIMM
BC52
1u (B)
2
DDRMD0 NBMD0
NBMD4 DDRMD4
NBMD6 DDRMD6
NBMD7 DDRMD7
NBMD3 DDRMD3
NBMD12 DDRMD12
NBMD13 DDRMD13
NBDQS#1 DDRDQS#1
NBDQM#1 DDRDQM#1 DDRDQM#5 NBDQM#5
NBMD10 DDRMD10
NBMD20 DDRMD20
NBDQM#2 DDRDQM#2
NBMD18 DDRMD18
NBMD19 DDRMD19
NBMD24 DDRMD24
NBMD25 DDRMD25
NBMD28 DDRMD28
NBMD30 DDRMD30
NBMD26 DDRMD26
DDRDQS#[7..0]
DDRDQM#[7..0]
DDRMD[63..0]
C161
C169
C133
X_0.1u
X_0.1u
X_0.1u
C139
X_0.1u
4 pcs placed on Top side 4 pcs placed on solder side
2
DDRMD5 NBMD5
DDRMD1 NBMD1
DDRDQM#0 NBDQM#0
DDRDQS#0 NBDQS#0
DDRMD8 NBMD8
DDRMD9 NBMD9
DDRMD14 NBMD14
DDRMD15 NBMD15
DDRMD11 NBMD11
DDRMD17 NBMD17
DDRMD16 NBMD16
DDRMD21 NBMD21
DDRDQS#2 NBDQS#2
DDRMD23 NBMD23
DDRMD22 NBMD22
DDRMD29 NBMD29
DDRDQM#3 NBDQM#3
DDRDQS#3 NBDQS#3
DDRMD27 NBMD27
DDRMD31 NBMD31
DDRDQS#[7..0] 9,10
DDRDQM#[7..0] 9,10
DDRMD[63..0] 9,10
MSI
Title
Size Document Number Rev
Date: Sheet of
NBMD32 DDRMD32
NBMD36 DDRMD36
NBMD37 DDRMD37
NBMD35 DDRMD35
NBDQS#5 DDRDQS#5
NBMD47 DDRMD47
NBMD50 DDRMD50
NBDQM#6 DDRDQM#6
NBDQS#6 DDRDQS#6
NBMD55 DDRMD55
NBMD54 DDRMD54
NBMD51 DDRMD51
NBMD61 DDRMD61
NBMD56 DDRMD56
NBMD57 DDRMD57
NBDQS#7 DDRDQS#7
NBDQM#7 DDRDQM#7
NBMD62 DDRMD62
NBMD58 DDRMD58
NBMD63 DDRMD63
Micro-Star
VT8751A memory
1
MS-6787
1
DDRMD33 NBMD33
DDRDQS#4 NBDQS#4
DDRDQM#4 NBDQM#4
DDRMD34 NBMD34 NBMD2 DDRMD2
DDRMD38 NBMD38
DDRMD39 NBMD39
DDRMD40 NBMD40
DDRMD44 NBMD44
DDRMD45 NBMD45
DDRMD41 NBMD41
DDRMD42 NBMD42
DDRMD46 NBMD46
DDRMD43 NBMD43
DDRMD48 NBMD48
DDRMD52 NBMD52
DDRMD53 NBMD53
DDRMD49 NBMD49
DDRMD60 NBMD60
DDRMD59 NBMD59
7 27 Monday, February 09, 2004
10B1
5
VLAD0 12
VLAD1 12
VLAD2 12
VLAD3 12
VLAD4 12
C177
0.1u
VDIMM
PWRGD_NB# 13
PCIRST#1 15,23
VLAD5 12
VLAD6 12
VLAD7 12
VBE0# 12
UPSTB 12
UPSTB# 12
DNSTB 12
DNSTB# 12
UPCMD 12
DNCMD 12
R132 80.6 1%
BC56
X_1u/0805 (B)
SUSST# 12,13
D D
R135 2K 1%
VCC2_5
R134
1.13K 1%
C C
R372 4.7K(B)
VCC2_5
B B
VCC2_5
VCC2_5
A A
VCC2_5
L10
X_60-500mA
CP21
X_COPPER
AGND1
L17
X_60-500mA
CP23
X_COPPER
AGND2
L8
X_60-500mA
CP25
X_COPPER
TESTIN_NB
1000p (B)
1000p (B)
C148
1u
5
AVDD3
C165
1u C318
C323
1u (B) C319
AVDD1
CP22
X_COPPER
L9
X_60-500mA
AVDD2
CP24
X_COPPER
L15
X_60-500mA
VCC2_5
C115
X_1u/0805
TESTIN_NB
AVDD1
AVDD2
AVDD3
AGND1
AGND2
4
VBE0#
LVREF_NB
LCOMP
4
W24
AD9
AD10
AD11
AD13
AD14
AD20
AD21
AD22
AC4
W25
AC3
AC1
AD24
AE15
M24
AC24
AD15
3
VDDQ
VCCAGP
VCCAGP
VCCAGP
GND
GND
M12
N12
3
T10
VCCAGP
GND
GND
P12
R12
BC49
1u/0805 (B)
T12
A4
VCCQQ
GFRAM
GIRDY
GTRDY
GDSEL
GSTOP
GPAR/GCKRUN
GPIPE
GRBF
GWBF
GREQ
GGNT
AGP8XDET
AGPVREF0
AGPVREF1
GCOMP0
GCOMP1
GNDQQ
GND
GND
GND
GND
VIA-VT8751-BGA664
U12
V12
AB6
BC47
1u/0805 (B)
GD0
GD1
GD2
GD3
GD4
GD5
GD6
GD7
GD8
GD9
GD10
GD11
GD12
GD13
GD14
GD15
GD16
GD17
GD18
GD19
GD20
GD21
GD22
GD23
GD24
GD25
GD26
GD27
GD28
GD29
GD30
GD31
GBE0
GBE1
GBE2
GBE3
DBIH
DBIL
ST0
ST1
ST2
SBS
SBS
GDS0
GDS0
GDS1
GDS1
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GCLK
V2
V3
U1
V1
T3
U3
T1
T2
R3
R2
P1
P3
P4
N5
N1
N2
M3
L3
L1
K2
K3
K1
K4
J1
H1
H3
G1
G2
H4
G3
G4
F1
R1
N3
M2
K5
L4
M1
P5
N4
R5
U4
G5
H5
L5
C1
B1
F2
M5
A1
E5
F5
J5
D2
D1
T4
T5
J3
J2
C3
C2
E4
D4
D3
E1
E3
F3
R6
G6
U5
A2
B3
A3
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
GFRAME#
GIRDY#
GTRDY#
GDEVSEL#
GSTOP#
GPAR
PIPE#
RBF#
WBF#
GREQ#
GGNT#
AGPST0
AGPST1
AGPST2
SBSTB
SBSTB#
ADSTB0
ADSTB#0
ADSTB1
ADSTB#1
AGPCOMP0
AGPCOMP1
VCC2_5
BC60
X_1u/0805 (B)
GFRAME# 11
GIRDY# 11
GTRDY# 11
GDEVSEL# 11
GSTOP# 11
GPAR 11
PIPE# 11
RBF# 11
WBF# 11
GREQ# 11
GGNT# 11
AGPST0 11
AGPST1 11
AGPST2 11
SBSTB 11
SBSTB# 11
ADSTB0 11
ADSTB#0 11
ADSTB1 11
ADSTB#1 11
SBA0 11
SBA1 11
SBA2 11
SBA3 11
SBA4 11
SBA5 11
SBA6 11
SBA7 11
NBCLK66 3
R126 60.4 1%
R125 60.4 1%
BC65
1u/0805 (B)
L10M6M9
M10N9N10P9P10R9R10T6T9U6V6
K9L6L9
K6
U9C
W5
VD0
W3
VD1
AB3
VD2
W1
VD3
AA5
VD4
W2
VD5
AB1
VD6
AB2
VD7
V5
VBE
AA4
UPSTB
Y3
UPSTB
AA1
DNSTB
AA3
DNSTB
Y1
UPCMD
AA2
DNCMD
Y5
VLREF
AB4
VCOMPP
U9
VCCVK
U10
VCCVL
V9
VCCVL
V10
VCCVL
W9
VCCVL
Y9
VCCVL
F9
VCC
F10
VCC
F11
VCC
F14
VCC
F15
VCC
F20
VCC
F21
VCC
H6
VCC
H24
VCC
J6
VCC
J24
VCC
N6
VCC
P6
VCC
W6
VCC
VCC
Y6
VCC
Y24
VCC
AA6
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AB5
VSUS25
SUST
TESTIN
RESETX
PWROK
N24
AVCC1
AVCC2
AVCC3
AGND1
AGND2
AGND3
GND
GND
GND
D5E2F4F6F7H2J4L2M4P2R4U2V4W4Y2
C4
B2
B4
GND
VCCAGP
GND
GND
VCCAGP
VCCAGP
VCCAGP
GND
GND
GND
VCCAGP
VCCAGP
VCCAGP
GND
GND
GND
VCCAGP
VCCAGP
VCCAGP
GND
GND
GND
VCCAGP
VCCAGP
VCCAGP
GND
GND
GND
VCCAGP
VCCAGP
GND
Y4
GAD[0..31]
GC/BE#[0..3]
BC59
X_1u/0805 (B)
2
VDDQ
2
GAD[0..31] 11
GC/BE#[0..3] 11
C322
0.1u (B)
BC55
1u/0805 (B)
1
These capacitance must be closed NB
VDDQ
C173
0.1u
For Top side
VDDQ
BC64
BC63
0.1u (B)
BC62
X_0.1u (B)
1u (B)
For solder side
VREF_GC 11
C175
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
Micro-Star
VT8751A AGP & Vlink
MS-6787
1
8 27 Monday, February 09, 2004
10B1
5
4
3
2
1
DIMM1
148
168
VDD
VDD
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
WP
GND
DIMM-D184-BK
176
DDRMD[63..0]
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
44
45
49
51
134
135
142
144
90
DDRMD5
DDRMD1
DDRMD6
DDRMD3
DDRMD0
DDRMD4
DDRMD2
DDRMD7
DDRMD8
DDRMD9
DDRMD15
DDRMD11
DDRMD12
DDRMD13
DDRMD10
DDRMD14
DDRMD17
DDRMD16
DDRMD18
DDRMD22
DDRMD20
DDRMD21
DDRMD19
DDRMD23
DDRMD24
DDRMD29
DDRMD26
DDRMD27
DDRMD25
DDRMD28
DDRMD30
DDRMD31
DDRMD32
DDRMD33
DDRMD34
DDRMD39
DDRMD36
DDRMD37
DDRMD38
DDRMD35
DDRMD44
DDRMD41
DDRMD42
DDRMD43
DDRMD40
DDRMD45
DDRMD46
DDRMD47
DDRMD48
DDRMD53
DDRMD49
DDRMD51
DDRMD52
DDRMD50
DDRMD55
DDRMD54
DDRMD57
DDRMD60
DDRMD58
DDRMD59
DDRMD61
DDRMD56
DDRMD62
DDRMD63
WP#
MAB[14..0] 7,10
DIMMREF
MAB[14..0]
SWE#B 7,10
SCAS#B 7,10
SRAS#B 7,10
MDCLK3 3
MDCLK#3 3
MDCLK2 3
MDCLK#2 3
MDCLK4 3
MDCLK#4 3
VDIMM
C29
0.1u
CKE2 7
CKE3 7
C16
X_0.1u
CS#2 7,10
CS#3 7,10
DDRDQM#0
DDRDQM#1
DDRDQM#2
DDRDQM#3
DDRDQM#4
DDRDQM#5
DDRDQM#6
DDRDQM#7
SWE#B
SCAS#B
SRAS#B
DDRDQS#0
DDRDQS#1
DDRDQS#2
DDRDQS#3
DDRDQS#4
DDRDQS#5
DDRDQS#6
DDRDQS#7
SMBDATA1
SMBCLK1
VDIMM
VDIMM
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB13
MAB14
MAB11
MAB12
CS#2
CS#3
CKE2
CKE3
ADDRESS=
130
125
122
141
118
115
103
113
157
158
163
107
119
129
149
159
169
177
140
154
111
137
138
181
182
183
184
101
102
173
167
48
43
41
37
32
29
27
59
52
71
97
63
65
21
16
17
76
75
5
14
25
36
56
67
78
86
47
91
92
1
82
9
10
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
CS0
CS1
NC/CS2
NC/CS3
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0/DNU
CK0/DNU
CK1
CK1
CK2/DNU
CK2/DNU
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF
VDDID
VDDSPD
NC
NC
NC
NC
NC
NC/FETEN
A2
15223054627796
VDDQ
VDDQ
104
112
128
136
143
156
164
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3111826344250586674818993
172
180738467085108
VDD
VDD
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
100
116
124
DIMM2
120
148
168
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
132
139
145
152
160
176
DIMM-D184-BK
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DDRMD5
2
D0
DDRMD1
4
D1
DDRMD6
6
D2
DDRMD3
8
D3
DDRMD0
94
D4
DDRMD4
95
D5
DDRMD2
98
D6
DDRMD7
99
D7
DDRMD8
12
D8
DDRMD9
13
D9
DDRMD15
19
D10
DDRMD11
20
D11
DDRMD12
105
D12
DDRMD13
106
D13
DDRMD10
109
D14
DDRMD14
110
D15
DDRMD17
23
D16
DDRMD16
24
D17
DDRMD18
28
D18
DDRMD22
31
D19
DDRMD20
114
D20
DDRMD21
117
D21
DDRMD19
121
D22
DDRMD23
123
D23
DDRMD24
33
D24
DDRMD29
35
D25
DDRMD26
39
D26
DDRMD27
40
D27
DDRMD25
126
D28
DDRMD28
127
D29
DDRMD30
131
D30
DDRMD31
133
D31
DDRMD32
53
D32
DDRMD33
55
D33
DDRMD34
57
D34
DDRMD39
60
D35
DDRMD36
146
D36
DDRMD37
147
D37
DDRMD38
150
D38
DDRMD35
151
D39
DDRMD44
61
D40
DDRMD41
64
D41
DDRMD42
68
D42
DDRMD43
69
D43
DDRMD40
153
D44
DDRMD45
155
D45
DDRMD46
161
D46
DDRMD47
162
D47
DDRMD48
72
D48
DDRMD53
73
D49
DDRMD49
79
D50
DDRMD51
80
D51
DDRMD52
165
D52
DDRMD50
166
D53
DDRMD55
170
D54
DDRMD54
171
D55
DDRMD57
83
D56
DDRMD60
84
D57
DDRMD58
87
D58
DDRMD59
88
D59
DDRMD61
174
D60
DDRMD56
175
D61
DDRMD62
178
D62
DDRMD63
179
D63
44
45
49
51
134
135
142
144
90
WP
WP#
R129
4.7K
VDIMM
DDRMD[63..0] 7,10
VDIMM
15223054627796
D D
C C
B B
MAA[14..0] 7,10
DDRDQM#[7..0] 7,10
DDRDQS#[7..0] 7,10
SMBDATA1 3,13,17,23
SMBCLK1 3,13,17,23
DIMMREF
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA13
MAA14
MAA11
MAA12
CS#0 7,10
CS#1 7,10
DDRDQM#0
DDRDQM#1
DDRDQM#2
DDRDQM#3
DDRDQM#4
DDRDQM#5
DDRDQM#6
DDRDQM#7
SWE#A 7,10
SCAS#A 7,10
SRAS#A 7,10
CKE0 7
CKE1 7
MDCLK0 3
MDCLK#0 3
MDCLK5 3
MDCLK#5 3
MDCLK1 3
MDCLK#1 3
DDRDQS#0
DDRDQS#1
DDRDQS#2
DDRDQS#3
DDRDQS#4
DDRDQS#5
DDRDQS#6
DDRDQS#7
SMBDATA1
SMBCLK1
VDIMM
C27
0.1u
CS#0
CS#1
SWE#A
SCAS#A
SRAS#A
CKE0
CKE1
ADDRESS=
130
125
122
141
118
115
103
113
157
158
163
107
119
129
149
159
169
177
140
154
111
137
138
181
182
183
184
101
102
173
167
48
43
41
37
32
29
27
59
52
71
97
63
65
21
16
17
76
75
14
25
36
56
67
78
86
47
91
92
82
10
5
1
9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
CS0
CS1
NC/CS2
NC/CS3
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0/DNU
CK0/DNU
CK1
CK1
CK2/DNU
CK2/DNU
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF
VDDID
VDDSPD
NC
NC
NC
NC
NC
NC/FETEN
A0
VDDQ
104
112
128
136
143
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
3111826344250586674818993
156
164
172
180738467085108
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
VDDQ
GND
100
GND
120
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
116
124
132
139
145
152
160
A A
SMBDATA1
SMBCLK1
4
VDIMM
R26 1K 1%
X_10P C328
X_10P C329
5
R20
1K 1%
DIMMREF
C24
X_1u
MSI
Title
Size Document Number Rev
3
2
Date: Sheet of
Micro-Star
DIMM1 , 2
MS-6787
1
9 27 Monday, February 09, 2004
10B1