MSI MS-16J11 Schematic 0B

A
VINAFIX.COM
B
C
D
Shark Bay Mobile kp02113
MS-16J1 /1791
Intel Haswell-M
4 4
1364-Ball BGA
PCI-E x16 Gen3 8GT/s
DDR3L
eDP x4
eDP Panel
Page 42
PEG Gen3 PCI-E x16 HD Graphic GT1/GT2/GT3 eDP
BQ24737RGRR
DDI(3 Ports)
nVIDIA N16E-GT(GTX 970M) GB3-256_40*40mm 1745-Ball BGA
GDDR5 /3GB (64Mx32bit)x12
Page 55
Page 11-31
Page 12-22
Wednesday, September 17, 2014
Wednesday, September 17, 2014
Wednesday, September 17, 2014
DC JACK
Page 55
USB2.0 Port 12
USB2.0 Port 10
WLAN/BT
3 3
2 2
USB2.0 Port 11
USB2.0 Port 1
USB3.0 Port 2
USB2.0 USB3.0 Port 0
USB2.0 Port 9
USB2.0 Port 8
Azalia
RJ45
Port 1
USB3.0 Port 6
Audio ALC892-CG
HeadPhone MicroPhone
Page 54
Page 51
USB2.0
USB3.0 CNT-2
USB3.0 CNT-3
Page 49
Page 50
Page 46
Page 54
BigFoot Killer
WLAN/BT
HDD
Amplifier APA2051 APA2031
M.2
Amplifier APA3010
Page 50
Woffer
Page 50
Page 51
Page 54
Page 52
Page 53
Page 53
Page 49
in-Speaker
Page 49
Intel Lynx Point
HM87
PCI-E 2.0 Ports X 8
USB 3.0 Ports X 4
USB 2.0 Ports X14
Azalia HD Audio
SATA 3.0 Ports * 4
SATA 2.0 Ports * 2
SPI I/F
LPC I/F
Embedded Clock
x4 DMI(5GB/s)
695-Ball BGA
16J12
Page 3-8
+VCC_CORE (CPU)
TPS51211DSCR VRAM(FBVDDQ)
Page 32-41
Page 56
Card Reader RTS5170
Page 57
Camera CONN
Page 42
iPad Charger TPS2546RTER
Page 58
Page 46
Page 61
Page 59
Page 60
USB2.0 CNT-4 (16J12)
Page 58
Page 54
Page 57
Page 46
USB3.0 CNT-1
Page 46
Battery Select/Charger
TPS51125RGER +3VSUS / +5VSUS
MP2138DQT +1_5VRUN
TPS51125RGER +1_35VDIMM
APL5337KAI +0.675VRUN
TPS51211DSCR +1_05VRUN
ISL95812HRZ
UP1642PQAG NVVDD (dGPU)
LPC Debug
BIOS
1 1
1797 Click Button (16J1B)
Page 65
Page 43
A
8MB/ME
LED KeyBoard
Page 43
Page 34
KBC KB3930B
TouchPadEPF021J
B
Page 44
Page 47
Page 44
EC ROM
Page 44
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
C
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Block Diagram
Block Diagram
Block Diagram
MS-16J1
MS-16J1
MS-16J1
D
169
169
169
5
VINAFIX.COM
4
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
Voltage Rails
3
2
1
D D
C C
Voltage Description Control Signal
PWR_SRC AC ADAPTER OR BATTERY IN
+5VALW 5.0V always on power rail PWR_SRC
+3VALW
+5VSUS
+3VSUS
+0_675VRUN
+5VRUN
+3VRUN
+1_5VRUN 1.5V switched power rail (off in S3-S5)
+VCC_CORE Core Voltage for Processor EC_ALLSYSPG
+1_05VRUN
NVVDD
+3V3_NV
FBVDDQ
PEX_VDD
3.3V always on power rail
5.0V power rail
3.3V power rail
1.35V DDR3L power rail (off in S4-S5)
0.675V DDR3L Termination voltage (off in S3-S5)
5.0V switched power rail (off in S3-S5)
3.3V switched power rail (off in S3-S5 / M0)
1.8V
1.05V rail for Processor RUN_ON
V Core Voltage for nVIDIA dGPU
3.3V PEX power rail (off in Optimus OFF)
1.35V FB / GDDR5 power rail (off in Optimus OFF)
1.05V PLL power rail (off in Optimus OFF)
PWR_SRC
SUS_ON
SUS_ON
DIMM_ON+1_35VDIMM
PM_SLP_S3#
RUN_ON
RUN_ON
RUN_ON
NVVDD_EN
DGPU_PWR_EN#
FBVDDQ_ON
NVVDD_EN
Net Naming Conventions
Suffix
# = Active Low Signal
Prefix
H = Host M = DDR Memory TP = Test Point (does not connect anywhere else) FB = DGPU VRAM VIAxxx = Like Test Point, but using VIA.
PCB Footprints
SOT-23
1
3
As seen from top
2
1
2
3
5
4
SOT23-5
B B
POWER STATES
STATE
S0( Full ON)
S3( Suspend to RAM) ONHIGH
A A
S4( Suspend to Disk)
S5 (Soft OFF)
SIGNAL
SLP_S3# +*VRUNSLP_S4# SLP_S5# +*VSUS
LOW OFF
LOW
LOW
LOW
Note : WHEN AC MODE , System turn on and +V*SUS always keep high
5
HIGHHIGHHIGH
HIGH
HIGH
LOW
+V*ALW
ON
ON
ON
OFF
OFF
4
Clocks
ONONON
OFFLOW
OFFONOFF
OFF
OFF
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Platform
Platform
Platform
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
269Wednesday, September 17, 2014
269Wednesday, September 17, 2014
269Wednesday, September 17, 2014
1
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
R338
R338
1.8K1%0402
1.8K1%0402
JNC16 X_0402JNC16 X_0402
1 2
R337
R337
3.3KR1%0402
3.3KR1%0402
Haswell ( CLK,MISC,JTAG )Haswell ( DMI,PEG,FDI )
U68B
U68B
C51
PROC_DETECT
G50
CATERR
G51
PECI
E50
PROCHOT
D53
THERMTRIP
D52
PM_SYNC
F50
PWRGOOD
AP48
SM_DRAMPWROK
L54
PLTRSTIN
AC6
DPLL_REF_CLKN
AE6
DPLL_REF_CLKP
V6
SSC_DPLL_REF_CLKN
Y6
SSC_DPLL_REF_CLKP
AB6
BCLKN
AA6
BCLKP
Not Support Deep S3
1.35V
PM_DRAM_PWRGD_R
1K on CRB , 0R on DG
CPUDRAMRST#
HASWELL_BGA_E
HASWELL_BGA_E
MISC
MISC
PWRTHERMAL
PWRTHERMAL
CLOCK
CLOCK
2
SM_RCOMP_0/1/2 : 15/20/25/15/20/25 SM_RCOMP_0/1/2 Length max: 500mil
SM_RCOMP0_JNC
SM_RCOMP0 SM_RCOMP1 SM_RCOMP2
SM_DRAMRST
JTAG DDR3
JTAG DDR3
2 OF 12
2 OF 12
p.11 479493_479493_SharkBay_HSW_ext_rev2.0.pdf Processor JTAG (TDI, TDO, TMS, TRST#, TCK) signals, PREQ# and PRDY# signals signals have adequate internal bias resistances to support the removal of the external pull up and pull down on the board when debug is no longer needed.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
BB51
SM_RCOMP1_JNC
BB53
SM_RCOMP2_JNC
BB52
CPUDRAMRST#
BE51
N53
PRDY
N52
PREQ
TCK TMS
TRST
TDO DBR
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7
CPU-1 ( Host Bus )
CPU-1 ( Host Bus )
CPU-1 ( Host Bus )
MS-16J1
MS-16J1
MS-16J1
N54 M51 M53 N49
TDI
M49 F53
R51 R50 P49 N50 R49 P53 U51 P51
XDP_TCLK
XDP_TRST#
XDP_TCLK
XDP_TRST#
R327 X_51R1%0402R327 X_51R1%0402
R329 X_51R1%0402R329 X_51R1%0402
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
R85 100R1%0402R85 100R1%0402 R83 75R1%0402R83 75R1%0402 R84 100R1%0402R84 100R1%0402
1
GND
369Wednesday, September 17, 2014
369Wednesday, September 17, 2014
369Wednesday, September 17, 2014
0B
0B
of
0B
PEG_RCOMP Width:12 mils
HASWELL_BGA_E
U68A
U68A
D D
C C
B B
DMI_TXN0(35) DMI_TXN1(35) DMI_TXN2(35) DMI_TXN3(35)
DMI_TXP0(35) DMI_TXP1(35) DMI_TXP2(35) DMI_TXP3(35)
DMI_RXN0(35) DMI_RXN1(35) DMI_RXN2(35) DMI_RXN3(35)
DMI_RXP0(35) DMI_RXP1(35) DMI_RXP2(35) DMI_RXP3(35)
FDI_CSYNC(35)
FDI_INT(35)
AB2 AB3 AC3 AC1
AB1 AB4 AC4 AC2
AF2 AF4 AG4 AG2
AF1 AF3 AG3 AG1
F11 F12
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
FDI_CSYNC DISP_INT
EC Sink current 2 mA
A A
EC_PROCHOT#(44)
IMVP_PROCHOT#(61)
1 2
JNC5 X_0402JNC5 X_0402
HASWELL_BGA_E
DMI
DMI
FDI
FDI
1 OF 12
1 OF 12
+VCCIO_OUT
PEG
PEG
R56
R56 681R1%0402
681R1%0402
R44 56R0402R44 56R0402
PEG_RCOMP
PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8
PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15
PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8
PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15
AH6 E10 C10 B10 E9 D9 B9 L5 L2 M4 L4 M2 V5 V4 V1 Y3 Y2 F10 D10 A10 F9 C9 A9 M5 L1 M3 L3 M1 Y5 V3 V2 Y4 Y1 B6 C5 E6 D4 G4 E3 J5 G3 J3 J2 T6 R6 R2 R4 T4 T1 C6 B5 D6 E4 G5 E2 J6 G2 J4 J1 T5 R5 R1 R3 T3 T2
PEG_COMP
PEG_RXN0 (11) PEG_RXN1 (11) PEG_RXN2 (11) PEG_RXN3 (11) PEG_RXN4 (11) PEG_RXN5 (11) PEG_RXN6 (11) PEG_RXN7 (11) PEG_RXN8 (11) PEG_RXN9 (11) PEG_RXN10 (11) PEG_RXN11 (11) PEG_RXN12 (11) PEG_RXN13 (11) PEG_RXN14 (11) PEG_RXN15 (11) PEG_RXP0 (11) PEG_RXP1 (11) PEG_RXP2 (11) PEG_RXP3 (11) PEG_RXP4 (11) PEG_RXP5 (11) PEG_RXP6 (11) PEG_RXP7 (11) PEG_RXP8 (11) PEG_RXP9 (11) PEG_RXP10 (11) PEG_RXP11 (11) PEG_RXP12 (11) PEG_RXP13 (11) PEG_RXP14 (11) PEG_RXP15 (11) PEG_TXN0 (11) PEG_TXN1 (11) PEG_TXN2 (11) PEG_TXN3 (11) PEG_TXN4 (11) PEG_TXN5 (11) PEG_TXN6 (11) PEG_TXN7 (11) PEG_TXN8 (11) PEG_TXN9 (11) PEG_TXN10 (11) PEG_TXN11 (11) PEG_TXN12 (11) PEG_TXN13 (11) PEG_TXN14 (11) PEG_TXN15 (11) PEG_TXP0 (11) PEG_TXP1 (11) PEG_TXP2 (11) PEG_TXP3 (11) PEG_TXP4 (11) PEG_TXP5 (11) PEG_TXP6 (11) PEG_TXP7 (11) PEG_TXP8 (11) PEG_TXP9 (11) PEG_TXP10 (11) PEG_TXP11 (11) PEG_TXP12 (11) PEG_TXP13 (11) PEG_TXP14 (11) PEG_TXP15 (11)
H_PROCHOT#_R
R74 24.9R1%0402R74 24.9R1%0402
Spacing:15 mils Length:400 mils
+VCCIOA_OUT
H_CPUPWRGD(37)
10KR0402
10KR0402
DDR3_DRAMRST#(9,10)
47P close PWM
5
4
i7-4710HQ,(SR1PX),2.5GHz
TPJNC2TPJNC2
H_PECI(44)
H_THRMTRIP#(37)
H_PM_SYNC(35)
R50
R50
GND
PM_DRAM_PWRGD(35)
R,C Close SO-DIMM
3
VIA_H_CATERR#
H_PROCHOT#_R
PM_DRAM_PWRGD_R
PCH_PLTRST_CPU(37)
CLK_DPN(33)
CLK_DPP(33) CLK_DP_SSCN(33) CLK_DP_SSCP(33)
CLK_EXP#(33)
CLK_EXP(33)
+1_35VDIMM
GND
JNC17 X_0402JNC17 X_0402
1 2
EC50
EC50 X_C0.1u50X70402
X_C0.1u50X70402
GND
5
VINAFIX.COM
4
3
2
1
Haswell ( DDR3L )
D D
SODIMM#
HASWELL_BGA_E
U68C
M_A_DQ[63:0](9)
C C
B B
DIMM_SM_VREF(9,10) M_VREF_DQ_DIMMA(9) M_VREF_DQ_DIMMB(10)
A A
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
AH54 AH52 AK51 AK54 AH53 AH51 AK52 AK53 AN54 AN52 AR51 AR53 AN53 AN51 AR52 AR54 AV52 AV53 AY52 AY51 AV51 AV54 AY54 AY53 AY47 AY49 BA47 BA45 AY45 AY43 BA49 BA43 BF14 BC14 BC11 BF11 BE14 BD14 BD11 BE11
BC9 BE9 BE6 BC6 BD9 BF9 BE5 BD6 BB4
BC2 AW3 AW2
BB3
BB2 AW4 AW1
AU3
AU1
AR1
AR4
AU2
AU4
AR2
AR3
AM6
AR6
AN6
BC53
U68C
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
SM_VREF SA_DIMM_VREFDQ SB_DIMM_VREFDQ
RSVD
HASWELL_BGA_E
3 OF 12
3 OF 12
A
RSVD
SA_CKN0
SA_CK0 SA_CKE0 SA_CKN1
SA_CK1 SA_CKE1 SA_CKN2
SA_CK2 SA_CKE2 SA_CKN3
SA_CK3 SA_CKE3
SA_CS#0 SA_CS#1 SA_CS#2
SA_CS#3 SA_ODT0 SA_ODT1 SA_ODT2 SA_ODT3
SA_BS0 SA_BS1 SA_BS2
VSS
SA_RAS
SA_WE
SA_CAS
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8
SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15
SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7
RSVD SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
BD31 BE25 BF25 BE34 BD25 BC25 BF34 BE23 BF23 BC34 BD23 BC23 BD34
BE16 BC17 BE17 BD16 BC16 BF16 BF17 BD17 BC20 BD21 BD32
BC21 BF20 BF21 BE21
BD28 BD27 BF28 BE28 BF32 BC27 BF27 BC28 BE27 BC32 BD20 BF31 BC31 BE20 BE32 BE31
AJ52 AP53 AW52 AY46 BD12 BE7 BA3 AT2 AW39 AJ53 AP52 AW53 BA46 BE12 BD7 BA2 AT3 AW40
BA40 AY40 BA39 AY39 AV40 AU40 AV39 AU39
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
M_A_CLK_DDR#0 (9) M_A_CLK_DDR0 (9) M_A_CKE0 (9) M_A_CLK_DDR#1 (9) M_A_CLK_DDR1 (9) M_A_CKE1 (9)
M_A_CS#0 (9) M_A_CS#1 (9)
M_A_ODT0 (9) M_A_ODT1 (9)
M_A_BS0 (9) M_A_BS1 (9) M_A_BS2 (9)
M_A_RAS# (9) M_A_WE# (9) M_A_CAS# (9)
M_A_A[15:0] (9)
M_A_DQS#[7:0] (9)
M_A_DQS[7:0] (9)
SODIMM#
HASWELL_BGA_E
U68D
M_B_DQ[63:0](10)
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
AC54 AC52 AE51 AE54 AC53 AC51 AE52 AE53 AU47 AU49 AV43 AV45 AU43 AU45 AV47 AV49 BC49 BE49 BD47 BC47 BD49 BD50 BE47 BF47 BE44 BD44 BC42 BF42 BF44 BC44 BD42 BE42 BA16 AU16 BA15 AV15 AY16 AV16 AY15 AU15 AU12 AY12 BA10 AU10 AV12 BA12 AY10 AV10
AU8 BA8 AV6 BA6 AV8 AY8 AU6
AY6 AM2 AM3
AK1
AK4 AM1 AM4
AK2
AK3
U68D
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
HASWELL_BGA_E
4 OF 12
4 OF 12
B
RSVD
SB_CKN0
SB_CK0 SB_CKE0 SB_CKN1
SB_CK1 SB_CKE1 SB_CKN2
SB_CK2 SB_CKE2 SB_CKN3
SB_CK3 SB_CKE3
SB_CS#0 SB_CS#1 SB_CS#2 SB_CS#3
SB_ODT0 SB_ODT1 SB_ODT2 SB_ODT3
SB_BS0
SB_BS1
SB_BS2
VSS
SB_RAS
SB_WE
SB_CAS
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8
SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15
SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7
RSVD SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
AY36 AW27 AV27 AU36 AW26 AV26 AU35 BA26 AY26 AV35 BA27 AY27 AV36
BA20 AY19 AU19 AW20
AY20 BA19 AV19 AW19 AY23 BA23 BA36 AU30 AV23 AW23 AV20
BA30 AW30 AY30 AV30 AW32 AY32 AT30 AV32 BA32 AU32 AU23 AY35 AW35 AU20 AW36 BA35
AD52 AU46 BD48 BD43 AW16 AW10 AW8 AL2 BE38 AD53 AV46 BE48 BE43 AW15 AW12 AW6 AL3 BD38
BF39 BE39 BF37 BE37 BD39 BC39 BC37 BD37
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
M_B_CLK_DDR#0 (10) M_B_CLK_DDR0 (10) M_B_CKE0 (10) M_B_CLK_DDR#1 (10) M_B_CLK_DDR1 (10) M_B_CKE1 (10)
M_B_CS#0 (10) M_B_CS#1 (10)
M_B_ODT0 (10) M_B_ODT1 (10)
M_B_BS0 (10) M_B_BS1 (10) M_B_BS2 (10)
M_B_RAS# (10) M_B_WE# (10) M_B_CAS# (10)
M_B_A[15:0] (10)
M_B_DQS#[7:0] (10)
M_B_DQS[7:0] (10)
GNDGND
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
CPU-2 ( DDR3L )
CPU-2 ( DDR3L )
CPU-2 ( DDR3L )
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
469Wednesday, September 17, 2014
469Wednesday, September 17, 2014
469Wednesday, September 17, 2014
1
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
Display/Reserved
HASWELL_BGA_E
U68J
U68J
D D
DP
HDMI
C C
B B
GND
GND
GND
A A
R40 49.9R1%0402R40 49.9R1%0402
R41 49.9R1%0402R41 49.9R1%0402
R69 1KR0402R69 1KR0402
R61 1KR0402R61 1KR0402
TPJNC5TPJNC5 TPJNC4TPJNC4
+VCC_CORE
CFG2
CFG4
5
TESTLO_F21
TESTLO_F20
CFG5 CFG6
DDIB_LANE0_DN(47) DDIB_LANE0_DP(47) DDIB_LANE1_DN(47) DDIB_LANE1_DP(47) DDIB_LANE2_DN(47) DDIB_LANE2_DP(47) DDIB_LANE3_DN(47) DDIB_LANE3_DP(47)
BE4 BD3
G21 G24
G19
AG49 AD49 AC49
AE49
AB49
V51
W51
W53
U53 V54 R53 R52
F21
F51 F52 F22
L52 L53
L51
F24 F25 F20
Y50
Y49 Y54 Y53
L50 L49
TMDS_CLK#(48) TMDS_CLK(48)
F6
G6
E5
TMDS_D2#(48)
TMDS_D2(48)
TMDS_D1#(48)
TMDS_D1(48)
TMDS_D0#(48)
TMDS_D0(48)
U68K
U68K
RSVD_TP RSVD_TP
RSVD_TP RSVD_TP
RSVD_TP RSVD_TP TESTLO_F21 VSS VSS VSS VCC
RSVD_TP RSVD_TP
RSVD_TP
RSVD_TP RSVD_TP TESTLO_F20
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
RSVD RSVD RSVD
C25 D25 A25 B25 C24 D24 A24 B24
C21 D21 A21 B21 C20 D20 A20 B20
C16 D16 A16 B16
C17 D17 A17 B17
HASWELL_BGA_E
HASWELL_BGA_E
11 OF 12
11 OF 12
DDIB_TXN0 DDIB_TXP0 DDIB_TXN1 DDIB_TXP1 DDIB_TXN2 DDIB_TXP2 DDIB_TXN3 DDIB_TXP3
DDIC_TXN0 DDIC_TXP0 DDIC_TXN1 DDIC_TXP1 DDIC_TXN2 DDIC_TXP2 DDIC_TXN3 DDIC_TXP3
DDID_TXN2 DDID_TXP2 DDID_TXN3 DDID_TXP3
DDID_TXN0 DDID_TXP0 DDID_TXN1 DDID_TXP1
HASWELL_BGA_E
RSVD_TP RSVD_TP RSVD_TP RSVD_TP
CFG_RCOMP
CFG16 CFG18 CFG17 CFG19
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
RSVD
RSVD_TP RSVD_TP
VSS VSS
VSS VSS
RSVD RSVD RSVD
10 OF 12
10 OF 12
F1 E1 A5 A6
R54 Y52 V53 Y51 V52
B50 AH49 AM48 AU27 AU26 BD4 BC4 AL6 F8
F16
G12 G10
H54 H53
H51 H52
N51 G53 H50
4
EDP_AUXN EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
CFG_RCOMP
GND
F15 F14 E14
EDP_HPD
C14
EDP_TXN0
A12
EDP_TXN1
D14
EDP_TXP0
B12
EDP_TXP1
AG6 E12
C12
FDI_TXN0
D12
FDI_TXP0
A14
FDI_TXN1
B14
FDI_TXP1
R331 49.9R1%0402R331 49.9R1%0402
EDP_AUXN (42)
EDP_HPD#
EDP_RCOMP
EDP_RCOMP Width:20 mils Spacing:25 mils Length:100 mils
EDP_AUXP (42)
EDP_TX0_DN (42) EDP_TX1_DN (42) EDP_TX0_DP (42) EDP_TX1_DP (42)
EDP_TX2_DN (42) EDP_TX2_DP (42) EDP_TX3_DN (42) EDP_TX3_DP (42)
GND
PCI Express* Static x16 Lane Numbering Reversal
CFG2
MSR Privacy Bit Feature
CFG3
eDP enable
CFG4
PCI Express* Bifurcation
CFG[5:6]
PEG DEFER TRAINING
CFG7 1: (Default) PEG Train immediately following xxRESETB de assertion
To eDP Panal
R72 24.9R1%0402R72 24.9R1%0402
1 = Normal operation 0 = Lane numbers reversed.
1 = Debug capability is determined by IA32_Debug_Interface_MSR (0xC80) bit[0] setting 0 = IA32_Debug_Interface_MSR (0xC80) bit[0] default setting overridden
1 = Disabled 0 = Enabled
00 = 1 x8, 2 x4 PCI Express 01 = reserved 10 = 2 x8 PCI Express 11 = 1 x16 PCI Express
0: PEG Wait for BIOS for training
3
+VCCIOA_OUT
EDP_HPD(42)
U68L
U68L
A3
DAISY_CHAIN_NCTF_A3
A4
DAISY_CHAIN_NCTF_A4
A51
DAISY_CHAIN_NCTF_A51
A52
DAISY_CHAIN_NCTF_A52
A53
DAISY_CHAIN_NCTF_A53
B2
DAISY_CHAIN_NCTF_B2
B3
DAISY_CHAIN_NCTF_B3
B52
DAISY_CHAIN_NCTF_B52
B53
DAISY_CHAIN_NCTF_B53
B54
DAISY_CHAIN_NCTF_B54
BC1
DAISY_CHAIN_NCTF_BC1
BC54
DAISY_CHAIN_NCTF_BC54
BD1
DAISY_CHAIN_NCTF_BD1
BD54
DAISY_CHAIN_NCTF_BD54
BE1
DAISY_CHAIN_NCTF_BE1
BE2
DAISY_CHAIN_NCTF_BE2
BE3
DAISY_CHAIN_NCTF_BE3
BE52
DAISY_CHAIN_NCTF_BE52
BE53
DAISY_CHAIN_NCTF_BE53
BE54
DAISY_CHAIN_NCTF_BE54
BF2
DAISY_CHAIN_NCTF_BF2
BF3
DAISY_CHAIN_NCTF_BF3
BF4
DAISY_CHAIN_NCTF_BF4
2
+VCCIO_OUT
R37
R37 10KR0402
10KR0402
EDP_HPD#
DS
Q7
Q7
G
N-2N7002_SOT23
N-2N7002_SOT23
R112
R112 100KR0402
100KR0402
GND GND
HASWELL_BGA_E
HASWELL_BGA_E
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
BF51 BF52 BF53
C1 C2 C3
C54 D1
D54
AN35 AN37 AF9 AE9 G14 G17 AD45 AG45
569Wednesday, September 17, 2014
569Wednesday, September 17, 2014
569Wednesday, September 17, 2014
1
DAISY_CHAIN_NCTF_BF51 DAISY_CHAIN_NCTF_BF52 DAISY_CHAIN_NCTF_BF53
DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_C3
DAISY_CHAIN_NCTF_C54
DAISY_CHAIN_NCTF_D1
DAISY_CHAIN_NCTF_D54
12 OF 12
12 OF 12
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
CPU-3 ( Display/Reserved )
CPU-3 ( Display/Reserved )
CPU-3 ( Display/Reserved )
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet of
Date: Sheet of
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
+VCC_CORE
95A
B43
VCC
22uF x 20 /0603
D D
C C
C11-2267313-T04
+VCC_CORE
C44 C22u6.3X0603C44 C22u6.3X0603
C51 C22u6.3X0603C51 C22u6.3X0603
C67 C22u6.3X0603C67 C22u6.3X0603
C528 C22u6.3X0603C528 C22u6.3X0603
C52 C22u6.3X0603C52 C22u6.3X0603
C50 C22u6.3X0603C50 C22u6.3X0603
C527 C22u6.3X0603C527 C22u6.3X0603
C533 C22u6.3X0603C533 C22u6.3X0603
C47 C22u6.3X0603C47 C22u6.3X0603
C534 C22u6.3X0603C534 C22u6.3X0603
C66 C22u6.3X0603C66 C22u6.3X0603
C46 C22u6.3X0603C46 C22u6.3X0603
C526 C22u6.3X0603C526 C22u6.3X0603
C92 C22u6.3X0603C92 C22u6.3X0603
C93 C22u6.3X0603C93 C22u6.3X0603
C49 C22u6.3X0603C49 C22u6.3X0603
C535 C22u6.3X0603C535 C22u6.3X0603
C45 C22u6.3X0603C45 C22u6.3X0603
C43 C22u6.3X0603C43 C22u6.3X0603
C53 C22u6.3X0603C53 C22u6.3X0603
10uF x 4 /060
GND
3
C11-1067333-Y01
B B
A A
+VCC_CORE
CPU_FC_PWR
C82
C82 X_C0.1u50X70402
X_C0.1u50X70402
Resever For BDW H 2-chips
C529 C10u6.3X5-HFC529 C10u6.3X5-HF
C537 C10u6.3X5-HFC537 C10u6.3X5-HF
C530 C10u6.3X5-HFC530 C10u6.3X5-HF
C536 C10u6.3X5-HFC536 C10u6.3X5-HF
+1_05VRUN
R36 X_0R1%0402R36 X_0R1%0402
EC_PCH_PWROK(35,44)
5
GND
C68
C68 X_C4.7u10X50805-HF
X_C4.7u10X50805-HF
GNDGND
R316 X_6.04KR1%0402R316 X_6.04KR1%0402
CPU_FC_PWR CPU_FC_PWROK
R315
R315 X_2.67KR1%0402
X_2.67KR1%0402
GND
B45 B46 B48 C27 C28 C31 C32 C34 C36 C38 C39 C42 C43 C45 C46 C48 D27 D28 D31 D32 D34 D36 D38 D39 D42 D43 D45 D46 D48 E27 E28 E31 E32 E34 E36 E38 E39 E42 E43 E45 E46 E48 F27 F28 F31 F32 F34 F36 F38 F39 F42 F43 F45 F46 F48 G27 G29 G31 G32 G34 G36 G38 G39 G42 G43 G45 G46 G48 H11 H12 H13 H14 H16 H17 H18 H19 H20 H21 H23 H24 H25 H26 H27 H29
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
D5
FC_D5
D3
FC_D3
4
Haswell ( POWER )
HASWELL_BGA_E
HASWELL_BGA_E
5 OF 12
5 OF 12
U68E
U68E
RSVD RSVD RSVD RSVD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
RSVD
VCC
VCC RSVD RSVD
VCC_SENSE
RSVD
VCCIO_OUT
FC_F17
VCOMP_OUT
RSVD RSVD RSVD RSVD
VIDALERT
VIDSCLK
VIDSOUT
VSS
PWR_DEBUG
VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
J17 J21 J26 J31
AR29 AR31 AR33 AT13 AT19 AT23 AT27 AT32 AT36 AV37 AW22 AW25 AW29 AW33 AY18 BB21 BB22 BB26 BB27 BB30 BB31 BB34 BB36 BD22 BD26 BD30 BD33 BE18 BE22 BE26 BE30 BE33
AN31 L6 M6 AN22 AN18
C50 AH9 D51 F17 AK6 AN33 W9 J12 AR49
J53 J52 J50
B51 F19 E52 V49 U49 AM49 W49 V50 AN49 AJ49 AG50 AK49 AJ50 AP49 AB50 AP50 AD50 AM50
A36 A38 A39 A42 A43 A45 A46 A48 AA46 AA47 AA8 AA9
3
4.2 A
12
+
+
PEC7
PEC7 C330u2SO
C330u2SO
GND GND GND GND GND GND GND
+VCC_CORE
C286
C286 C1u25X0402
C1u25X0402
C396
C396 C1u25X0402
C1u25X0402
C295
C295 C1u25X0402
C1u25X0402
C320
C320 C10u6.3X5-HF
C10u6.3X5-HF
10u*3 / 06031u*3 / 0402
CLK and DATA Misatc
R30
R30 100R1%0402
100R1%0402
VCCSENSE (61)
FC_F17
300 m
R32 X_0R1%0402R32 X_0R1%0402
A
+VCCIOA_OUT
VR_SVID_ALERT#_R
PWR_DEBUG#
VIA_IVR_ERROR VIA_IST_TRIGGER
If XDP not implemented, then Route Processor PWR_DEBUG as a test point. This Test point must be clearly labeled
+VCC_CORE
R317 43R0402R317 43R0402
TPJNC1TPJNC1
300 m
+1_05VRUN
TPJNC6TPJNC6 TPJNC3TPJNC3
+VCCIO_OUT
A
C75
C75 C4.7u10X0603
C4.7u10X0603
GND
+VCCIO_OUT
+VCCIO_OUT +VCCIO_OUT
Close to CP
2
2000mil
R322
R322 75R1%0402
75R1%0402
VR_SVID_ALERT# (61)
R326
R326 130R1%0402
130R1%0402
U
Title
Title
Title
CPU-4 ( Power )
CPU-4 ( Power )
CPU-4 ( Power )
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet of
Date: Sheet of
Date: Sheet
+1_35VDIMM
C323
C324
C324 C10u6.3X5-HF
C10u6.3X5-HF
C323 C10u6.3X5-HF
C10u6.3X5-HF
h
s
SVID total Length not ove 6
"
+VCCIO_OUT
R23
R23
54.9R1%0402
54.9R1%0402
VR_SVID_CLK (61)
R19
R19 130R1%0402
130R1%0402
Close to IMVP
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
VR_SVID_DATA (61)
1
r
0B
0B
of
669Wednesday, September 17, 2014
669Wednesday, September 17, 2014
669Wednesday, September 17, 2014
0B
5
VINAFIX.COM
4
3
2
1
Haswell ( Power & GND )
VSSSENSE (61)
VSS_NCTFD2VSS_NCTF
VSS
VCC
E54
F54
VSS_NCTFG1VSS_NCTF
VSS_NCTF
VSS
VSS
VSS
F4
F40
F37
B27
A34
A32
VCC
VCC
VCC
R31 100R1%0402R31 100R1%0402
D50
VSS_SENSE
VSS
VSS
VSSF5VSS
VSS
VSS
F49
F44
G16
G13
G11
B42
B39
B36
B38
B34
B32
B31
B28
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U68I
U68I
9 OF 12
9 OF 12
U68F
U68F
6 OF 12
6 OF 12
VCC
D D
C C
GND GND
Y9
W54
W52
Y48
VSS
VSS
VCC
W50
D40
N46
VSS
VSS
D44
N47
VSS
VSS
VCC
D49
Y7
AR22
AB48
G18
VSS
VSSW7VSS
VSS
VSS
VSS
VSS
VSSP9VSS
VSS
VSS
VSS
VSS
VSS
VSSD8VSS
VSS
E11
P45
N9
VCCN8VCC
VCC
VCC
VSS
VSS
E24
E22
E19
E17
E16
E20
E21
E15
T46
T45
R46
R47
P46
VCC
VCCR9VCCR8VCC
VCC
VCCP8VCC
VSS
VCC
A49
E25
U46
VSS_NCTF
VSS
A50
E26
U47
VSS
VCC
VSS_NCTFA8VSS_NCTF
VSS
E30
BA1
VSS_NCTF
VSS_NCTFB4VSS_NCTF
VSS
VSS
E37
E33
V45
VCCU9VCCU8VCC
BA54
BB1
BB54
VSS_NCTF
VSS
VSS
E40
E44
E49
W46
V46
VCC
VCCV8VCC
VSS_NCTF
VSS
VCC
BD2
E51
W47
VSS_NCTF
VSS
BF6
BF5
BF49
BD53
BF50
C53
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSSF3VSS
VSSF2VSSE8VSS
VSS
F33
F30
F26
E53
A31
A28
A27
Y45
Y46
VCC
VCCY8VCC
VCC
VCC
VCCW8VCC
GND
+VCC_CORE
V48
VSS
VCC
U6
D19
N38
VSS
VCC
D22
N39
VSSU7VSS
VSS
VCC
D26
N40
VSS
VCC
D30
N42
VSS
VCC
D33
N43
W48
VSSV9VSSV7VSS
VSS
D37
N44
VCC
U54
U52
U50
VSS
VCC
T48
VSS
C33
M39
VCC
VSSU1VSSR7VSS
VSSC4VSS
VSS
C37
M42
M40
VCC
VCC
C40
M43
VSS
VCC
C44
M44
VSS
VCC
U48
C49
M45
VSS
VSSU5VSSU4VSSU3VSSU2VSS
VSSC8VSS
VSS
C52
M46
VCCM8VCC
D11
VSS
VSS
D15
N37
VCCM9VCC
N48
VSSM7VSS
VSS
VSS
BF30
K48
VCC
P4
VSSP7VSSP6VSS
VSS
VSS
VSS
VSSP5VSS
VSSP2VSSP1VSSN7VSSP3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BF38
BF36
BF33
BF41
L37
L38
VCC
VCC
VCCK9VCCK8VCC
VSS
VSS
BF7
C30
C26
C22
C19
C11
C15
BF46
BF48
BF43
M37
M38
L47
L46
L43
L44
L42
L39
L40
VCC
VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
M54
M52
M50
L48
M48
VSSJ7VSS
VSS
BD36
J38
VCC
K6
K1
VSS
VSS
VSS
VSSL7VSS
VSSK7VSSL9VSS
VSSK4VSSK3VSSK2VSSK5VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BD5
BE10
BD51
BD46
BD41
J45
J43
J42
J40
J39
VCC
VCC
VCC
VCC
VCC
VSS
VSS
BF22
BF18
BF15
BF26
BF10
BF12
BE46
BE41
BE36
BE15
K45
K46
K44
K43
K40
K38
J46
J48
VCC
VCC
VCC
VCC
VCC
VCCJ9VCCJ8VCC
VCC
J54
J51
J49
J44
H49
H44
VSS
G7
VSS
VSS
BC43
VSSG9VSS
VSSG8VSS
VSS
VSS
BC48
BC46
J10
VCC
VCCH9VCCH8VCC
H7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BC7
BC5
J14
BD18
BD15
BD10
BC50
BC52
J37
J36
J29
J33
J24
J19
VCC
VCC
VCC
VCC
VCC
VCC
VCC
G54
G52
G49
G44
G37
G33
G26
G30
G40
G25
G23
G20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HASWELL_BGA_E
HASWELL_BGA_E
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BC3
BC41
BC38
BC36
BC33
BC22
BC15
BC30
BC26
BC18
BC12
BC10
H48
H46
H45
H43
H42
H39
H40
H38
H36
H37
H33
H34
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
HASWELL_BGA_E
HASWELL_BGA_E
R48
P52
P50
P48
P54
B B
+VCC_CORE
+VCC_CORE
C79
C79 C1u25X0402
C1u25X0402
A A
GND GND GND GND GND GND GND GND GNDGND GNDGND GNDGND GND GND GNDGNDGND GND
5
C87
C87 C1u25X0402
C1u25X0402
VCC
VCC
AB8
AB45
AB46
C71
C71 C1u25X0402
C1u25X0402
VCC
VCC
AC46
VCC
VCC
VCC
VCC
VCC
VCC
AD8
AC8
AC9
AE47
AE46
AD46
AC47
C74
C74 C1u25X0402
C1u25X0402
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AF8
AE8
AG8
AH47
AH46
AG46
C86
C86 C1u25X0402
C1u25X0402
VCC
VCC
VCC
VCC
VCC
VCC
AK8
AH8
AJ45
AJ46
AK47
AK46
C84
C84 C1u25X0402
C1u25X0402
4
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AL9
AL8
AM9
AM8
AL46
AL45
AM47
AM46
C85
C85 C1u25X0402
C1u25X0402
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN16
AN17
AN15
AN14
AN13
AN12
AN10
C76
C76 C1u25X0402
C1u25X0402
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN25
AN26
AN23
AN24
AN21
AN20
AN19
C89
C89 C1u25X0402
C1u25X0402
VCC
VCC
VCC
VCC
VCC
VCC
AN38
AN36
AN34
AN32
AN29
AN30
AN27
C95
C95
C1u25X0402
C1u25X0402
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN44
AN43
AN42
AN41
AN40
AN39
C72
C72 C1u25X0402
C1u25X0402
3
VCC
VCC
VCC
VCC
VCC
VCC
AN9
AN8
AP12
AP10
AN46
AN45
VCC
VCC
VCC
VCC
AP16
AP15
AP14
AP13
C77
C77 C1u25X0402
C1u25X0402
VCC
VCC
VCC
AP18
AP19
AP17
VCC
VCC
VCC
VCC
AP23
AP22
AP21
AP20
C69
C69 C1u25X0402
C1u25X0402
VCC
VCC
AP25
AP24
VCC
VCC
VCC
AP29
AP26
AP27
C81
C81 C1u25X0402
C1u25X0402
VCC
VCC
VCC
VCC
AP32
AP33
AP31
AP30
VCC
VCC
VCC
AP36
AP35
AP34
C94
C94 C1u25X0402
C1u25X0402
2
VCC
VCC
VCC
AP40
AP39
AP37
AP38
VCC
VCC
AP42
AP41
C88
C88 C1u25X0402
C1u25X0402
VCC
VCC
VCC
VCC
VCC
AP47
AP44
AP46
AP43
VCC
VCC
VCC
VCC
VCC
VCC
AP9
AP8
AR41
AR37
AR39
AR35
C80
C80 C1u25X0402
C1u25X0402
Title
Title
Title
CPU-6 ( Power & GND )
CPU-6 ( Power & GND )
CPU-6 ( Power & GND )
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet of
Date: Sheet of
Date: Sheet of
VCC
AR43
VCC
VCC
AR46
AR45
VCC
VCC
VCC
H32
H31
H30
C70
C70 C1u25X0402
C1u25X0402
C73
C73 C1u25X0402
C1u25X0402
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
1
C78
C78 C1u25X0402
C1u25X0402
0B
0B
769Wednesday, September 17, 2014
769Wednesday, September 17, 2014
769Wednesday, September 17, 2014
0B
5
VINAFIX.COM
HASWELL_BGA_E
HASWELL_BGA_E
U68G
U68G
A11
VSS
A15
VSS
A19
VSS
A22
D D
C C
B B
A26 A30 A33 A37 A40
A44 AA1 AA2 AA3 AA4
AA48
AA5 AA7 AB5
AB51 AB52 AB53 AB54
AB7 AB9
AC48
AC5
AC50
AC7
AD48 AD51 AD54
AD7 AD9 AE1 AE2 AE3 AE4
AE48
AE5
AE50
AE7
AF5
AF6
AF7
AG48
AG5
AG51 AG52 AG53 AG54
AG7 AG9 AH1 AH2 AH3 AH4
AH48
AH5
AH50
AH7
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
7 OF 12
7 OF 12
4
Haswell ( GND )
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AJ48 AJ51 AJ54 AK48 AK5 AK50 AK7 AK9 AL1 AL4 AL48 AL5 AL7 AM5 AM51 AM52 AM53 AM54 AM7 AN1 AN2 AN3 AN4 AN48 AN5 AN50 AN7 AP51 AP54 AP7 AR12 AR14 AR16 AR18 AR20 AR24 AR26 AR48 AR5 AR50 AR7 AR8 AR9 AT1 AT10 AT12 AT15 AT16 AT18 AT20 AT22 AT25 AT26 AT29 AT33 AT35 AT37 AT39 AT4
3
U68H
U68H
AT40
VSS
AT42
VSS
AT43
VSS
AT45
VSS
AT46
VSS
AT47
VSS
AT49
VSS
AT5
VSS
AT50
VSS
AT51
VSS
AT52
VSS
AT53
VSS
AT54
VSS
AT6
VSS
AT8
VSS
AT9
VSS
AU13
VSS
AU18
VSS
AU22
VSS
AU25
VSS
AU29
VSS
AU33
VSS
AU37
VSS
AU42
VSS
AU5
VSS
AU9
VSS
AV1
VSS
AV13
VSS
AV18
VSS
AV2
VSS
AV22
VSS
AV25
VSS
AV29
VSS
AV3
VSS
AV33
VSS
AV4
VSS
AV42
VSS
AV5
VSS
AV50
VSS
AV9
VSS
AW13
VSS
AW18
VSS
AW37
VSS
AW42
VSS
AW43
VSS
AW45
VSS
AW46
VSS
AW47
VSS
AW49
VSS
AW5
VSS
AW50
VSS
AW51
VSS
AW54
VSS
AW9
VSS
AY13
VSS
AY22
VSS
AY25
VSS
AY29
VSS
AY33
VSS
AY37
VSS
AY42
VSS
2
HASWELL_BGA_E
HASWELL_BGA_E
8 OF 12
8 OF 12
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AY50 AY9 B11 B15 B19 B22 B26 B30 B33 B37 B40 B44 B49 B8 BA13 BA18 BA22 BA25 BA29 BA33 BA37 BA4 BA42 BA5 BA50 BA51 BA52 BA53 BA9 BB10 BB11 BB12 BB14 BB15 BB16 BB17 BB18 BB20 BB23 BB25 BB28 BB32 BB33 BB37 BB38 BB39 BB41 BB42 BB43 BB44 BB46 BB47 BB48 BB49 BB5 BB6 BB7 BB9
1
A A
5
4
3
GND GNDGNDGND
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
CPU-5 ( GND )
CPU-5 ( GND )
CPU-5 ( GND )
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
0B
0B
MS-16J1
MS-16J1
MS-16J1
Date: Sheet
Date: Sheet
Date: Sheet
2
of
869Wednesday, September 17, 2014
of
869Wednesday, September 17, 2014
of
869Wednesday, September 17, 2014
1
0B
5
VINAFIX.COM
4
3
2
1
SODIMM#A
SOCKET1A
M_A_DQ[63:0](4)
D D
C C
B B
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
SOCKET1A
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
DDR3SODIMM-204PS_BLACK-RH-35
DDR3SODIMM-204PS_BLACK-RH-35
N13-2040750-L41
N13-2040750-L41
REV.
A10/AP
A11
A12/BC#
A13 A14 A15
BA0 BA1 BA2
S0# S1#
CK0
CK0#
CK1
CK1# CKE0 CKE1 CAS# RAS#
WE#
SA0 SA1 SCL
SDA
ODT0 ODT1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
97 96 95 92 91 90 86 89 85 107 84 83 119 80 78
109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200
116 120
11 28 46 63 136 153 170 187
12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186
M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
SA0_DIM0 SA1_DIM0
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
+1_35VDIMM+1_35VDIMM
M_A_BS0 (4) M_A_BS1 (4) M_A_BS2 (4) M_A_CS#0 (4) M_A_CS#1 (4) M_A_CLK_DDR0 (4) M_A_CLK_DDR#0 (4) M_A_CLK_DDR1 (4) M_A_CLK_DDR#1 (4) M_A_CKE0 (4) M_A_CKE1 (4) M_A_CAS# (4) M_A_RAS# (4) M_A_WE# (4)
SMB_CLK_DIMM (10,34) SMB_DATA_DIMM (10,34)
M_A_ODT0 (4) M_A_ODT1 (4)
M1(used for S3) M3(used for S0),maybe to over-ride Active when soft-start
M_A_A0
98
M_A_A[15:0] (4)
M_A_DQS[7:0] (4)
M_A_DQS#[7:0] (4)
+1_35VDIMM +1_35VDIMM
C367
C375
C375 C1u25X0402
C1u25X0402
GND GND GND GND GND GND GNDGND
SA0_DIM0
SA1_DIM0
1 2
JNC8 X_0402JNC8 X_0402
1 2
JNC9 X_0402JNC9 X_0402
C367 C1u25X0402
C1u25X0402
+3VRUN
C372
C372 C0.1u50X70402
C0.1u50X70402
DDR3_DRAMRST#(3,10)
M_VREF_DQ_DIMM0_R
C371
C371 C0.1u50X70402
C0.1u50X70402
M_VREF_CA_DIMM0
C383
C383 C0.1u50X70402
C0.1u50X70402
GND
GND
C373
C373 C1u25X0402
C1u25X0402
C365
C365 C2.2u6.3X0402
C2.2u6.3X0402
C364
C364 C2.2u6.3X0402
C2.2u6.3X0402
C382
C382 C2.2u6.3X0402
C2.2u6.3X0402
C405
C405 C1u25X0402
C1u25X0402
+1_35VDIMM
SOCKET1B
SOCKET1B
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
DDR3SODIMM-204PS_BLACK-RH-35
DDR3SODIMM-204PS_BLACK-RH-35
N13-2040750-L41
N13-2040750-L41
C392
C392 C10u6.3X5-HF
C10u6.3X5-HF
C393
C393 C10u6.3X5-HF
C10u6.3X5-HF
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
MEC1
MEC2
VTT VTT
205 206
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
MEC1
MEC2 203 204
205 206
C377
C377 C10u6.3X5-HF
C10u6.3X5-HF
C366
C366 C1u25X0603
C1u25X0603
C376
C376 C10u6.3X5-HF
C10u6.3X5-HF
+0_675VRUN
C395
C395 C1u25X0603
C1u25X0603
R149
R149 1KR1%0402
1KR1%0402
M_VREF_DQ_DIMM0_R M_VREF_CA_DIMM0DQ_A
A A
R150
R150 1KR1%0402
1KR1%0402
5
Close to DIMM
R147 X_0R1%0402R147 X_0R1%0402R148 2R1%0402R148 2R1%0402
C363
C363 C0.022u10X0402
C0.022u10X0402
R146
R146
24.9R1%0402
24.9R1%0402
R153
R153 1KR1%0402
1KR1%0402
M_VREF_DQ_DIMMA (4) DIMM_SM_VREF (4,10)
R157 2R1%0402R157 2R1%0402
GC GC
R156
R156 1KR1%0402
1KR1%0402
GND GNDGND GND
4
Close to DIMM
CA_A
R155 X_0R1%0402R155 X_0R1%0402
C385
C385 C0.022u10X0402
C0.022u10X0402
R160
R160
24.9R1%0402
24.9R1%0402
3
Vref DQ & CA
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
DDR3L SODIMM 0
DDR3L SODIMM 0
DDR3L SODIMM 0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
969Wednesday, September 17, 2014
969Wednesday, September 17, 2014
969Wednesday, September 17, 2014
1
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
SODIMM#B
SOCKET2A
M_B_DQ[63:0](4)
D D
C C
B B
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
REV.
+1_35VDIMM
R161
R161 1KR1%0402
1KR1%0402
R163 2R1%0402R163 2R1%0402
A A
R164
R164 1KR1%0402
1KR1%0402
5
SOCKET2A
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
DDR3SODIMM-204PS_BLACK-RH-4
DDR3SODIMM-204PS_BLACK-RH-4
N13-2041200-CK3
N13-2041200-CK3
A12/BC#
Close to DIMM
R158 X_0R1%0402R158 X_0R1%0402
C384
C384 C0.022u10X0402
C0.022u10X0402
R159
R159
24.9R1%0402
24.9R1%0402
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
A10/AP
A11
A13 A14 A15
BA0 BA1 BA2
S0# S1#
CK0
CK0#
CK1 CK1# CKE0 CKE1 CAS# RAS#
WE#
SA0
SA1
SCL
SDA
ODT0 ODT1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
M_VREF_DQ_DIMMB (4) DIMM_SM_VREF (4,9)
97 96 95 92 91 90 86 89 85 107 84 83 119 80 78
109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200
116 120
11 28 46 63 136 153 170 187
12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186
4
M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
SA0_DIM1 SA1_DIM1
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
+1_35VDIMM
M_B_BS0 (4) M_B_BS1 (4) M_B_BS2 (4) M_B_CS#0 (4) M_B_CS#1 (4) M_B_CLK_DDR0 (4) M_B_CLK_DDR#0 (4) M_B_CLK_DDR1 (4) M_B_CLK_DDR#1 (4) M_B_CKE0 (4) M_B_CKE1 (4) M_B_CAS# (4) M_B_RAS# (4) M_B_WE# (4)
SMB_CLK_DIMM (9,34) SMB_DATA_DIMM (9,34)
M_B_ODT0 (4) M_B_ODT1 (4)
R191
R191 1KR1%0402
1KR1%0402
R190
R190 1KR1%0402
1KR1%0402
GND GNDGNDGND
M_B_A0
98
M_B_A[15:0] (4)
M_B_DQS[7:0] (4)
M_B_DQS#[7:0] (4)
R193 2R1%0402R193 2R1%0402
+1_35VDIMM
C370
C404
C404 C10u6.3X5-HF
C10u6.3X5-HF
GND GND GNDGND GND GND GNDGND
SA0_DIM1
JNC10 X_0402JNC10 X_0402
SA1_DIM1
R162 10KR1%0402R162 10KR1%0402
C370 C10u6.3X5-HF
C10u6.3X5-HF
12
+3VRUN
C390
C390 C0.1u50X70402
C0.1u50X70402
DDR3_DRAMRST#(3,9)
M_VREF_DQ_DIMM1_R
C397
C397 C0.1u50X70402
C0.1u50X70402
M_VREF_CA_DIMM1
C408
C408 C0.1u50X70402
C0.1u50X70402
GND
+3VRUN
C403
C403 C10u6.3X5-HF
C10u6.3X5-HF
C398
C398 C2.2u6.3X0402
C2.2u6.3X0402
C391
C391 C2.2u6.3X0402
C2.2u6.3X0402
C407
C407 C2.2u6.3X0402
C2.2u6.3X0402
Close to DIMM
CA_BM_VREF_DQ_DIMM1_R DQ_B M_VREF_CA_DIMM1
R188 X_0R1%0402R188 X_0R1%0402
C409
C409 C0.022u10X0402
C0.022u10X0402
R192
R192
24.9R1%0402
24.9R1%0402
Vref DQ & CA
3
C369
C369 C10u6.3X5-HF
C10u6.3X5-HF
+1_35VDIMM
+1_35VDIMM
C406
C406 C1u25X0402
C1u25X0402
SOCKET2B
SOCKET2B
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
DDR3SODIMM-204PS_BLACK-RH-4
DDR3SODIMM-204PS_BLACK-RH-4
N13-2041200-CK3
N13-2041200-CK3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
C399
C399 C1u25X0402
C1u25X0402
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
MEC1
MEC2
VTT VTT
205 206
DDR3L SODIMM 1
DDR3L SODIMM 1
DDR3L SODIMM 1
MS-16J1
MS-16J1
MS-16J1
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
MEC1
MEC2 203 204
205 206
C368
C368 C1u25X0402
C1u25X0402
C374
C374 C1u25X0603
C1u25X0603
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
C287
C287 C1u25X0402
C1u25X0402
+0_675VRUN
C400
C400 C1u25X0603
C1u25X0603
1
0B
0B
10 69Wednesday, September 17, 2014
10 69Wednesday, September 17, 2014
10 69Wednesday, September 17, 2014
0B
5
VINAFIX.COM
4
3
2
1
TPJNC21TPJNC21
PEX_RST#(26)
R131 100KR0402R131 100KR0402
GND
3V3_AON
D D
C C
B B
A A
GFX_REFCLK(33) GFX_REFCLK#(33)
PEG_RXP15(3) PEG_RXN15(3)
PEG_TXP15(3) PEG_TXN15(3)
PEG_RXP14(3) PEG_RXN14(3)
PEG_TXP14(3) PEG_TXN14(3)
PEG_RXP13(3) PEG_RXN13(3)
PEG_TXP13(3) PEG_TXN13(3)
PEG_RXP12(3) PEG_RXN12(3)
PEG_TXP12(3) PEG_TXN12(3)
PEG_RXP11(3) PEG_RXN11(3)
PEG_TXP11(3) PEG_TXN11(3)
PEG_RXP10(3) PEG_RXN10(3)
PEG_TXP10(3) PEG_TXN10(3)
PEG_RXP9(3) PEG_RXN9(3)
PEG_TXP9(3) PEG_TXN9(3)
PEG_RXP8(3) PEG_RXN8(3)
PEG_TXP8(3) PEG_TXN8(3)
PEG_RXP7(3) PEG_RXN7(3)
PEG_TXP7(3) PEG_TXN7(3)
PEG_RXP6(3) PEG_RXN6(3)
PEG_TXP6(3) PEG_TXN6(3)
PEG_RXP5(3) PEG_RXN5(3)
PEG_TXP5(3) PEG_TXN5(3)
PEG_RXP4(3) PEG_RXN4(3)
PEG_TXP4(3) PEG_TXN4(3)
PEG_RXP3(3) PEG_RXN3(3)
PEG_TXP3(3) PEG_TXN3(3)
PEG_RXP2(3) PEG_RXN2(3)
PEG_TXP2(3) PEG_TXN2(3)
PEG_RXP1(3) PEG_RXN1(3)
PEG_TXP1(3) PEG_TXN1(3)
PEG_RXP0(3) PEG_RXN0(3)
PEG_TXP0(3) PEG_TXN0(3)
R87 100KR0402R87 100KR0402
C292 C0.22u16X0402-HFC292 C0.22u16X0402-HF C280 C0.22u16X0402-HFC280 C0.22u16X0402-HF
C615 C0.22u16X0402-HFC615 C0.22u16X0402-HF C610 C0.22u16X0402-HFC610 C0.22u16X0402-HF
C278 C0.22u16X0402-HFC278 C0.22u16X0402-HF C266 C0.22u16X0402-HFC266 C0.22u16X0402-HF
C609 C0.22u16X0402-HFC609 C0.22u16X0402-HF C604 C0.22u16X0402-HFC604 C0.22u16X0402-HF
C264 C0.22u16X0402-HFC264 C0.22u16X0402-HF C258 C0.22u16X0402-HFC258 C0.22u16X0402-HF
C603 C0.22u16X0402-HFC603 C0.22u16X0402-HF C602 C0.22u16X0402-HFC602 C0.22u16X0402-HF
C256 C0.22u16X0402-HFC256 C0.22u16X0402-HF C252 C0.22u16X0402-HFC252 C0.22u16X0402-HF
C601 C0.22u16X0402-HFC601 C0.22u16X0402-HF C590 C0.22u16X0402-HFC590 C0.22u16X0402-HF
C241 C0.22u16X0402-HFC241 C0.22u16X0402-HF C249 C0.22u16X0402-HFC249 C0.22u16X0402-HF
C589 C0.22u16X0402-HFC589 C0.22u16X0402-HF C588 C0.22u16X0402-HFC588 C0.22u16X0402-HF
C238 C0.22u16X0402-HFC238 C0.22u16X0402-HF C230 C0.22u16X0402-HFC230 C0.22u16X0402-HF
C587 C0.22u16X0402-HFC587 C0.22u16X0402-HF C586 C0.22u16X0402-HFC586 C0.22u16X0402-HF
C228 C0.22u16X0402-HFC228 C0.22u16X0402-HF C215 C0.22u16X0402-HFC215 C0.22u16X0402-HF
C585 C0.22u16X0402-HFC585 C0.22u16X0402-HF C584 C0.22u16X0402-HFC584 C0.22u16X0402-HF
C214 C0.22u16X0402-HFC214 C0.22u16X0402-HF C209 C0.22u16X0402-HFC209 C0.22u16X0402-HF
C583 C0.22u16X0402-HFC583 C0.22u16X0402-HF C582 C0.22u16X0402-HFC582 C0.22u16X0402-HF
C205 C0.22u16X0402-HFC205 C0.22u16X0402-HF C198 C0.22u16X0402-HFC198 C0.22u16X0402-HF
C580 C0.22u16X0402-HFC580 C0.22u16X0402-HF C578 C0.22u16X0402-HFC578 C0.22u16X0402-HF
C196 C0.22u16X0402-HFC196 C0.22u16X0402-HF C190 C0.22u16X0402-HFC190 C0.22u16X0402-HF
C577 C0.22u16X0402-HFC577 C0.22u16X0402-HF C575 C0.22u16X0402-HFC575 C0.22u16X0402-HF
C189 C0.22u16X0402-HFC189 C0.22u16X0402-HF C181 C0.22u16X0402-HFC181 C0.22u16X0402-HF
C573 C0.22u16X0402-HFC573 C0.22u16X0402-HF C570 C0.22u16X0402-HFC570 C0.22u16X0402-HF
C180 C0.22u16X0402-HFC180 C0.22u16X0402-HF C172 C0.22u16X0402-HFC172 C0.22u16X0402-HF
C569 C0.22u16X0402-HFC569 C0.22u16X0402-HF C566 C0.22u16X0402-HFC566 C0.22u16X0402-HF
C170 C0.22u16X0402-HFC170 C0.22u16X0402-HF C156 C0.22u16X0402-HFC156 C0.22u16X0402-HF
C565 C0.22u16X0402-HFC565 C0.22u16X0402-HF C563 C0.22u16X0402-HFC563 C0.22u16X0402-HF
C153 C0.22u16X0402-HFC153 C0.22u16X0402-HF C145 C0.22u16X0402-HFC145 C0.22u16X0402-HF
C562 C0.22u16X0402-HFC562 C0.22u16X0402-HF C560 C0.22u16X0402-HFC560 C0.22u16X0402-HF C231
C144 C0.22u16X0402-HFC144 C0.22u16X0402-HF C124 C0.22u16X0402-HFC124 C0.22u16X0402-HF
C559 C0.22u16X0402-HFC559 C0.22u16X0402-HF C555 C0.22u16X0402-HFC555 C0.22u16X0402-HF
C123 C0.22u16X0402-HFC123 C0.22u16X0402-HF C115 C0.22u16X0402-HFC115 C0.22u16X0402-HF
C554 C0.22u16X0402-HFC554 C0.22u16X0402-HF C553 C0.22u16X0402-HFC553 C0.22u16X0402-HF
5
VIA_PEX_WAKE
PEX_CLKREQ#
PEG_C_TXP15_JNC PEG_C_TXN15_JNC
PEG_C_RXP15_JNC PEG_C_RXN15_JNC
PEG_C_TXP14_JNC PEG_C_TXN14_JNC
PEG_C_RXP14_JNC PEG_C_RXN14_JNC
PEG_C_TXP13_JNC PEG_C_TXN13_JNC
PEG_C_RXP13_JNC PEG_C_RXN13_JNC
PEG_C_TXP12_JNC PEG_C_TXN12_JNC
PEG_C_RXP12_JNC PEG_C_RXN12_JNC
PEG_C_TXP11_JNC PEG_C_TXN11_JNC
PEG_C_RXP11_JNC PEG_C_RXN11_JNC
PEG_C_TXP10_JNC PEG_C_TXN10_JNC
PEG_C_RXP10_JNC PEG_C_RXN10_JNC
PEG_C_TXP9_JNC PEG_C_TXN9_JNC
PEG_C_RXP9_JNC PEG_C_RXN9_JNC
PEG_C_TXP8_JNC PEG_C_TXN8_JNC
PEG_C_RXP8_JNC PEG_C_RXN8_JNC
PEG_C_TXP7_JNC PEG_C_TXN7_JNC
PEG_C_RXP7_JNC PEG_C_RXN7_JNC
PEG_C_TXP6_JNC PEG_C_TXN6_JNC
PEG_C_RXP6_JNC PEG_C_RXN6_JNC
PEG_C_TXP5_JNC PEG_C_TXN5_JNC
PEG_C_RXP5_JNC PEG_C_RXN5_JNC
PEG_C_TXP4_JNC PEG_C_TXN4_JNC
PEG_C_RXP4_JNC PEG_C_RXN4_JNC
PEG_C_TXP3_JNC PEG_C_TXN3_JNC
PEG_C_RXP3_JNC PEG_C_RXN3_JNC
PEG_C_TXP2_JNC PEG_C_TXN2_JNC
PEG_C_RXP2_JNC PEG_C_RXN2_JNC
PEG_C_TXP1_JNC PEG_C_TXN1_JNC
PEG_C_RXP1_JNC PEG_C_RXN1_JNC
PEG_C_TXP0_JNC PEG_C_TXN0_JNC
PEG_C_RXP0_JNC PEG_C_RXN0_JNC
BJ21
BE20
BB20
BD20 BC20
BC21 BD21
BH21 BG21
BE22 BE23
BG23 BH23
BD23 BC23
BJ23 BJ24
BC24 BD24
BH24 BG24
BE26 BE25
BG26 BH26
BD26 BC26
BJ26 BJ27
BC27 BD27
BH27 BG27
BE28 BE29
BG29 BH29
BD29 BC29
BJ29 BJ30
BC30 BD30
BH30 BG30
BE31 BE32
BG32 BH32
BD32 BC32
BJ32 BJ33
BC33 BD33
BH33 BG33
BE34 BE35
BG35 BH35
BD35 BC35
BJ35 BJ36
BC36 BD36
BH36 BG36
G18A
G18A
1/21 PCI_EXPRESS
1/21 PCI_EXPRESS
PEX_WAKE*
PEX_RST*
PEX_CLKREQ*
PEX_REFCLK PEX_REFCLK*
PEX_TX0 PEX_TX0*
PEX_RX0 PEX_RX0*
PEX_TX1 PEX_TX1*
PEX_RX1 PEX_RX1*
PEX_TX2 PEX_TX2*
PEX_RX2 PEX_RX2*
PEX_TX3 PEX_TX3*
PEX_RX3 PEX_RX3*
PEX_TX4 PEX_TX4*
PEX_RX4 PEX_RX4*
PEX_TX5 PEX_TX5*
PEX_RX5 PEX_RX5*
PEX_TX6 PEX_TX6*
PEX_RX6 PEX_RX6*
PEX_TX7 PEX_TX7*
PEX_RX7 PEX_RX7*
PEX_TX8 PEX_TX8*
PEX_RX8 PEX_RX8*
PEX_TX9 PEX_TX9*
PEX_RX9 PEX_RX9*
PEX_TX10 PEX_TX10*
PEX_RX10 PEX_RX10*
PEX_TX11 PEX_TX11*
PEX_RX11 PEX_RX11*
PEX_TX12 PEX_TX12*
PEX_RX12 PEX_RX12*
PEX_TX13 PEX_TX13*
PEX_RX13 PEX_RX13*
PEX_TX14 PEX_TX14*
PEX_RX14 PEX_RX14*
PEX_TX15 PEX_TX15*
PEX_RX15 PEX_RX15*
N16E-GT
N16E-GT
4
GPU PCI EXPRESS
PEX_IOVDD-1 PEX_IOVDD-2 PEX_IOVDD-3 PEX_IOVDD-4 PEX_IOVDD-5 PEX_IOVDD-6 PEX_IOVDD-7
PEX_IOVDDQ-1 PEX_IOVDDQ-2 PEX_IOVDDQ-3 PEX_IOVDDQ-4 PEX_IOVDDQ-5 PEX_IOVDDQ-6 PEX_IOVDDQ-7 PEX_IOVDDQ-8
PEX_IOVDDQ-9 PEX_IOVDDQ-10 PEX_IOVDDQ-11 PEX_IOVDDQ-12 PEX_IOVDDQ-13 PEX_IOVDDQ-14
PEX_PLL_HVDD
PEX_SVDD_3V3
VDD_SENSE
GND_SENSE
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT*
PEX_PLLVDD
TESTMODE
PEX_TERMP
AW33 AY32 AY33 AY35 BA33 BA35 BB33
AY24 AY26 AY27 AY29 AY30 BA24 BA26 BA27 BA29 BA30 BA32 BB24 BB27 BB30
AW30
AW32
GPU to R <9842mils
AY23
AW23
GPU to R <9842mils
PEX_TEST_PLL_CLK_OUT Termination = 200ohm
PEX_PLL_CLK_OUT
BH38
PEX_PLL_CLK_OUT*
BG38
PEX_PLLVDD_L
AW26
GPU_TESTMODE
BA23
PEX_TERMP
BJ38
Outside of BGAClose Balls
C220
C159
C159 C1u6.3X60402
C1u6.3X60402
GND GND GND GND GND GND GND
1uF*4 X6S
C239
C239 C1u6.3X60402
C1u6.3X60402
GND GND GNDGND GND GND GND
C220 C1u6.3X60402
C1u6.3X60402
C194
C194 C1u6.3X60402
C1u6.3X60402
C330
C330 C4.7u6.3X6S
C4.7u6.3X6S
4.7uF*2 X6S
C331
C331 C4.7u6.3X6S
C4.7u6.3X6S
C342
C342 C10u4X60603
C10u4X60603
C640
C640 C10u4X60603
C10u4X60603
10uF*4 X6S 4V 22uF*4 X5R
C11-106A233-T04
C638
C341
C341 C10u4X60603
C10u4X60603
C638 C10u4X60603
C10u4X60603
W>16mils, 2.4A
C335
C335 C22u6.3X0603
C22u6.3X0603
W>16mils, 2.4A
C333
C333 C22u6.3X0603
C22u6.3X0603
0.1uF*1 X5R 4.7uF*2 X6S
W>20mils, 1A 14mils per pin on CRB
Close Balls
C185
C185 C0.1u50X70402
C0.1u50X70402
GND GND GND
NVVDD_O
R33
R33 100R1%0402
100R1%0402
NVVDD_SENSE_GPU (60)
NVVDD_GND_SENSE_GPU (60)
R35
R35 100R1%0402
100R1%0402
Near PWM
GND
Outside of BGA
C173
C173 C4.7u6.3X6S
C4.7u6.3X6S
R to PWM <1968mils
R to PWM <1968mils
R47 X_200R1%0402R47 X_200R1%0402
W>12mils
R86 10KR1%0402R86 10KR1%0402
R325 2.49KR1%0402R325 2.49KR1%0402
3
C154
C154 C4.7u6.3X6S
C4.7u6.3X6S
0.1uF*1 X7R
C231 C0.1u50X70402
C0.1u50X70402
GND
GND GND GND
GND
3V3_AON
GPU CLK REQ#
DGPU_PWRGD(26,31,37,44)
1uF*1 X7R
PLACE OUTSIDE OF BGA
C107
C107 C1u25X70603
C1u25X70603
2
R91 0R0402R91 0R0402
4.7uF*1 X6S
C99
C99 C4.7u6.3X6S
C4.7u6.3X6S
Title
Title
Title
DGPU_PCI-E Host
DGPU_PCI-E Host
DGPU_PCI-E Host
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet
Date: Sheet of
Date: Sheet of
PEX_VDD
C625
C625 C22u6.3X0603
C22u6.3X0603
PEX_VDD
C624
C624 C22u6.3X0603
C22u6.3X0603
PEX_CLKREQ
PEX_CLKREQ#
1 2
JNC4 X_0603JNC4 X_0603
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
DS
G
GND
PEX_VDD
GPU_CLKREQ# (33)
DS
Q5
Q5
G
N-2N7002_SOT23
N-2N7002_SOT23
GND
Q4
Q4 X_N-2N7002_SOT23
X_N-2N7002_SOT23
1
0B
0B
of
11 69Wednesday, September 17, 2014
11 69Wednesday, September 17, 2014
11 69Wednesday, September 17, 2014
0B
5
VINAFIX.COM
4
3
2
1
GPU Frame Buffer Partition A/B
G18B
G18B
2/21 FBA
2/21 FBA
FBA_D<0>(13) FBA_D<1>(13) FBA_D<2>(13) FBA_D<3>(13)
D D
C C
B B
FBA_D<4>(13) FBA_D<5>(13) FBA_D<6>(13) FBA_D<7>(13) FBA_D<8>(13) FBA_D<9>(13) FBA_D<10>(13) FBA_D<11>(13) FBA_D<12>(13) FBA_D<13>(13) FBA_D<14>(13) FBA_D<15>(13) FBA_D<16>(13) FBA_D<17>(13) FBA_D<18>(13) FBA_D<19>(13) FBA_D<20>(13) FBA_D<21>(13) FBA_D<22>(13) FBA_D<23>(13) FBA_D<24>(13) FBA_D<25>(13) FBA_D<26>(13) FBA_D<27>(13) FBA_D<28>(13) FBA_D<29>(13) FBA_D<30>(13) FBA_D<31>(13) FBA_D<32>(14) FBA_D<33>(14) FBA_D<34>(14) FBA_D<35>(14) FBA_D<36>(14) FBA_D<37>(14) FBA_D<38>(14) FBA_D<39>(14) FBA_D<40>(14) FBA_D<41>(14) FBA_D<42>(14) FBA_D<43>(14) FBA_D<44>(14) FBA_D<45>(14) FBA_D<46>(14) FBA_D<47>(14) FBA_D<48>(14) FBA_D<49>(14) FBA_D<50>(14) FBA_D<51>(14) FBA_D<52>(14) FBA_D<53>(14) FBA_D<54>(14) FBA_D<55>(14) FBA_D<56>(14) FBA_D<57>(14) FBA_D<58>(14) FBA_D<59>(14) FBA_D<60>(14) FBA_D<61>(14) FBA_D<62>(14) FBA_D<63>(14)
FBA_DBI<0>(13) FBA_DBI<1>(13) FBA_DBI<2>(13) FBA_DBI<3>(13) FBA_DBI<4>(14) FBA_DBI<5>(14) FBA_DBI<6>(14) FBA_DBI<7>(14)
FBA_EDC<0>(13) FBA_EDC<1>(13) FBA_EDC<2>(13) FBA_EDC<3>(13) FBA_EDC<4>(14) FBA_EDC<5>(14) FBA_EDC<6>(14) FBA_EDC<7>(14)
W> 12mils
A A
GPU_PLLVDD(27)
GPU_PLLVDD
C308
C308 C0.1u50X70402
C0.1u50X70402
GND GND
5
V43 V41 V44 V42 U43 U44 U41
U42 AA46 AC46 AA45 AA47
Y46
Y49
Y45
Y48
AJ46 AG47 AG46 AG45
AF44
AF45 AD46 AD45 AD44 AD43 AD42 AC42 AA44 AA43 AA42 AA40
AT48
AT46
AT49
AT47
AW47 AW48
BA47
AW46
AR46 AN45 AR49 AR48
AT45 AR44 AN41 AN42 AG40 AG43 AG41
AJ43
AJ40 AK40 AK42 AK41 AK45 AK43 AK48 AK49 AM45 AM44 AK44 AM43
U40 AC45 AG44 AA41 AV45 AR45 AG42 AM46
U45
Y43
AF42 AC44 AV47 AN43
AJ42 AK47
U46 Y44
AF43 AC43 AV46 AN44
AJ41 AK46
AC39
L21
C255
C255 C0.1u50X70402
C0.1u50X70402
FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FB_PLL_DLL_REFPLL_AVDD0 FB_PLL_DLL_REFPLL_AVDD1
N16E-GT
N16E-GT
N16E FBA_CMD34
FBA_CMD35
FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31 FBA_CMD32 FBA_CMD33
FBA_DEBUG0 FBA_DEBUG1
FBA_WCK01
FBA_WCK01*
FBA_WCKB01
FBA_WCKB01*
FBA_WCK23
FBA_WCK23*
FBA_WCKB23
FBA_WCKB23*
FBA_WCK45
FBA_WCK45*
FBA_WCKB45
FBA_WCKB45*
FBA_WCK67
FBA_WCK67*
FBA_WCKB67
FBA_WCKB67*
FBA_PLL_AVDD
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
4
U47 U48 U49 V48 V49 V47 AA49 AA48 AC48 AC49 AC47 AD49 AD48 AD47 AF47 AF48 BB49 BA48 BA49 AW49 AV48 AV49 AN48 AN49 AM47 AM49 AM48 AJ47 AJ49 AJ48 AG48 AG49 AF49 AF46
Y47 AR47
AF41 AF40 AJ44 AJ45
V46 V45 Y42 Y41 AD41 AD40 AC41 AC40 AT44 AT43 AR43 AR42 AM42 AM41 AN47 AN46
W> 16mils, 0.5A
PLACE AT BALLS
FB_PLLAVDD
AJ39
0.1uF*1 X7R
FBA_CMD<0> (13) FBA_CMD<1> (13) FBA_CMD<2> (13) FBA_CMD<3> (13) FBA_CMD<4> (13) FBA_CMD<5> (13) FBA_CMD<6> (13) FBA_CMD<7> (13) FBA_CMD<8> (13) FBA_CMD<9> (13) FBA_CMD<10> (13) FBA_CMD<11> (13) FBA_CMD<12> (13) FBA_CMD<13> (13) FBA_CMD<14> (13) FBA_CMD<15> (13) FBA_CMD<16> (14) FBA_CMD<17> (14) FBA_CMD<18> (14) FBA_CMD<19> (14) FBA_CMD<20> (14) FBA_CMD<21> (14) FBA_CMD<22> (14) FBA_CMD<23> (14) FBA_CMD<24> (14) FBA_CMD<25> (14) FBA_CMD<26> (14) FBA_CMD<27> (14) FBA_CMD<28> (14) FBA_CMD<29> (14) FBA_CMD<30> (14) FBA_CMD<31> (14)
FBA_CLK0 (13) FBA_CLK0* (13) FBA_CLK1 (14) FBA_CLK1* (14)
FBA_WCK01 (13) FBA_WCK01* (13)
FBA_WCK23 (13) FBA_WCK23* (13)
FBA_WCK45 (14) FBA_WCK45* (14)
FBA_WCK67 (14) FBA_WCK67* (14)
C138
C138 C0.1u50X70402
C0.1u50X70402
GND
FBVDDQ
R292
GND
FBVDDQ
GND
R292 10KR1%0402
10KR1%0402
R306
R306 10KR1%0402
10KR1%0402
R304
R304 10KR1%0402
10KR1%0402
R57
R57 10KR1%0402
10KR1%0402
FBA_CMD<1> FBA_CMD<17>
FBA_CMD<2> FBA_CMD<18>
FBB_CMD<1> FBB_CMD<17>
FBB_CMD<2> FBB_CMD<18>
R305
R305 10KR1%0402
10KR1%0402
R307
R307 10KR1%0402
10KR1%0402
R59
R59 10KR1%0402
10KR1%0402
R303
R303 10KR1%0402
10KR1%0402
GDDR5 Mode F Mapping By GB3-256
CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 CMD8 CMD9 CMD10 CMD11 CMD12 CMD13 CMD14 CMD15 CMD16 CMD17 CMD18 CMD19 CMD20 CMD21 CMD22 CMD23 CMD24 CMD25 CMD26 CMD27 CMD28 CMD29 CMD30 CMD31
0..31
CAS* CKE* RST* RAS* A1_A9 A0_A10 A12_RFU ABI* A6_A11 A7_A8 WE* A5_BA1 A4_BA2 A2_BA0 A3_BA3 CS*
32..63
CAS* CKE* RST* RAS* A1_A9 A0_A10 A12_RFU ABI* A6_A11 A7_A8 WE* A5_BA1 A4_BA2 A2_BA0 A3_BA3 CS*
3
FBB_D<0>(15) FBB_D<1>(15) FBB_D<2>(15) FBB_D<3>(15) FBB_D<4>(15) FBB_D<5>(15) FBB_D<6>(15) FBB_D<7>(15) FBB_D<8>(15) FBB_D<9>(15) FBB_D<10>(15) FBB_D<11>(15) FBB_D<12>(15) FBB_D<13>(15) FBB_D<14>(15) FBB_D<15>(15) FBB_D<16>(15) FBB_D<17>(15) FBB_D<18>(15) FBB_D<19>(15) FBB_D<20>(15) FBB_D<21>(15) FBB_D<22>(15) FBB_D<23>(15) FBB_D<24>(15) FBB_D<25>(15) FBB_D<26>(15) FBB_D<27>(15) FBB_D<28>(15) FBB_D<29>(15) FBB_D<30>(15) FBB_D<31>(15) FBB_D<32>(16) FBB_D<33>(16) FBB_D<34>(16) FBB_D<35>(16) FBB_D<36>(16) FBB_D<37>(16) FBB_D<38>(16) FBB_D<39>(16) FBB_D<40>(16) FBB_D<41>(16) FBB_D<42>(16) FBB_D<43>(16) FBB_D<44>(16) FBB_D<45>(16) FBB_D<46>(16) FBB_D<47>(16) FBB_D<48>(16) FBB_D<49>(16) FBB_D<50>(16) FBB_D<51>(16) FBB_D<52>(16) FBB_D<53>(16) FBB_D<54>(16) FBB_D<55>(16) FBB_D<56>(16) FBB_D<57>(16) FBB_D<58>(16) FBB_D<59>(16) FBB_D<60>(16) FBB_D<61>(16) FBB_D<62>(16) FBB_D<63>(16)
FBB_DBI<0>(15) FBB_DBI<1>(15) FBB_DBI<2>(15) FBB_DBI<3>(15) FBB_DBI<4>(16) FBB_DBI<5>(16) FBB_DBI<6>(16) FBB_DBI<7>(16)
FBB_EDC<0>(15) FBB_EDC<1>(15) FBB_EDC<2>(15) FBB_EDC<3>(15) FBB_EDC<4>(16) FBB_EDC<5>(16) FBB_EDC<6>(16) FBB_EDC<7>(16)
D30 G30
G29
H29 C33
D33 C30
D32 H39 G39
D41
G38 D38
D36 G35
D35
M44
M43
R45 R46 R43 R44 M47
M46 M45
D47 D48
H46 H47 H48
H49
G33 H38 C36
H33 D39
R42 M48
H30
H35 R41 M49
E30 F30
F29
J29
E33 F33
K33 E32
F39
F38
E38 F36 K35 E36
F35
E35
P42
P43
P44
P47 P49 P45 P46 F46 E47
F48
L45 L44
J46
L47
J49 L48 L49
E29
P41 P48 F47 L46
J30
J35
F49
J47
J33 E39
E49
J48
G18C
G18C
3/21 FBB
3/21 FBB
FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63
FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7
FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7
FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6 FBB_DQS_RN7
N16E-GT
N16E-GT
2
N16E FBB_CMD34
FBB_CMD35
FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8
FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31 FBB_CMD32 FBB_CMD33
FBB_DEBUG0 FBB_DEBUG1
FBB_CLK0
FBB_CLK0*
FBB_CLK1
FBB_CLK1*
FBB_WCK01
FBB_WCK01*
FBB_WCKB01
FBB_WCKB01*
FBB_WCK23
FBB_WCK23*
FBB_WCKB23
FBB_WCKB23*
FBB_WCK45
FBB_WCK45*
FBB_WCKB45
FBB_WCKB45*
FBB_WCK67
FBB_WCK67*
FBB_WCKB67
FBB_WCKB67*
C29 B29 A29 A30 B30 B32 A32 C32 A33 B33 B35 A35 C35 A36 B36 B38 D49 C48 B46 A46 A45 C44 A44 B44 C42 B42 A42 A41 B41 C39 B39 A39 A38 C38
D29 C41
E41 F41 E42 D42
F32 G32 H32 J32 G36 H36 K36 J36 M42 M41 L42 L43 H45 H44 J45 J44
FBB_CMD<0> (15) FBB_CMD<1> (15) FBB_CMD<2> (15) FBB_CMD<3> (15) FBB_CMD<4> (15) FBB_CMD<5> (15) FBB_CMD<6> (15) FBB_CMD<7> (15) FBB_CMD<8> (15) FBB_CMD<9> (15) FBB_CMD<10> (15) FBB_CMD<11> (15) FBB_CMD<12> (15) FBB_CMD<13> (15) FBB_CMD<14> (15) FBB_CMD<15> (15) FBB_CMD<16> (16) FBB_CMD<17> (16) FBB_CMD<18> (16) FBB_CMD<19> (16) FBB_CMD<20> (16) FBB_CMD<21> (16) FBB_CMD<22> (16) FBB_CMD<23> (16) FBB_CMD<24> (16) FBB_CMD<25> (16) FBB_CMD<26> (16) FBB_CMD<27> (16) FBB_CMD<28> (16) FBB_CMD<29> (16) FBB_CMD<30> (16) FBB_CMD<31> (16)
FBB_CLK0 (15) FBB_CLK0* (15) FBB_CLK1 (16) FBB_CLK1* (16)
FBB_WCK01 (15) FBB_WCK01* (15)
FBB_WCK23 (15) FBB_WCK23* (15)
FBB_WCK45 (16) FBB_WCK45* (16)
FBB_WCK67 (16) FBB_WCK67* (16)
W> 16mils, 0.5A
PLACE AT BALLS
FBB_PLL_AVDD
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
L36
DGPU_MEM IF A/B
DGPU_MEM IF A/B
DGPU_MEM IF A/B
MS-16J1
MS-16J1
MS-16J1
FB_PLLAVDD (19)
C128
C128 C0.1u50X70402
C0.1u50X70402
GND
0.1uF*1 X7R
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
of
12 69Wednesday, September 17, 2014
12 69Wednesday, September 17, 2014
1
12 69Wednesday, September 17, 2014
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
DGPU_GDDR5 FrameBuffer A0
M1A
M7B
M7A
M7A
INS146008489
INS146008489
MIRRORED
MIRRORED
x32 x16
x32 x16
A11
D D
GND
FBA_D<24>(12) FBA_D<25>(12) FBA_D<26>(12) FBA_D<27>(12) FBA_D<28>(12) FBA_D<29>(12) FBA_D<30>(12) FBA_D<31>(12)
FBA_EDC<3>(12) FBA_DBI<3>(12)
FBA_WCK23(12) FBA_WCK23*(12)
C C
A13 B11 B13 E11 E13
C13 D13
F11 F13
A4 A2 B4 B2 E4 E2 F4 F2
C2 D2
D4 D5
M7 5020
B B
U4 U2
T4
T2 N4 N2 M4 M2
R2
P2
FBA_D<8>(12) FBA_D<9>(12) FBA_D<10>(12) FBA_D<11>(12) FBA_D<12>(12) FBA_D<13>(12) FBA_D<14>(12) FBA_D<15>(12)
A A
FBA_EDC<1>(12) FBA_DBI<1>(12)
FBA_WCK01(12) FBA_WCK01*(12)
U11 U13
N11
N13 M11 M13
R13
P13
T11 T13
P4 P5
NC
NC
DQ16
NC
NC
DQ17
NC
NC
DQ18
NC
NC
DQ19
NC
NC
DQ20
NC
NC
DQ21
NC
NC
DQ22
NC
NC
DQ23
GND
GND
EDC2
NC
NC
DBI2*
FBA_VREFD
A10
VREFD DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
EDC3 DBI3*
WCK23 WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
FBVDDQ
R13
R13 549R1%0402
549R1%0402
C503
C503 C820p50X0402
C820p50X0402
GND GND
M7D
M7D
INS146008250
INS146008250
MIRRORED
MIRRORED
x16x32
x16x32
NC
NC
DQ0
NC
NC
DQ1
NC
NC
DQ2
NC
NC
DQ3
NC
NC
DQ4
NC
NC
DQ5
NC
NC
DQ6
NC
NC
DQ7
NC
NC
EDC0
NC
NC
DBI0*
FBA_VREFD
U10
VREFD DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
EDC1 DBI1*
WCK01 WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
GND GND
R15
R15
1.33KR1%0402
1.33KR1%0402
C488
C488 C820p50X0402
C820p50X0402
FBA_CMD<3>(12) FBA_CMD<0>(12) FBA_CMD<10>(12) FBA_CMD<15>(12)
FBA_CMD<7>(12)
FBA_CMD<5>(12) FBA_CMD<4>(12) FBA_CMD<13>(12) FBA_CMD<14>(12) FBA_CMD<12>(12) FBA_CMD<11>(12) FBA_CMD<8>(12) FBA_CMD<9>(12) FBA_CMD<6>(12)
FBA_CMD<2>(12) FBA_CMD<1>(12)
R299
R299 121R1%0402
121R1%0402
GND GND
FBVDDQ
R7
R7 549R1%0402
549R1%0402
R8
R8
1.33KR1%0402
1.33KR1%0402
FBA_CLK0 FBA_CLK0*
FBA_VREFC
FBA_ZQ0
FBA_SEN0
R3
R3 1KR1%0402
1KR1%0402
M7B
INS146008628
INS146008628
L3
RAS*
G3
CAS*
G12
WE*
L12
CS*
J4
ABI*
K4
A10_A0
K5
A9_A1
K11
BA0_A2
K10
BA3_A3
H11
BA2_A4
H10
BA1_A5
H5
A11_A6
H4
A8_A7
J5
A12_RFU/NC
J2
RESET*
J3
CKE*
J12
CK
J11
CK#
A5
VPP_NC
U5
VPP/NC
J14
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
FBA_D<16>(12) FBA_D<17>(12) FBA_D<18>(12) FBA_D<19>(12) FBA_D<20>(12) FBA_D<21>(12) FBA_D<22>(12) FBA_D<23>(12)
FBA_EDC<2>(12) FBA_DBI<2>(12)
FBA_WCK23 FBA_WCK23*
FBA_D<0>(12) FBA_D<1>(12) FBA_D<2>(12) FBA_D<3>(12) FBA_D<4>(12) FBA_D<5>(12) FBA_D<6>(12) FBA_D<7>(12)
FBA_EDC<0>(12) FBA_DBI<0>(12)
GND
FBA_WCK01 FBA_WCK01*
Hynix PN : M12-5GC2H05-H23 2G(64Mx32bit) Samsung PN : M12-2032585-S02 2G(64Mx32bit)
5
4
3
M1A
INS146008661
INS146008661
NORMAL
NORMAL
U11
DQ16
U13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2*
VREFD
x16
x32
x16
x32
U4 U2 T4 T2 N4
N2 M4 M2
R2
P2
P4
P5
NC
NC
DQ24
NC
NC
DQ25
NC
NC
DQ26
NC
NC
DQ27
NC
NC
DQ28
NC
NC
DQ29
NC
NC
DQ30
NC
NC
DQ31
NC
NC
EDC3
NC
NC
DBI3*
WCK23 WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
M1 5010
M1D
M1D
INS146008447
INS146008447
NORMAL
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0*
VREFD
x16
x32
x16
x32
A11 A13 B11 B13 E11 E13 F11 F13
C13 D13
D4
D5
NC
NC
DQ8
NC
NC
DQ9
NC
NC
DQ10
NC
NC
DQ11
NC
NC
DQ12
NC
NC
DQ13
NC
NC
DQ14
NC
NC
DQ15
GND
GND
EDC1
NC
NC
DBI1*
WCK01 WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
U10
A10
FBA_VREFD
FBA_VREFD
2
C30
C30 C820p50X0402
C820p50X0402
GND
M1B
M1B
INS146008145
INS146008145
FBA_CMD<3>(12) FBA_CMD<0>(12) FBA_CMD<10>(12) FBA_CMD<15>(12)
FBA_CMD<7>(12)
FBA_CMD<5>(12) FBA_CMD<4>(12) FBA_CMD<13>(12) FBA_CMD<14>(12) FBA_CMD<12>(12) FBA_CMD<11>(12) FBA_CMD<8>(12) FBA_CMD<9>(12) FBA_CMD<6>(12)
FBA_CMD<2>(12) FBA_CMD<1>(12)
FBA_CLK0 FBA_CLK0*
FBA_VREFC
FBA_ZQ1
FBA_SEN1
R24
R24 121R1%0402
121R1%0402
GND GND
FBA_CLK0(12)
FBA_CLK0*(12)
FBA_VREF_L_FET
N-2N7002_SOT23
N-2N7002_SOT23
R4
R4 1KR1%0402
1KR1%0402
R297 40.2R1%0402R297 40.2R1%0402
R293 40.2R1%0402R293 40.2R1%0402
Q1
Q1
GND
Title
Title
Title
DGPU_GDDR5 FrameBuffer A0
DGPU_GDDR5 FrameBuffer A0
DGPU_GDDR5 FrameBuffer A0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet of
Date: Sheet of
Date: Sheet of
G3
L3
L12
G12
J4
H4
H5 H11 H10 K11 K10
K5
K4
J5
J2 J3
J12 J11
A5
U5
J14
J13
J10
R9 931R1%0402R9 931R1%0402
R10 931R1%0402R10 931R1%0402
D
D
G
G
S
S
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
RAS* CAS* WE* CS*
ABI*
A10_A0 A9_A1 BA0_A2 BA3_A3 BA2_A4 BA1_A5 A11_A6 A8_A7 A12_RFU/NC
RESET* CKE*
CK CK#
VPP_NC VPP/NC
VREFC
ZQ
SEN
M12-2032585-S02
M12-2032585-S02
FBA_CLK0_MIDPT
GPIO10_ALT_MEM_VREF (15,20,26)
1
C505
C505 C0.01u50X0402
C0.01u50X0402
GND
FBA_VREFD (14)
FBA_VREFC (14)
13 69Wednesday, September 17, 2014
13 69Wednesday, September 17, 2014
13 69Wednesday, September 17, 2014
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
DGPU_GDDR5 FrameBuffer A1
M2A
M9B
G12
H11 H10 K11 K10
G3
L3
L12
J4
H4 H5
K5 K4 J5
J2 J3
J12 J11
A5 U5
M9B
INS150971064
INS150971064
RAS* CAS* WE* CS*
ABI*
A10_A0 A9_A1 BA0_A2 BA3_A3 BA2_A4 BA1_A5 A11_A6 A8_A7 A12_RFU/NC
RESET* CKE*
CK CK#
VPP_NC VPP/NC
GND
FBA_D<56>(12) FBA_D<57>(12) FBA_D<58>(12) FBA_D<59>(12) FBA_D<60>(12) FBA_D<61>(12) FBA_D<62>(12) FBA_D<63>(12)
FBA_EDC<7>(12) FBA_DBI<7>(12)
FBA_WCK67 FBA_WCK67*
M9A
M9A
INS150971000
INS150971000
NORMAL
NORMAL
FBA_D<48>(12)
D D
C C
FBA_D<49>(12) FBA_D<50>(12) FBA_D<51>(12) FBA_D<52>(12) FBA_D<53>(12) FBA_D<54>(12) FBA_D<55>(12)
FBA_EDC<6>(12) FBA_DBI<6>(12)
FBA_WCK67(12) FBA_WCK67*(12)
U11
DQ16
U13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2*
x32
x32
U4
DQ24
U2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3*
P4
WCK23
P5
WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
VREFD
x16
x16
U10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
FBA_VREFD
FBA_CMD<19>(12) FBA_CMD<16>(12) FBA_CMD<26>(12) FBA_CMD<31>(12)
FBA_CMD<23>(12)
FBA_CMD<21>(12) FBA_CMD<20>(12) FBA_CMD<29>(12) FBA_CMD<30>(12) FBA_CMD<28>(12) FBA_CMD<27>(12) FBA_CMD<24>(12) FBA_CMD<25>(12) FBA_CMD<22>(12)
FBA_CMD<18>(12) FBA_CMD<17>(12)
FBA_CLK1 FBA_CLK1*
M2A
INS150971136
INS150971136
MIRRORED
MIRRORED
x32 x16
x32 x16
A11 A13 B11 B13 E11 E13 F11 F13
C13 D13
A4 A2 B4 B2 E4 E2 F4 F2
C2 D2
D4 D5
NC
NC
DQ16
NC
NC
DQ17
NC
NC
DQ18
NC
NC
DQ19
NC
NC
DQ20
NC
NC
DQ21
NC
NC
DQ22
NC
NC
DQ23
GND
GND
EDC2
NC
NC
DBI2*
A10
VREFD DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
EDC3 DBI3*
WCK23 WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
FBA_VREFD
C31
C31 C820p50X0402
C820p50X0402
GND
FBA_CMD<19>(12) FBA_CMD<16>(12) FBA_CMD<26>(12) FBA_CMD<31>(12)
FBA_CMD<23>(12)
FBA_CMD<21>(12) FBA_CMD<20>(12) FBA_CMD<29>(12) FBA_CMD<30>(12) FBA_CMD<28>(12) FBA_CMD<27>(12) FBA_CMD<24>(12) FBA_CMD<25>(12) FBA_CMD<22>(12)
FBA_CMD<18>(12) FBA_CMD<17>(12)
FBA_CLK1 FBA_CLK1*
G12
K11 K10 H11 H10
L3
G3
L12
J4
K4 K5
H5 H4
J5
J2 J3
J12 J11
A5 U5
M2B
M2B
INS150970944
INS150970944
RAS* CAS* WE* CS*
ABI*
A10_A0 A9_A1 BA0_A2 BA3_A3 BA2_A4 BA1_A5 A11_A6 A8_A7 A12_RFU/NC
RESET* CKE*
CK CK#
VPP_NC VPP/NC
FBA_VREFC
FBA_ZQ3
FBA_SEN3
R1
R1 1KR1%0402
1KR1%0402
Title
Title
Title
DGPU_GDDR5 FrameBuffer A1
DGPU_GDDR5 FrameBuffer A1
DGPU_GDDR5 FrameBuffer A1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet
Date: Sheet of
Date: Sheet of
FBA_VREFC(13)
C502
C502 C820p50X0402
C820p50X0402
GND
R298
R298 121R1%0402
121R1%0402
GND GND
M9D
B B
FBA_D<32>(12) FBA_D<33>(12) FBA_D<34>(12) FBA_D<35>(12) FBA_D<36>(12) FBA_D<37>(12) FBA_D<38>(12) FBA_D<39>(12)
FBA_EDC<4>(12) FBA_DBI<4>(12)
GND
A A
FBA_WCK45(12) FBA_WCK45*(12)
5
M9D
INS150971104
INS150971104
NORMAL
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0*
x32
x32
A11
DQ8
A13
DQ9
B11
DQ10
B13
DQ11
E11
DQ12
E13
DQ13
F11
DQ14
F13
DQ15
C13
EDC1
D13
DBI1*
D4
WCK01
D5
WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
VREFD
x16
x16
A10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GND
GND
NC
NC
C489
C489 C820p50X0402
C820p50X0402
GND
FBA_VREFD (13)
4
FBA_ZQ2
FBA_SEN2
R2
R2 1KR1%0402
1KR1%0402
J14
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
R12
R12 121R1%0402
121R1%0402
M2 5010M9 5020
M2D
M2D
INS150970896
INS150970896
MIRRORED
MIRRORED
x16x32
U4 U2 T4 T2 N4
N2 M4 M2
R2
P2
M11 M13
U11 U13 T11 T13 N11 N13
R13 P13
P4
P5
FBA_D<40>(12) FBA_D<41>(12) FBA_D<42>(12) FBA_D<43>(12) FBA_D<44>(12) FBA_D<45>(12) FBA_D<46>(12) FBA_D<47>(12)
FBA_EDC<5>(12) FBA_DBI<5>(12)
3
FBA_WCK45 FBA_WCK45*
x16x32
NC
NC
DQ0
NC
NC
DQ1
NC
NC
DQ2
NC
NC
DQ3
NC
NC
DQ4
NC
NC
DQ5
NC
NC
DQ6
NC
NC
DQ7
NC
NC
EDC0
NC
NC
DBI0*
FBA_VREFD
U10
VREFD DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
EDC1 DBI1*
WCK01 WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
2
GND GND
FBA_CLK1(12)
FBA_CLK1*(12)
J14
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
R22 40.2R1%0402R22 40.2R1%0402
R18 40.2R1%0402R18 40.2R1%0402
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
FBA_CLK1_MIDPT
1
GND
14 69Wednesday, September 17, 2014
14 69Wednesday, September 17, 2014
14 69Wednesday, September 17, 2014
C14
C14 C0.01u50X0402
C0.01u50X0402
of
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
DGPU_GDDR5 FrameBuffer B0
M10B
G12
K11 K10 H11 H10
L3
G3
L12
J4
K4 K5
H5 H4 J5
J2 J3
J12 J11
A5 U5
M10B
INS150971947
INS150971947
RAS* CAS* WE* CS*
ABI*
A10_A0 A9_A1 BA0_A2 BA3_A3 BA2_A4 BA1_A5 A11_A6 A8_A7 A12_RFU/NC
RESET* CKE*
CK CK#
VPP_NC VPP/NC
FBB_D<16>(12) FBB_D<17>(12) FBB_D<18>(12) FBB_D<19>(12) FBB_D<20>(12) FBB_D<21>(12) FBB_D<22>(12) FBB_D<23>(12)
FBB_EDC<2>(12) FBB_DBI<2>(12)
FBB_WCK23 FBB_WCK23*
M10A
M10A
INS150972124
INS150972124
MIRRORED
MIRRORED
x32 x16
x32 x16
A11
D D
GND
FBB_D<24>(12) FBB_D<25>(12) FBB_D<26>(12) FBB_D<27>(12) FBB_D<28>(12) FBB_D<29>(12) FBB_D<30>(12) FBB_D<31>(12)
FBB_EDC<3>(12) FBB_DBI<3>(12)
FBB_WCK23(12) FBB_WCK23*(12)
C C
A13 B11 B13 E11 E13
C13 D13
F11 F13
A4 A2 B4 B2 E4 E2 F4 F2
C2 D2
D4 D5
NC
NC
DQ16
NC
NC
DQ17
NC
NC
DQ18
NC
NC
DQ19
NC
NC
DQ20
NC
NC
DQ21
NC
NC
DQ22
NC
NC
DQ23
GND
GND
EDC2
NC
NC
DBI2*
FBB_VREFD
A10
VREFD DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
EDC3 DBI3*
WCK23 WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
FBB_CMD<3>(12) FBB_CMD<0>(12) FBB_CMD<10>(12) FBB_CMD<15>(12)
FBB_CMD<7>(12)
FBB_CMD<5>(12) FBB_CMD<4>(12) FBB_CMD<13>(12) FBB_CMD<14>(12) FBB_CMD<12>(12) FBB_CMD<11>(12) FBB_CMD<8>(12) FBB_CMD<9>(12) FBB_CMD<6>(12)
FBB_CMD<2>(12) FBB_CMD<1>(12)
FBB_CLK0 FBB_CLK0*
FBVDDQ
R310
R310 549R1%0402
549R1%0402
FBB_VREFC
J14
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
C521
C521 C820p50X0402
C820p50X0402
R309
R309
1.33KR1%0402
1.33KR1%0402
GNDGND
R308
R308 121R1%0402
121R1%0402
FBB_ZQ0
FBB_SEN0
R314
R314 1KR1%0402
1KR1%0402
M4A
M4A
INS150971875
INS150971875
NORMAL
NORMAL
U11
DQ16
U13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2*
x32
x32
U4
DQ24
U2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3*
P4
WCK23
P5
WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
VREFD
x16
x16
U10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
FBB_VREFD
C41
C41 C820p50X0402
C820p50X0402
GND
FBB_CMD<3>(12) FBB_CMD<0>(12) FBB_CMD<10>(12) FBB_CMD<15>(12)
FBB_CMD<7>(12)
FBB_CMD<5>(12) FBB_CMD<4>(12) FBB_CMD<13>(12) FBB_CMD<14>(12) FBB_CMD<12>(12) FBB_CMD<11>(12) FBB_CMD<8>(12) FBB_CMD<9>(12) FBB_CMD<6>(12)
FBB_CMD<2>(12) FBB_CMD<1>(12)
R26
R26 121R1%0402
121R1%0402
FBB_CLK0 FBB_CLK0*
FBB_VREFC
FBB_ZQ1
FBB_SEN1
R313
R313 1KR1%0402
1KR1%0402
M4B
M4B
INS150972043
INS150972043
G3
RAS*
L3
CAS*
L12
WE*
G12
CS*
J4
ABI*
H4
A10_A0
H5
A9_A1
H11
BA0_A2
H10
BA3_A3
K11
BA2_A4
K10
BA1_A5
K5
A11_A6
K4
A8_A7
J5
A12_RFU/NC
J2
RESET*
J3
CKE*
J12
CK
J11
CK#
A5
VPP_NC
U5
VPP/NC
J14
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
M10 5010
M10D
B B
FBB_D<8>(12) FBB_D<9>(12) FBB_D<10>(12) FBB_D<11>(12) FBB_D<12>(12) FBB_D<13>(12) FBB_D<14>(12) FBB_D<15>(12)
A A
FBB_EDC<1>(12) FBB_DBI<1>(12)
FBB_WCK01(12) FBB_WCK01*(12)
5
M10D
INS150971907
INS150971907
MIRRORED
MIRRORED
x16x32
x16x32
NC
NC
DQ0
NC
NC
DQ1
NC
NC
DQ2
NC
NC
DQ3
NC
NC
DQ4
NC
NC
DQ5
NC
NC
DQ6
NC
NC
DQ7
NC
NC
EDC0
NC
NC
DBI0*
U10
VREFD DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
EDC1 DBI1*
WCK01 WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
U11 U13
N11
N13 M11 M13
R13
P13
U4 U2
T4
T2 N4 N2 M4 M2
R2
P2
T11 T13
P4
P5
FBB_VREFD
C531
C531 C820p50X0402
C820p50X0402
FBVDDQ
GNDGND
R25
R25 549R1%0402
549R1%0402
R302
R302
1.33KR1%0402
1.33KR1%0402
GNDGND
FBB_D<0>(12) FBB_D<1>(12) FBB_D<2>(12) FBB_D<3>(12) FBB_D<4>(12) FBB_D<5>(12) FBB_D<6>(12) FBB_D<7>(12)
FBB_EDC<0>(12) FBB_DBI<0>(12)
GND
FBB_WCK01 FBB_WCK01*
4
3
M4 5010
M4D
M4D
INS150971979
INS150971979
NORMAL
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0*
x32
x32
A11
DQ8
A13
DQ9
B11
DQ10
B13
DQ11
E11
DQ12
E13
DQ13
F11
DQ14
F13
DQ15
C13
EDC1
D13
DBI1*
D4
WCK01
D5
WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
VREFD
x16
x16
A10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GND
GND
NC
NC
FBB_VREFD
2
GND GND
FBB_CLK0(12)
FBB_CLK0*(12)
FBB_VREF_L_FET
R27 40.2R1%0402R27 40.2R1%0402
R28 40.2R1%0402R28 40.2R1%0402
R300 931R1%0402R300 931R1%0402
FBB_CLK0_MIDPT
R301 931R1%0402R301 931R1%0402
D
D
Q2
Q2
G
G
N-2N7002_SOT23
N-2N7002_SOT23
S
S
GPIO10_ALT_MEM_VREF (13,20,26)
GND
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
DGPU_GDDR5 FrameBuffer B0
DGPU_GDDR5 FrameBuffer B0
DGPU_GDDR5 FrameBuffer B0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet of
Date: Sheet of
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
1
C29
C29 C0.01u50X0402
C0.01u50X0402
GND
FBB_VREFD (16)
FBB_VREFC (16)
15 69Wednesday, September 17, 2014
15 69Wednesday, September 17, 2014
15 69Wednesday, September 17, 2014
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
DGPU_GDDR5 FrameBuffer B1
M8A
M8A
INS150973156
INS150973156
NORMAL
NORMAL
FBB_D<48>(12)
D D
C C
FBB_D<49>(12) FBB_D<50>(12) FBB_D<51>(12) FBB_D<52>(12) FBB_D<53>(12) FBB_D<54>(12) FBB_D<55>(12)
FBB_EDC<6>(12) FBB_DBI<6>(12)
FBB_WCK67(12) FBB_WCK67*(12)
U11
DQ16
U13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2*
x32
x32
U4
DQ24
U2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3*
P4
WCK23
P5
WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
VREFD
x16
x16
U10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
FBB_VREFD
FBB_CMD<19>(12) FBB_CMD<16>(12) FBB_CMD<26>(12) FBB_CMD<31>(12)
FBB_CMD<23>(12)
FBB_CMD<21>(12) FBB_CMD<20>(12) FBB_CMD<29>(12) FBB_CMD<30>(12) FBB_CMD<28>(12) FBB_CMD<27>(12) FBB_CMD<24>(12) FBB_CMD<25>(12) FBB_CMD<22>(12)
FBB_CMD<18>(12) FBB_CMD<17>(12)
FBB_CLK1 FBB_CLK1* FBB_CLK1*
G12
H11 H10 K11 K10
G3
L3
L12
J4
H4 H5
K5 K4 J5
J2 J3
J12 J11
A5 U5
M8B
M8B
INS150972964
INS150972964
RAS* CAS* WE* CS*
ABI*
A10_A0 A9_A1 BA0_A2 BA3_A3 BA2_A4 BA1_A5 A11_A6 A8_A7 A12_RFU/NC
RESET* CKE*
CK CK#
VPP_NC VPP/NC
M3B
G12
K11 K10 H11 H10
L3
G3
L12
J4
K4 K5
H5 H4
J5
J2 J3
J12 J11
A5 U5
M3B
INS150973124
INS150973124
RAS* CAS* WE* CS*
ABI*
A10_A0 A9_A1 BA0_A2 BA3_A3 BA2_A4 BA1_A5 A11_A6 A8_A7 A12_RFU/NC
RESET* CKE*
CK CK#
VPP_NC VPP/NC
M3A
M3A
INS150973052
INS150973052
MIRRORED
MIRRORED
x32 x16
x32 x16
A11 A13 B11 B13 E11 E13 F11 F13
GND
FBB_D<56>(12) FBB_D<57>(12) FBB_D<58>(12) FBB_D<59>(12) FBB_D<60>(12) FBB_D<61>(12) FBB_D<62>(12) FBB_D<63>(12)
FBB_EDC<7>(12) FBB_DBI<7>(12)
FBB_WCK67 FBB_WCK67*
C13 D13
A4 A2 B4 B2 E4 E2 F4 F2
C2 D2
D4 D5
NC
NC
DQ16
NC
NC
DQ17
NC
NC
DQ18
NC
NC
DQ19
NC
NC
DQ20
NC
NC
DQ21
NC
NC
DQ22
NC
NC
DQ23
GND
GND
EDC2
NC
NC
DBI2*
FBB_VREFD
A10
VREFD DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
EDC3 DBI3*
WCK23 WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
GND
FBB_CMD<19>(12) FBB_CMD<16>(12) FBB_CMD<26>(12) FBB_CMD<31>(12)
FBB_CMD<23>(12)
FBB_CMD<21>(12) FBB_CMD<20>(12) FBB_CMD<29>(12) FBB_CMD<30>(12) FBB_CMD<28>(12) FBB_CMD<27>(12) FBB_CMD<24>(12) FBB_CMD<25>(12) FBB_CMD<22>(12)
C33
C33 C820p50X0402
C820p50X0402
FBB_CMD<18>(12) FBB_CMD<17>(12)
FBB_CLK1
FBB_VREFC
FBB_VREFC(15)
C504
C504 C820p50X0402
C820p50X0402
GND
M8 5020
B B
FBB_D<32>(12) FBB_D<33>(12) FBB_D<34>(12) FBB_D<35>(12) FBB_D<36>(12) FBB_D<37>(12) FBB_D<38>(12) FBB_D<39>(12)
FBB_EDC<4>(12) FBB_DBI<4>(12)
A A
GND
FBB_WCK45(12) FBB_WCK45*(12)
5
M8D
M8D
INS150973092
INS150973092
NORMAL
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0*
x32
x32
A11
DQ8
A13
DQ9
B11
DQ10
B13
DQ11
E11
DQ12
E13
DQ13
F11
DQ14
F13
DQ15
C13
EDC1
D13
DBI1*
D4
WCK01
D5
WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
VREFD
x16
x16
A10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GND
GND
NC
NC
FBB_VREFD
GND
GND
FBB_VREFD (15)
C490
C490 C820p50X0402
C820p50X0402
R291
R291 121R1%0402
121R1%0402
4
GND
FBB_ZQ2
FBB_SEN2
R6
R6 1KR1%0402
1KR1%0402
J14
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
R11
R11 121R1%0402
121R1%0402
M3 5010
M3D
M3D
INS150972932
INS150972932
MIRRORED
MIRRORED
x16x32
U4 U2 T4 T2 N4
N2 M4 M2
R2
P2
M11 M13
U11 U13 T11 T13 N11 N13
R13 P13
P4
P5
FBB_D<40>(12) FBB_D<41>(12) FBB_D<42>(12) FBB_D<43>(12) FBB_D<44>(12) FBB_D<45>(12) FBB_D<46>(12) FBB_D<47>(12)
FBB_EDC<5>(12) FBB_DBI<5>(12)
3
FBB_WCK45 FBB_WCK45*
x16x32
NC
NC
DQ0
NC
NC
DQ1
NC
NC
DQ2
NC
NC
DQ3
NC
NC
DQ4
NC
NC
DQ5
NC
NC
DQ6
NC
NC
DQ7
NC
NC
EDC0
NC
NC
DBI0*
FBB_VREFD
U10
VREFD DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
EDC1 DBI1*
WCK01 WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
2
GND GND
FBB_CLK1(12)
FBB_CLK1*(12)
FBB_VREFC
J14
FBB_ZQ3
FBB_SEN3
R5
R5 1KR1%0402
1KR1%0402
R21 40.2R1%0402R21 40.2R1%0402
R17 40.2R1%0402R17 40.2R1%0402
Title
Title
Title
DGPU_GDDR5 FrameBuffer B1
DGPU_GDDR5 FrameBuffer B1
DGPU_GDDR5 FrameBuffer B1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet
Date: Sheet of
Date: Sheet of
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
FBB_CLK1_MIDPT
C13
C13 C0.01u50X0402
C0.01u50X0402
GND
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
of
16 69Wednesday, September 17, 2014
16 69Wednesday, September 17, 2014
16 69Wednesday, September 17, 2014
1
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
FBVDDQ
SPARE
C514
C514 C0.1u50X70402
C0.1u50X70402
D D
GND GND GND GND GND GND GNDGND GND GNDGNDGND GND GND GNDGND
C C
B B
DECOUPLING AROUND FBA MEMORIES (DQ0-DQ31)
C496
C496 C0.1u50X70402
C0.1u50X70402
FBA_MF1 FBA_MF2
R20
R20 1KR1%0402
1KR1%0402
M1C
M1C
INS150975090
INS150975090
J1
MF
add 1k to VSS
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
U1
VSSQ
U12
VSSQ
U14
VSSQ
U3
VSSQ
K4G20325FD-FC03
K4G20325FD-FC03
C498
C498 C0.1u50X70402
C0.1u50X70402
Normal
Normal
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
C507
C507 C0.1u50X70402
C0.1u50X70402
C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5
B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3
C515
C515 C0.1u50X70402
C0.1u50X70402
R294
R294 1KR1%0402
1KR1%0402
Frame Buffer Partition A Decoupling
C17
C17 C0.1u50X70402
C0.1u50X70402
M7C
M7C
INS150975200
INS150975200
J1
MF
add 1k to VDD
add 1k to VDD
C10
VDD_1
C5
VDD_2
D11
VDD_3
G1
VDD_4
G11
VDD_5
G14
VDD_6
G4
VDD_7
L1
VDD_8
L11
VDD_9
L14
VDD_10
L4
VDD_11
P11
VDD_12
R10
VDD_13
R5
VDD_14
B1
VDDQ_1
B12
VDDQ_2
B14
VDDQ_3
B3
VDDQ_4
D1
VDDQ_5
D12
VDDQ_6
D14
VDDQ_7
D3
VDDQ_8
E10
VDDQ_9
E5
VDDQ_10
F1
VDDQ_11
F12
VDDQ_12
F14
VDDQ_13
F3
VDDQ_14
G13
VDDQ_15
G2
VDDQ_16
H12
VDDQ_17
H3
VDDQ_18
K12
VDDQ_19
K3
VDDQ_20
L13
VDDQ_21
L2
VDDQ_22
M1
VDDQ_23
M12
VDDQ_24
M14
VDDQ_25
M3
VDDQ_26
N10
VDDQ_27
N5
VDDQ_28
P1
VDDQ_29
P12
VDDQ_30
P14
VDDQ_31
P3
VDDQ_32
T1
VDDQ_33
T12
VDDQ_34
T14
VDDQ_35
T3
VDDQ_36
K4G20325FD-FC03
K4G20325FD-FC03
Mirrored
Mirrored
C9
C9 C0.1u50X70402
C0.1u50X70402
C8
C8 C0.1u50X70402
C0.1u50X70402
1uF 改0.1uF 4.7uF 改1uF
B10
VSS_1
B5
VSS_2
D10
VSS_3
G10
VSS_4
G5
VSS_5
H1
VSS_6
H14
VSS_7
K1
VSS_8
K14
VSS_9
L10
VSS_10
L5
VSS_11
P10
VSS_12
T10
VSS_13
T5
VSS_14
A1
VSSQ_1
A12
VSSQ_2
A14
VSSQ_3
A3
VSSQ_4
C1
VSSQ_5
C11
VSSQ_6
C12
VSSQ_7
C14
VSSQ_8
C3
VSSQ_9
C4
VSSQ_10
E1
VSSQ_11
E12
VSSQ_12
E14
VSSQ_13
E3
VSSQ_14
F10
VSSQ_15
F5
VSSQ_16
H13
VSSQ_17
H2
VSSQ_18
K13
VSSQ_19
K2
VSSQ_20
M10
VSSQ_21
M5
VSSQ_22
N1
VSSQ_23
N12
VSSQ_24
N14
VSSQ_25
N3
VSSQ_26
R1
VSSQ_27
R11
VSSQ_28
R12
VSSQ_29
R14
VSSQ_30
R3
VSSQ_31
R4
VSSQ_32
U1
VSSQ_33
U12
VSSQ_34
U14
VSSQ_35
U3
VSSQ_36
GND GNDGND GND
R296
R296 1KR1%0402
1KR1%0402
C23
C23 C0.1u50X70402
C0.1u50X70402
M9C
M9C
INS150974702
INS150974702
J1
MF
add 1k to VSS
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
U1
VSSQ
U12
VSSQ
U14
VSSQ
U3
VSSQ
K4G20325FD-FC03
K4G20325FD-FC03
C509
C509 C0.1u50X70402
C0.1u50X70402
Normal
Normal
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
C517
C517 C1u6.3X-HF
C1u6.3X-HF
C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5
B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3
C494
C494 C1u6.3X-HF
C1u6.3X-HF
FBVDDQFBVDDQ
C27
C27 C1u6.3X-HF
C1u6.3X-HF
R14
R14
M2C
M2C
1KR1%0402
1KR1%0402
INS150974972
INS150974972
FBA_MF3FBA_MF0
J1
MF
add 1k to VDD
add 1k to VDD
C10
VDD_1
C5
VDD_2
D11
VDD_3
G1
VDD_4
G11
VDD_5
G14
VDD_6
G4
VDD_7
L1
VDD_8
L11
VDD_9
L14
VDD_10
L4
VDD_11
P11
VDD_12
R10
VDD_13
R5
VDD_14
B1
VDDQ_1
B12
VDDQ_2
B14
VDDQ_3
B3
VDDQ_4
D1
VDDQ_5
D12
VDDQ_6
D14
VDDQ_7
D3
VDDQ_8
E10
VDDQ_9
E5
VDDQ_10
F1
VDDQ_11
F12
VDDQ_12
F14
VDDQ_13
F3
VDDQ_14
G13
VDDQ_15
G2
VDDQ_16
H12
VDDQ_17
H3
VDDQ_18
K12
VDDQ_19
K3
VDDQ_20
L13
VDDQ_21
L2
VDDQ_22
M1
VDDQ_23
M12
VDDQ_24
M14
VDDQ_25
M3
VDDQ_26
N10
VDDQ_27
N5
VDDQ_28
P1
VDDQ_29
P12
VDDQ_30
P14
VDDQ_31
P3
VDDQ_32
T1
VDDQ_33
T12
VDDQ_34
T14
VDDQ_35
T3
VDDQ_36
K4G20325FD-FC03
K4G20325FD-FC03
C5
C5 C1u6.3X-HF
C1u6.3X-HF
Mirrored
Mirrored
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8
VSSQ_9 VSSQ_10 VSSQ_11 VSSQ_12 VSSQ_13 VSSQ_14 VSSQ_15 VSSQ_16 VSSQ_17 VSSQ_18 VSSQ_19 VSSQ_20 VSSQ_21 VSSQ_22 VSSQ_23 VSSQ_24 VSSQ_25 VSSQ_26 VSSQ_27 VSSQ_28 VSSQ_29 VSSQ_30 VSSQ_31 VSSQ_32 VSSQ_33 VSSQ_34 VSSQ_35 VSSQ_36
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14
C491
C491 C10u4X60603
C10u4X60603
C11-106A233-T04
B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5
A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3
C1
C1 C10u4X60603
C10u4X60603
FBVDDQ
SPARE
DECOUPLING AROUND FBA MEMORIES (DQ32-DQ63)
C501
C501 C0.1u50X70402
C0.1u50X70402
A A
C10
C10 C0.1u50X70402
C0.1u50X70402
GND GND GND GND GND GNDGND GND GNDGNDGND GND GND GNDGNDGND
5
C22
C22 C0.1u50X70402
C0.1u50X70402
C7
C7 C0.1u50X70402
C0.1u50X70402
C263
C263 C0.1u50X70402
C0.1u50X70402
4
C511
C511 C0.1u50X70402
C0.1u50X70402
C497
C497 C0.1u50X70402
C0.1u50X70402
C271
C271 C0.1u50X70402
C0.1u50X70402
3
C12
C12 C0.1u50X70402
C0.1u50X70402
C304
C304 C0.1u50X70402
C0.1u50X70402
C493
C493 C1u6.3X-HF
C1u6.3X-HF
2
C334
C334 C1u6.3X-HF
C1u6.3X-HF
C4
C4 C1u6.3X-HF
C1u6.3X-HF
Title
Title
Title
DGPU_GDDR5 FB-A_DECOUPLING
DGPU_GDDR5 FB-A_DECOUPLING
DGPU_GDDR5 FB-A_DECOUPLING
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet
Date: Sheet of
Date: Sheet of
C495
C495 C1u6.3X-HF
C1u6.3X-HF
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
C11-106A233-T04
C2
C492
C492 C10u4X60603
C10u4X60603
1
C2 C10u4X60603
C10u4X60603
of
17 69Wednesday, September 17, 2014
17 69Wednesday, September 17, 2014
17 69Wednesday, September 17, 2014
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
FBVDDQ
SPARE
C37
C37 C0.1u50X70402
C0.1u50X70402
D D
C C
B B
GND GND GND GND
DECOUPLING AROUND FBB MEMORIES (DQ0-DQ31)
C513
C18
C18 C0.1u50X70402
C0.1u50X70402
GND GND GND GND GND GNDGND GND GNDGNDGND GND GND GNDGNDGND
FBB_MF1 FBB_MF2
R323
R323 1KR1%0402
1KR1%0402
M4C
M4C
INS150977791
INS150977791
J1
MF
add 1k to VSS
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
U1
VSSQ
U12
VSSQ
U14
VSSQ
U3
VSSQ
K4G20325FD-FC03
K4G20325FD-FC03
C513 C0.1u50X70402
C0.1u50X70402
Normal
Normal
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
C234
C234 C0.1u50X70402
C0.1u50X70402
C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5
B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3
C524
C524 C0.1u50X70402
C0.1u50X70402
R324
R324 1KR1%0402
1KR1%0402
Frame Buffer Partition B Decoupling
C197
C21
C21 C0.1u50X70402
C0.1u50X70402
M10C
M10C
INS150977435
INS150977435
J1
MF
add 1k to VDD
add 1k to VDD
C10
VDD_1
C5
VDD_2
D11
VDD_3
G1
VDD_4
G11
VDD_5
G14
VDD_6
G4
VDD_7
L1
VDD_8
L11
VDD_9
L14
VDD_10
L4
VDD_11
P11
VDD_12
R10
VDD_13
R5
VDD_14
B1
VDDQ_1
B12
VDDQ_2
B14
VDDQ_3
B3
VDDQ_4
D1
VDDQ_5
D12
VDDQ_6
D14
VDDQ_7
D3
VDDQ_8
E10
VDDQ_9
E5
VDDQ_10
F1
VDDQ_11
F12
VDDQ_12
F14
VDDQ_13
F3
VDDQ_14
G13
VDDQ_15
G2
VDDQ_16
H12
VDDQ_17
H3
VDDQ_18
K12
VDDQ_19
K3
VDDQ_20
L13
VDDQ_21
L2
VDDQ_22
M1
VDDQ_23
M12
VDDQ_24
M14
VDDQ_25
M3
VDDQ_26
N10
VDDQ_27
N5
VDDQ_28
P1
VDDQ_29
P12
VDDQ_30
P14
VDDQ_31
P3
VDDQ_32
T1
VDDQ_33
T12
VDDQ_34
T14
VDDQ_35
T3
VDDQ_36
K4G20325FD-FC03
K4G20325FD-FC03
Mirrored
Mirrored
C197 C0.1u50X70402
C0.1u50X70402
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8
VSSQ_9 VSSQ_10 VSSQ_11 VSSQ_12 VSSQ_13 VSSQ_14 VSSQ_15 VSSQ_16 VSSQ_17 VSSQ_18 VSSQ_19 VSSQ_20 VSSQ_21 VSSQ_22 VSSQ_23 VSSQ_24 VSSQ_25 VSSQ_26 VSSQ_27 VSSQ_28 VSSQ_29 VSSQ_30 VSSQ_31 VSSQ_32 VSSQ_33 VSSQ_34 VSSQ_35 VSSQ_36
B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5
A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3
C38
C38 C0.1u50X70402
C0.1u50X70402
R295
R295 1KR1%0402
1KR1%0402
C35
C35 C0.1u50X70402
C0.1u50X70402
M8C
M8C
INS150977949
INS150977949
J1
MF
add 1k to VSS
add 1k to VSS
B10
VSS
B5
VSS
D10
VSS
G10
VSS
G5
VSS
H1
VSS
H14
VSS
K1
VSS
K14
VSS
L10
VSS
L5
VSS
P10
VSS
T10
VSS
T5
VSS
A1
VSSQ
A12
VSSQ
A14
VSSQ
A3
VSSQ
C1
VSSQ
C11
VSSQ
C12
VSSQ
C14
VSSQ
C3
VSSQ
C4
VSSQ
E1
VSSQ
E12
VSSQ
E14
VSSQ
E3
VSSQ
F10
VSSQ
F5
VSSQ
H13
VSSQ
H2
VSSQ
K13
VSSQ
K2
VSSQ
M10
VSSQ
M5
VSSQ
N1
VSSQ
N12
VSSQ
N14
VSSQ
N3
VSSQ
R1
VSSQ
R11
VSSQ
R12
VSSQ
R14
VSSQ
R3
VSSQ
R4
VSSQ
U1
VSSQ
U12
VSSQ
U14
VSSQ
U3
VSSQ
K4G20325FD-FC03
K4G20325FD-FC03
C510
C510 C0.1u50X70402
C0.1u50X70402
Normal
Normal
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
C518
C518 C1u6.3X-HF
C1u6.3X-HF
C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5
B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3
C522
C522 C1u6.3X-HF
C1u6.3X-HF
FBVDDQFBVDDQ
C28
C28 C1u6.3X-HF
C1u6.3X-HF
R16
R16
M3C
M3C
1KR1%0402
1KR1%0402
INS150977569
INS150977569
FBB_MF3FBB_MF0
J1
MF
add 1k to VDD
add 1k to VDD
C10
VDD_1
C5
VDD_2
D11
VDD_3
G1
VDD_4
G11
VDD_5
G14
VDD_6
G4
VDD_7
L1
VDD_8
L11
VDD_9
L14
VDD_10
L4
VDD_11
P11
VDD_12
R10
VDD_13
R5
VDD_14
B1
VDDQ_1
B12
VDDQ_2
B14
VDDQ_3
B3
VDDQ_4
D1
VDDQ_5
D12
VDDQ_6
D14
VDDQ_7
D3
VDDQ_8
E10
VDDQ_9
E5
VDDQ_10
F1
VDDQ_11
F12
VDDQ_12
F14
VDDQ_13
F3
VDDQ_14
G13
VDDQ_15
G2
VDDQ_16
H12
VDDQ_17
H3
VDDQ_18
K12
VDDQ_19
K3
VDDQ_20
L13
VDDQ_21
L2
VDDQ_22
M1
VDDQ_23
M12
VDDQ_24
M14
VDDQ_25
M3
VDDQ_26
N10
VDDQ_27
N5
VDDQ_28
P1
VDDQ_29
P12
VDDQ_30
P14
VDDQ_31
P3
VDDQ_32
T1
VDDQ_33
T12
VDDQ_34
T14
VDDQ_35
T3
VDDQ_36
K4G20325FD-FC03
K4G20325FD-FC03
C36
C36 C1u6.3X-HF
C1u6.3X-HF
Mirrored
Mirrored
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8
VSSQ_9 VSSQ_10 VSSQ_11 VSSQ_12 VSSQ_13 VSSQ_14 VSSQ_15 VSSQ_16 VSSQ_17 VSSQ_18 VSSQ_19 VSSQ_20 VSSQ_21 VSSQ_22 VSSQ_23 VSSQ_24 VSSQ_25 VSSQ_26 VSSQ_27 VSSQ_28 VSSQ_29 VSSQ_30 VSSQ_31 VSSQ_32 VSSQ_33 VSSQ_34 VSSQ_35 VSSQ_36
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14
C25
C25 C10u4X60603
C10u4X60603
C11-106A233-T04
B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5
A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3
C306
C306 C10u4X60603
C10u4X60603
FBVDDQ
SPARE
C523
C523 C0.1u50X70402
C0.1u50X70402
A A
DECOUPLING AROUND FBB MEMORIES (DQ32-DQ63)
C3
C3 C0.1u50X70402
C0.1u50X70402
GND GND GND GND GND GNDGND GND GNDGNDGND GND GND GNDGNDGND
5
C109
C109 C0.1u50X70402
C0.1u50X70402
C101
C101 C0.1u50X70402
C0.1u50X70402
C19
C19 C0.1u50X70402
C0.1u50X70402
4
C500
C500 C0.1u50X70402
C0.1u50X70402
C499
C499 C0.1u50X70402
C0.1u50X70402
C11
C11 C0.1u50X70402
C0.1u50X70402
3
C520
C520 C0.1u50X70402
C0.1u50X70402
C26
C26 C0.1u50X70402
C0.1u50X70402
C519
C519 C1u6.3X-HF
C1u6.3X-HF
2
C549
C549 C1u6.3X-HF
C1u6.3X-HF
C547
C32
C32 C1u6.3X-HF
C1u6.3X-HF
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
C547
C1u6.3X-HF
C1u6.3X-HF
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
DGPU_GDDR5 FB-B_DECOUPLING
DGPU_GDDR5 FB-B_DECOUPLING
DGPU_GDDR5 FB-B_DECOUPLING
MS-16J1
MS-16J1
MS-16J1
C11-106A233-T04
C24
C55
C55 C10u4X60603
C10u4X60603
1
C24 C10u4X60603
C10u4X60603
of
18 69Wednesday, September 17, 2014
18 69Wednesday, September 17, 2014
18 69Wednesday, September 17, 2014
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
INS182818709
G18D
G18D
4/21 FBC
4/21 FBC
G17
G15
G12 G14 G26
G27
G20
G23
G21
G11
G24 G18
A8 D8 B8 C8 C5 B5 D5 C4 B9
E11
D9 A9
H11
F9
J11
E8
K17
J17
K15 K14 H14 J14 E14 F14 A14 B14 E12 F12
J26 F26 H26
F27 J27 H27 E23 D21 D23 C23 A24 B24 E24 D24 D15 C17 D17 E17 F18 E18 D20 E20
H20 F20 H21 F23
H23 K23
E6
E9 H17 D12 K27 E21 F17 J23
D6 F11 H15 C14 E27 F24 H18
C6
J15 D14 D27
F21
FBC_D0 FBC_D1 FBC_D2 FBC_D3 FBC_D4 FBC_D5 FBC_D6 FBC_D7 FBC_D8 FBC_D9 FBC_D10 FBC_D11 FBC_D12 FBC_D13 FBC_D14 FBC_D15 FBC_D16 FBC_D17 FBC_D18 FBC_D19 FBC_D20 FBC_D21 FBC_D22 FBC_D23 FBC_D24 FBC_D25 FBC_D26 FBC_D27 FBC_D28 FBC_D29 FBC_D30 FBC_D31 FBC_D32 FBC_D33 FBC_D34 FBC_D35 FBC_D36 FBC_D37 FBC_D38 FBC_D39 FBC_D40 FBC_D41 FBC_D42 FBC_D43 FBC_D44 FBC_D45 FBC_D46 FBC_D47 FBC_D48 FBC_D49 FBC_D50 FBC_D51 FBC_D52 FBC_D53 FBC_D54 FBC_D55 FBC_D56 FBC_D57 FBC_D58 FBC_D59 FBC_D60 FBC_D61 FBC_D62 FBC_D63
FBC_DQM0 FBC_DQM1 FBC_DQM2 FBC_DQM3 FBC_DQM4 FBC_DQM5 FBC_DQM6 FBC_DQM7
FBC_DQS_WP0 FBC_DQS_WP1 FBC_DQS_WP2 FBC_DQS_WP3 FBC_DQS_WP4 FBC_DQS_WP5 FBC_DQS_WP6 FBC_DQS_WP7
FBC_DQS_RN0 FBC_DQS_RN1 FBC_DQS_RN2 FBC_DQS_RN3 FBC_DQS_RN4 FBC_DQS_RN5 FBC_DQS_RN6 FBC_DQS_RN7
N16E FBC_CMD34
FBC_CMD35
FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 FBC_CMD28 FBC_CMD29 FBC_CMD30 FBC_CMD31 FBC_CMD32 FBC_CMD33
FBC_DEBUG0 FBC_DEBUG1
FBC_WCK01
FBC_WCK01*
FBC_WCKB01
FBC_WCKB01*
FBC_WCK23
FBC_WCK23*
FBC_WCKB23
FBC_WCKB23*
FBC_WCK45
FBC_WCK45*
FBC_WCKB45
FBC_WCKB45*
FBC_WCK67
FBC_WCK67*
FBC_WCKB67
FBC_WCKB67*
FBC_PLL_AVDD
FBC_D<0>(20) FBC_D<1>(20) FBC_D<2>(20) FBC_D<3>(20)
D D
C C
B B
A A
FBC_D<4>(20) FBC_D<5>(20) FBC_D<6>(20) FBC_D<7>(20) FBC_D<8>(20) FBC_D<9>(20) FBC_D<10>(20) FBC_D<11>(20) FBC_D<12>(20) FBC_D<13>(20) FBC_D<14>(20) FBC_D<15>(20) FBC_D<16>(20) FBC_D<17>(20) FBC_D<18>(20) FBC_D<19>(20) FBC_D<20>(20) FBC_D<21>(20) FBC_D<22>(20) FBC_D<23>(20) FBC_D<24>(20) FBC_D<25>(20) FBC_D<26>(20) FBC_D<27>(20) FBC_D<28>(20) FBC_D<29>(20) FBC_D<30>(20) FBC_D<31>(20) FBC_D<32>(21) FBC_D<33>(21) FBC_D<34>(21) FBC_D<35>(21) FBC_D<36>(21) FBC_D<37>(21) FBC_D<38>(21) FBC_D<39>(21) FBC_D<40>(21) FBC_D<41>(21) FBC_D<42>(21) FBC_D<43>(21) FBC_D<44>(21) FBC_D<45>(21) FBC_D<46>(21) FBC_D<47>(21) FBC_D<48>(21) FBC_D<49>(21) FBC_D<50>(21) FBC_D<51>(21) FBC_D<52>(21) FBC_D<53>(21) FBC_D<54>(21) FBC_D<55>(21) FBC_D<56>(21) FBC_D<57>(21) FBC_D<58>(21) FBC_D<59>(21) FBC_D<60>(21) FBC_D<61>(21) FBC_D<62>(21) FBC_D<63>(21)
FBC_DBI<0>(20) FBC_DBI<1>(20) FBC_DBI<2>(20) FBC_DBI<3>(20) FBC_DBI<4>(21) FBC_DBI<5>(21) FBC_DBI<6>(21) FBC_DBI<7>(21)
FBC_EDC<0>(20) FBC_EDC<1>(20) FBC_EDC<2>(20) FBC_EDC<3>(20) FBC_EDC<4>(21) FBC_EDC<5>(21) FBC_EDC<6>(21) FBC_EDC<7>(21)
FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8 FBC_CMD9
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
B3 A4 B4 A5 A6 B6 B11 A11 C12 A12 B12 C15 A15 B15 B17 A17 C27 B27 A27 C26 A26 B26 A23 B23 B21 A21 C21 A20 B20 C20 C18 B18 D18 A18
C9 C24
F15 E15 J18 K18
F8 G8 H9 G9 H12 J12 C11 D11 D26 E26 H24 J24 J20 K20 J21 K21
FBC_CMD<0> (20) FBC_CMD<1> (20) FBC_CMD<2> (20) FBC_CMD<3> (20) FBC_CMD<4> (20) FBC_CMD<5> (20) FBC_CMD<6> (20) FBC_CMD<7> (20) FBC_CMD<8> (20) FBC_CMD<9> (20) FBC_CMD<10> (20) FBC_CMD<11> (20) FBC_CMD<12> (20) FBC_CMD<13> (20) FBC_CMD<14> (20) FBC_CMD<15> (20) FBC_CMD<16> (21) FBC_CMD<17> (21) FBC_CMD<18> (21) FBC_CMD<19> (21) FBC_CMD<20> (21) FBC_CMD<21> (21) FBC_CMD<22> (21) FBC_CMD<23> (21) FBC_CMD<24> (21) FBC_CMD<25> (21) FBC_CMD<26> (21) FBC_CMD<27> (21) FBC_CMD<28> (21) FBC_CMD<29> (21) FBC_CMD<30> (21) FBC_CMD<31> (21)
FBC_CLK0 (20) FBC_CLK0* (20) FBC_CLK1 (21) FBC_CLK1* (21)
FBC_WCK01 (20) FBC_WCK01* (20)
FBC_WCK23 (20) FBC_WCK23* (20)
FBC_WCK45 (21) FBC_WCK45* (21)
FBC_WCK67 (21) FBC_WCK67* (21)
PLACE AT BALLS
L26
FB_PLLAVDD FB_PLLAVDD
C223
C223 C0.1u50X70402
C0.1u50X70402
0.1uF*1 X7R 0.1uF*1 X7R22uF*1 X5R
R357
R357 10KR1%0402
FBC_CMD<1> FBC_CMD<17>
FBC_CMD<2> FBC_CMD<18>
10KR1%0402
R330
R330 10KR1%0402
10KR1%0402
GDDR5 Mode F Mapping By GB3-256
0..31
CMD0
CAS*
CMD1
CKE*
CMD2
RST*
CMD3
RAS*
CMD4
A1_A9
CMD5
A0_A10
CMD6
A12_RFU
CMD7
ABI*
CMD8
A6_A11
CMD9
A7_A8
CMD10
WE*
CMD11
A5_BA1 A4_BA2
CMD12
A2_BA0
CMD13 CMD14
A3_BA3
CMD15
CS* CMD16 CMD17 CMD18 CMD19 CMD20 CMD21 CMD22 CMD23 CMD24 CMD25 CMD26 CMD27 CMD28 CMD29 CMD30 CMD31
PLACE OUTSIDE OF BGA
C336
C336 C22u6.3X0603
C22u6.3X0603
LB3 30L5A-10LB3 30L5A-10
FBVDDQ
R328
R328 10KR1%0402
10KR1%0402
R355
R355 10KR1%0402
10KR1%0402
GND
32..63
CAS* CKE* RST* RAS* A1_A9 A0_A10 A12_RFU ABI* A6_A11 A7_A8 WE* A5_BA1 A4_BA2 A2_BA0 A3_BA3 CS*
FB_PLLAVDD (12)
3V3_NV
AF7 AF9 AF6 AF8 AG7 AG6 AG9 AG8 AC5 AA4 AC4 AC3 AD4 AD2 AD5 AD1
AC9 AC7 AC6 AC8
AC10
U10
R10 P10
AG10
AA5
AA8
AG5 AD7
AA7
AG4 AD6
AA6
R4 U3 U4 U5
V6 V5 Y4 Y5 Y6 Y7 Y8
H2 H4 H1 H3
F5 E2 E4
D3
J4
L5
J2 J1 J6
H5
L9 L8
U7 U9 R7
P8 P9 P5 P6 P2
P1 M5 M6 M7
P7
U6
E3
J5 U8 M4
V8
F4 L7
R8
P3
V7
F3 L6
R9
P4
INS182819326
INS182819326
G18E
G18E
5/21 FBD
5/21 FBD
FBD_D0 FBD_D1 FBD_D2 FBD_D3 FBD_D4 FBD_D5 FBD_D6 FBD_D7 FBD_D8 FBD_D9 FBD_D10 FBD_D11 FBD_D12 FBD_D13 FBD_D14 FBD_D15 FBD_D16 FBD_D17 FBD_D18 FBD_D19 FBD_D20 FBD_D21 FBD_D22 FBD_D23 FBD_D24 FBD_D25 FBD_D26 FBD_D27 FBD_D28 FBD_D29 FBD_D30 FBD_D31 FBD_D32 FBD_D33 FBD_D34 FBD_D35 FBD_D36 FBD_D37 FBD_D38 FBD_D39 FBD_D40 FBD_D41 FBD_D42 FBD_D43 FBD_D44 FBD_D45 FBD_D46 FBD_D47 FBD_D48 FBD_D49 FBD_D50 FBD_D51 FBD_D52 FBD_D53 FBD_D54 FBD_D55 FBD_D56 FBD_D57 FBD_D58 FBD_D59 FBD_D60 FBD_D61 FBD_D62 FBD_D63
FBD_DQM0 FBD_DQM1 FBD_DQM2 FBD_DQM3 FBD_DQM4 FBD_DQM5 FBD_DQM6 FBD_DQM7
FBD_DQS_WP0 FBD_DQS_WP1 FBD_DQS_WP2 FBD_DQS_WP3 FBD_DQS_WP4 FBD_DQS_WP5 FBD_DQS_WP6 FBD_DQS_WP7
FBD_DQS_RN0 FBD_DQS_RN1 FBD_DQS_RN2 FBD_DQS_RN3 FBD_DQS_RN4 FBD_DQS_RN5 FBD_DQS_RN6 FBD_DQS_RN7
N16E FBD_CMD34
FBD_CMD35
FBD_CMD0 FBD_CMD1 FBD_CMD2 FBD_CMD3 FBD_CMD4 FBD_CMD5 FBD_CMD6 FBD_CMD7 FBD_CMD8
FBD_CMD9 FBD_CMD10 FBD_CMD11 FBD_CMD12 FBD_CMD13 FBD_CMD14 FBD_CMD15 FBD_CMD16 FBD_CMD17 FBD_CMD18 FBD_CMD19 FBD_CMD20 FBD_CMD21 FBD_CMD22 FBD_CMD23 FBD_CMD24 FBD_CMD25 FBD_CMD26 FBD_CMD27 FBD_CMD28 FBD_CMD29 FBD_CMD30 FBD_CMD31 FBD_CMD32 FBD_CMD33
FBD_DEBUG0 FBD_DEBUG1
FBD_CLK0
FBD_CLK0*
FBD_CLK1
FBD_CLK1*
FBD_WCK01
FBD_WCK01*
FBD_WCKB01
FBD_WCKB01*
FBD_WCK23
FBD_WCK23*
FBD_WCKB23
FBD_WCKB23*
FBD_WCK45
FBD_WCK45*
FBD_WCKB45
FBD_WCKB45*
FBD_WCK67
FBD_WCK67*
FBD_WCKB67
FBD_WCKB67*
FBD_PLL_AVDD
AG3 AG2 AG1 AF3 AF1 AF2 AC1 AC2 AA2 AA1 AA3 Y1 Y2 Y3 V3 V2 C2 D1 D2 E1 F2 F1 L2 L1 M3 M1 M2 R3 R1 R2 U2 U1 V1 V4
AD3 J3
V9 V10 R6 R5
AF4 AF5 AD8 AD9 Y9 Y10 AA9 AA10 H6 H7 J8 J7 M8 M9 L3 L4
AA11
PLACE AT BALLS
C309
C309 C0.1u50X70402
C0.1u50X70402
GNDGND GND
INS182818709
GPU Frame Buffer Partition C/D
N16E-GT
N16E-GT
5
4
3
N16E-GT
N16E-GT
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
DGPU_MEM IF C/D
DGPU_MEM IF C/D
DGPU_MEM IF C/D
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
19 69Wednesday, September 17, 2014
19 69Wednesday, September 17, 2014
1
19 69Wednesday, September 17, 2014
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
DGPU_GDDR5 FrameBuffer C0
M6A
M12B
M12A
M12A
INS150980982
INS150980982
MIRRORED
MIRRORED
x32 x16
x32 x16
A11
D D
GND
FBC_D<24>(19) FBC_D<25>(19) FBC_D<26>(19) FBC_D<27>(19) FBC_D<28>(19) FBC_D<29>(19) FBC_D<30>(19) FBC_D<31>(19)
FBC_EDC<3>(19) FBC_DBI<3>(19)
FBC_WCK23(19) FBC_WCK23*(19)
C C
A13 B11 B13 E11 E13
C13 D13
F11 F13
A4 A2 B4 B2 E4 E2 F4 F2
C2 D2
D4 D5
M12 5020
B B
U4 U2
T4
T2 N4 N2 M4 M2
R2
P2
FBC_D<8>(19) FBC_D<9>(19) FBC_D<10>(19) FBC_D<11>(19) FBC_D<12>(19) FBC_D<13>(19) FBC_D<14>(19) FBC_D<15>(19)
A A
FBC_EDC<1>(19) FBC_DBI<1>(19)
FBC_WCK01(19) FBC_WCK01*(19)
U11 U13
T11
T13 N11 N13
M11 M13
R13 P13
P4 P5
5
NC
NC
DQ16
NC
NC
DQ17
NC
NC
DQ18
NC
NC
DQ19
NC
NC
DQ20
NC
NC
DQ21
NC
NC
DQ22
NC
NC
DQ23
GND
GND
EDC2
NC
NC
DBI2*
FBC_VREFD
A10
VREFD DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
EDC3 DBI3*
WCK23 WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
FBVDDQ
R340
R340 549R1%0402
549R1%0402
C606
C606 C820p50X0402
C820p50X0402
GND GND
M12D
M12D
INS150980934
INS150980934
MIRRORED
MIRRORED
x16x32
x16x32
NC
NC
DQ0
NC
NC
DQ1
NC
NC
DQ2
NC
NC
DQ3
NC
NC
DQ4
NC
NC
DQ5
NC
NC
DQ6
NC
NC
DQ7
NC
NC
EDC0
NC
NC
DBI0*
FBC_VREFD
U10
VREFD DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
EDC1 DBI1*
WCK01 WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
GND GND
R81
R81
1.33KR1%0402
1.33KR1%0402
C325
C325 C820p50X0402
C820p50X0402
FBVDDQ
FBC_CMD<3>(19) FBC_CMD<0>(19) FBC_CMD<10>(19) FBC_CMD<15>(19)
FBC_CMD<7>(19)
FBC_CMD<5>(19) FBC_CMD<4>(19) FBC_CMD<13>(19) FBC_CMD<14>(19) FBC_CMD<12>(19) FBC_CMD<11>(19) FBC_CMD<8>(19) FBC_CMD<9>(19) FBC_CMD<6>(19)
FBC_CMD<2>(19) FBC_CMD<1>(19)
R343
R343 121R1%0402
121R1%0402
GND
R95
R95 549R1%0402
549R1%0402
R94
R94
1.33KR1%0402
1.33KR1%0402
4
FBC_CLK0 FBC_CLK0*
FBC_VREFC
FBC_ZQ0
FBC_SEN0
R96
R96 1KR1%0402
1KR1%0402
GND
M12B
INS150980870
INS150980870
L3
RAS*
G3
CAS*
G12
WE*
L12
CS*
J4
ABI*
K4
A10_A0
K5
A9_A1
K11
BA0_A2
K10
BA3_A3
H11
BA2_A4
H10
BA1_A5
H5
A11_A6
H4
A8_A7
J5
A12_RFU/NC
J2
RESET*
J3
CKE*
J12
CK
J11
CK#
A5
VPP_NC
U5
VPP/NC
J14
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
FBC_D<16>(19) FBC_D<17>(19) FBC_D<18>(19) FBC_D<19>(19) FBC_D<20>(19) FBC_D<21>(19) FBC_D<22>(19) FBC_D<23>(19)
FBC_EDC<2>(19) FBC_DBI<2>(19)
FBC_WCK23 FBC_WCK23*
FBC_D<0>(19) FBC_D<1>(19) FBC_D<2>(19) FBC_D<3>(19) FBC_D<4>(19) FBC_D<5>(19) FBC_D<6>(19) FBC_D<7>(19)
FBC_EDC<0>(19) FBC_DBI<0>(19)
GND
FBC_WCK01 FBC_WCK01*
3
M6A
INS150981014
INS150981014
NORMAL
NORMAL
U11
DQ16
U13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2*
x32
x32
U4
DQ24
U2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3*
P4
WCK23
P5
WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
VREFD
x16
x16
U10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
M6 5010
M6D
M6D
INS150980830
INS150980830
NORMAL
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0*
x32
x32
A11
DQ8
A13
DQ9
B11
DQ10
B13
DQ11
E11
DQ12
E13
DQ13
F11
DQ14
F13
DQ15
C13
EDC1
D13
DBI1*
D4
WCK01
D5
WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
VREFD
x16
x16
A10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GND
GND
NC
NC
FBC_VREFD
FBC_VREFD
2
C326
C326 C820p50X0402
C820p50X0402
GND
GND GND
R227, R221, C501 unstuff when N15P-GX-B
(N16P-GX-B ALL unstuff)
M6B
M6B
INS150980798
INS150980798
FBC_CMD<3>(19) FBC_CMD<0>(19) FBC_CMD<10>(19) FBC_CMD<15>(19)
FBC_CMD<7>(19)
FBC_CMD<5>(19) FBC_CMD<4>(19) FBC_CMD<13>(19) FBC_CMD<14>(19) FBC_CMD<12>(19) FBC_CMD<11>(19) FBC_CMD<8>(19) FBC_CMD<9>(19) FBC_CMD<6>(19)
FBC_CMD<2>(19) FBC_CMD<1>(19)
R80
R80 121R1%0402
121R1%0402
FBC_CLK0(19)
FBC_CLK0*(19)
FBC_VREF_L_FET
N-2N7002_SOT23
N-2N7002_SOT23
FBC_CLK0 FBC_CLK0*
FBC_VREFC
FBC_ZQ1
FBC_SEN1
R93
R93 1KR1%0402
1KR1%0402
Q6
Q6
GND
Title
Title
Title
DGPU_GDDR5 FrameBuffer C
DGPU_GDDR5 FrameBuffer C
DGPU_GDDR5 FrameBuffer C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet of
Date: Sheet of
Date: Sheet of
G3
RAS*
L3
CAS*
L12
WE*
G12
CS*
J4
ABI*
H4
A10_A0
H5
A9_A1
H11
BA0_A2
H10
BA3_A3
K11
BA2_A4
K10
BA1_A5
K5
A11_A6
K4
A8_A7
J5
A12_RFU/NC
J2
RESET*
J3
CKE*
J12
CK
J11
CK#
A5
VPP_NC
U5
VPP/NC
J14
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
R342 40.2R1%0402R342 40.2R1%0402
R341 40.2R1%0402R341 40.2R1%0402
R97 931R1%0402R97 931R1%0402
R99 931R1%0402R99 931R1%0402
D
D
G
G
S
S
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
FBC_CLK0_MIDPT
GND
FBC_VREFD (21)
FBC_VREFC (21)
GPIO10_ALT_MEM_VREF (13,15,26)
20 69Wednesday, September 17, 2014
20 69Wednesday, September 17, 2014
20 69Wednesday, September 17, 2014
1
C614
C614 C0.01u50X0402
C0.01u50X0402
0B
0B
0B
5
VINAFIX.COM
4
3
2
1
DGPU_GDDR5 FrameBuffer C1
M11A
M11A
INS150981836
INS150981836
NORMAL
NORMAL
FBC_D<48>(19)
D D
C C
FBC_D<49>(19) FBC_D<50>(19) FBC_D<51>(19) FBC_D<52>(19) FBC_D<53>(19) FBC_D<54>(19) FBC_D<55>(19)
FBC_EDC<6>(19) FBC_DBI<6>(19)
FBC_WCK67(19) FBC_WCK67*(19)
U11
DQ16
U13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2*
x32
x32
U4
DQ24
U2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3*
P4
WCK23
P5
WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
VREFD
x16
x16
FBC_VREFC(20)
U10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
FBC_VREFD
C621
C621 C820p50X0402
C820p50X0402
GND
M8
B B
FBC_D<32>(19) FBC_D<33>(19) FBC_D<34>(19) FBC_D<35>(19) FBC_D<36>(19) FBC_D<37>(19) FBC_D<38>(19) FBC_D<39>(19)
FBC_EDC<4>(19) FBC_DBI<4>(19)
A A
GND
FBC_WCK45(19) FBC_WCK45*(19)
5
M11D
M11D
INS150981772
INS150981772
5010
NORMAL
NORMAL
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0*
x32
x32
A11
DQ8
A13
DQ9
B11
DQ10
B13
DQ11
E11
DQ12
E13
DQ13
F11
DQ14
F13
DQ15
C13
EDC1
D13
DBI1*
D4
WCK01
D5
WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
VREFD
x16
x16
A10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GND
GND
NC
NC
FBC_VREFD
FBC_CMD<19>(19) FBC_CMD<16>(19) FBC_CMD<26>(19) FBC_CMD<31>(19)
FBC_CMD<23>(19)
FBC_CMD<21>(19) FBC_CMD<20>(19) FBC_CMD<29>(19) FBC_CMD<30>(19) FBC_CMD<28>(19) FBC_CMD<27>(19) FBC_CMD<24>(19) FBC_CMD<25>(19) FBC_CMD<22>(19)
FBC_CMD<18>(19) FBC_CMD<17>(19)
R339
R339 121R1%0402
121R1%0402
GND GND
C216
C216 C820p50X0402
C820p50X0402
GND
FBC_VREFC
FBC_ZQ2
FBC_SEN2
FBC_VREFD (20)
4
FBC_CLK1 FBC_CLK1*
R73
R73 1KR1%0402
1KR1%0402
M11B
M11B
INS150981804
INS150981804
G3
RAS*
L3
CAS*
L12
WE*
G12
CS*
J4
ABI*
H4
A10_A0
H5
A9_A1
H11
BA0_A2
H10
BA3_A3
K11
BA2_A4
K10
BA1_A5
K5
A11_A6
K4
A8_A7
J5
A12_RFU/NC
J2
RESET*
J3
CKE*
J12
CK
J11
CK#
A5
VPP_NC
U5
VPP/NC
J14
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
GND
FBC_D<56>(19) FBC_D<57>(19) FBC_D<58>(19) FBC_D<59>(19) FBC_D<60>(19) FBC_D<61>(19) FBC_D<62>(19) FBC_D<63>(19)
FBC_EDC<7>(19) FBC_DBI<7>(19)
FBC_D<40>(19) FBC_D<41>(19) FBC_D<42>(19) FBC_D<43>(19) FBC_D<44>(19) FBC_D<45>(19) FBC_D<46>(19) FBC_D<47>(19)
FBC_EDC<5>(19) FBC_DBI<5>(19)
3
FBC_WCK67 FBC_WCK67*
FBC_WCK45 FBC_WCK45*
M5A
M5A
INS150981900
INS150981900
MIRRORED
MIRRORED
x32 x16
x32 x16
A11 A13 B11 B13 E11 E13 F11 F13
C13 D13
A4 A2 B4 B2 E4 E2 F4 F2
C2 D2
D4 D5
NC
NC
DQ16
NC
NC
DQ17
NC
NC
DQ18
NC
NC
DQ19
NC
NC
DQ20
NC
NC
DQ21
NC
NC
DQ22
NC
NC
DQ23
GND
GND
EDC2
NC
NC
DBI2*
A10
VREFD DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
EDC3 DBI3*
WCK23 WCK23*
K4G20325FD-FC03
K4G20325FD-FC03
M19
M5D
M5D
INS150981988
INS150981988
5020
MIRRORED
MIRRORED
x16x32
x16x32
NC
NC
DQ0
NC
NC
DQ1
NC
NC
DQ2
NC
NC
DQ3
NC
NC
DQ4
NC
NC
DQ5
NC
NC
DQ6
NC
NC
DQ7
NC
NC
EDC0
NC
NC
DBI0*
U10
VREFD DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
EDC1 DBI1*
WCK01 WCK01*
K4G20325FD-FC03
K4G20325FD-FC03
M11 M13
U11 U13 T11 T13 N11 N13
R13 P13
U4 U2 T4 T2 N4
N2 M4 M2
R2
P2
P4
P5
FBC_VREFD
FBC_VREFD
2
C224
C224 C820p50X0402
C820p50X0402
GND
R227, R221, C501 unstuff when N15P-GX-B
(N16P-GX-B ALL unstuff)
M5B
M5B
INS150981940
INS150981940
FBC_CMD<19>(19) FBC_CMD<16>(19) FBC_CMD<26>(19) FBC_CMD<31>(19)
FBC_CMD<23>(19)
FBC_CMD<21>(19) FBC_CMD<20>(19) FBC_CMD<29>(19) FBC_CMD<30>(19) FBC_CMD<28>(19) FBC_CMD<27>(19) FBC_CMD<24>(19) FBC_CMD<25>(19) FBC_CMD<22>(19)
FBC_CMD<18>(19) FBC_CMD<17>(19)
R76
R76 121R1%0402
121R1%0402
FBC_CLK1(19)
FBC_CLK1*(19)
FBC_CLK1 FBC_CLK1*
FBC_VREFC
FBC_ZQ3
FBC_SEN3
R75
R75 1KR1%0402
1KR1%0402
GNDGND
R78 40.2R1%0402R78 40.2R1%0402
R79 40.2R1%0402R79 40.2R1%0402
Title
Title
Title
DGPU_GDDR5 FrameBuffer C
DGPU_GDDR5 FrameBuffer C
DGPU_GDDR5 FrameBuffer C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-16J1
MS-16J1
MS-16J1
Date: Sheet
Date: Sheet of
Date: Sheet of
L3
RAS*
G3
CAS*
G12
WE*
L12
CS*
J4
ABI*
K4
A10_A0
K5
A9_A1
K11
BA0_A2
K10
BA3_A3
H11
BA2_A4
H10
BA1_A5
H5
A11_A6
H4
A8_A7
J5
A12_RFU/NC
J2
RESET*
J3
CKE*
J12
CK
J11
CK#
A5
VPP_NC
U5
VPP/NC
J14
VREFC
J13
ZQ
J10
SEN
K4G20325FD-FC03
K4G20325FD-FC03
FBC_CLK1_MIDPT
GND
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
21 69Wednesday, September 17, 2014
21 69Wednesday, September 17, 2014
21 69Wednesday, September 17, 2014
1
C276
C276 C0.01u50X0402
C0.01u50X0402
of
0B
0B
0B
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