MSI MS-16D2 Schematic EV. 0C 0701
A
www.schematic-x.blogspot.com
B
C
D
E
MS-16F2 Ver : 0C_0701
01 : BLOCK DIAGRAM
02 : PLATFORM
03 : PROCESSOR-1 (HOST BUS)
04 : PROCESSOR-2 (DDR3)
05 : PROCESSOR-3 (POWER)
1 1
06 : PROCESSOR-4 (GRAPHICS POWER)
07 : PROCESSOR-5 (GND)
08 : PROCESSOR-6 (RESERVE)
09 : DDR3 SODIMM A0
10 : DDR3 SODIMM A1
11 : DDR3 SODIMM B0
12 : DDR3 SODIMM B1
13 : EDP
14 : MXM3.0 Slot
15 : CRT/LVDS/CCD
16 : HDMI
17 : CougarPoint (HDA/JTAG/SATA)
18 : CougarPoin (PCI-E/SMBUS/CLK)
19 : CougarPoint (DMI/FDI/GPIO)
20 : CougarPoint (LVDS/DDI)
21 : CougarPoint (PCI/USB/NVRAM)
22 : CougarPoint (GPIO/NCTF/RSVD)
23 : CougarPoint (POWER)
24 : CougarPoint (POWER)
25 : CougarPoint (GND)
2 2
26 : USB3.0(UPD720200)
27 : CLOCK GEN (SL28770)
28 : KBC/EC/uP (KB3930)
29 : GIGA LAN (RTL8111E)
30 : Card Reader (RTL5139)
31 : WLAN/TP/BTB/USB
32 : HDD2/ODD/ESATA /FAN/BT
33 : AUDIO(ALC892)
34 : LED_EPF021J
35 : M_Battery select
36 : M_Battery Charger
37 : M_System Power
38 : M_DIMM_1.5VRUN
39 : M_VTT_1.8VRUN
40 : 0.9V Power
41 : CPU Power
42 : EMI/Screw
43 : Test Pad
44 : 16F1A_NewCard/HDD1
45 : 16F1B_IO/Audio Board
3 3
46 : 16F1C_HDD2
47 : 16F1D_Cap Sensor Board
48 : 16F1E_Touch Pad L/R Key
49 : 16F1F_CDLED_RF
50 : 16F1G_ABLED Front
51 : 16F1H_ABLED_L
52_16F1I_ABLED_R
53 : 16F1J_CDLED_L
54 : 16F1K_CDLED_LF
55 : PowerDown Sequency
56 : PowerOn Sequency
57 : History
4 4
HDMI
Card reader
Page 30
Mini PCIE
Connector
Page 31
CRT
Page 15Page 16
LVDS
Page 15
MXM3.0
Page 14
Express Card
Page 44 Page 29
USB3.0
Page 26
EDP
Page 13
GIGA LAN
RTL8111E
PCI-Express
AUDIO ALC892
Page 33
SPI Flash
32Mbit
Page 17
PCI-E x16
Azalia
NB-SPI
TP & KB
Page 28
Page 48
Huron River Platform
DC JACK
Page 35
SYS POWER
CPU
SANDYBRIDGE
Page 3~8
DMI Interface
PCH
COUGAR POINT
Page 14~22
LPC BUS
LPC DUBUG
KBC
ENE 3930
Page 28
Page 28
Dual Channel DDRIII
800/1066/1666 MHz
SATA port0
SATA port1
SATA port0
SATA port1
DDR-SODIMM A0&A1
Page 09,10
DDR-SODIMM B0&B1
Page 11,12
HDD1
Page 43
HDD2
Page 45
ODD
Page 31
ESATA
Page 31
USB1.1/2.0
SATA3
USB 0 : USB Port 2
USB 1 : Card reader
USB 2 : USB Port 1
USB 3 : New Card
USB 4 : Minicard (WLAN)
USB 5 : LVDS- WebCam
USB 6 : MCU8051 LED Control
USB 7 : USB Port 3
USB 8 : BT (3801)
USB 9 : 3D glass
USB 10 : WLAN (3870)
USB 11 : EDP - WebCam
USB 12 : USB Port 4
USB 13 : BT (3870)
14MHZ CRYSTAL
CHARGER
MAX8731
Page 36
+3V +5V +12V_FAN
TPS51125 MAX17062
Page 37
+1_5VDIMM
TPS51218
Page 38
+VTT_CORE
TPS51218
Page 39
+VTT(1.05V)
APL5912
Page 39
+1_8VRUN
APL5912
Page 39
0.9V
TPS51218
Page 40
CPU POWER
ISL95831
Page 41
+0.75VRUN
APL5331KAC
Page 38
+1.5VRUN
N-AO4468
Page 38
A
EC-SPI
SPI BIOS
Page 28
B
C
CLK GEN
CK505
(SL28770)
Page 27
PCH
D
eee
TTTiiitttlll
BBBLLLOOOCCCKKK DDDIIIAAAGGGRRRAAAMMM
eee vvv
SSSiiizzz DDDooocccuuummmeeennnttt NNNuuummmbbbeeerrr RRReee
CCCuuussstttooommm
DDDaaattteee::: SSShhheeeeeettt
MMMIIICCCRRROOO---SSSTTTAAARRR IIINNNTTT'''LLL CCCOOO...,,,LLLTTTDDD...
MMMSSS---111666FFF222111
E
000CCC
ooofff
111 555777FFFrrriiidddaaayyy,,, JJJuuulllyyy 000222,,, 222000111000
A
1 1
B
C
D
E
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
Voltage Rails
PWR_SRC
+5VALW
+5VRUN
+5VSUS
+3VALW
+3VRUN_CK505
+3VSUS
+3VRUN
+1_5VDIMM
+1_5VSUS
+1_5VRUN
VTT
+0_75VRUN
+VCC_CORE
2 2
+VCC_GFXCORE
VOLTAGE
12V
5V
5V
5V
3.3V
3.3V
3.3V
3.3V
1.5V
1.5V
1.5V
1.05V
0.75V
1.05V-1.1V
1.1V
S0, (S3-S5)
S0, (S3-S5)
S0, S3
S0
S0, (S3-S5)
S0
S0, S3
S0
S0, (S3-S4)
S0
S0
S0
S0
S0
S0
DESCRIPTIONACTIVE INPOWER PLANE
Clock, MCH
DDR core
PCH
DDR command & control pull up.
CPU core rail
GMCH Graphics core rail
Suffix
# = Active Low Signal
Prefix
H = Host
M = DDR Memory
TP = Test Point (does not connect anywhere else)
PCB Footprints
SOT-23
1
3
As seen from top
2
1
2
3
SOT23-5
5
4
Power States
Net Naming Conventions
SLP_S3#
SLP_S4#
HIGH
HIGH
LOW
LOW
SLP_S5#
HIGH
HIGH
HIGH
LOW
S0 (Full on)
S3 (Suspend to RAM)
3 3
S4 (Suspend to Disk)
S5 (Soft Off)
HIGH
LOW
LOW
LOW
+V*ALWAYS
ON
ON
ON
ON
+V*SUS
ON
ON
OFF
OFF
+V*RUN
ON
OFF
OFF
OFF
CLK
ON
OFF
OFF
OFF
4 4
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
PLATFORM
PLATFORM
PLATFORM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-16F21
MS-16F21
MS-16F21
E
0C
0C
0C
of
of
of
257Tuesday, June 29, 2010
257Tuesday, June 29, 2010
257Tuesday, June 29, 2010
A
B
C
D
E
SANDYBRIDGE PROCESSOR (CLK,MISC,JTAG)
Intel Comments:
U50A
U50A
R191
R191
10KR0402
10KR0402
C
C
NC7WZ14P6X_SC70
NC7WZ14P6X_SC70
Q7
Q7
E
E
N-SST3904_SOT23
N-SST3904_SOT23
A
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
+3VSUS
C212
C212
C0.1u10X0402
C0.1u10X0402
324
AY
AY
DDR3_DRAMRST#9,10,11,12
DRAMRST_CNTRL_PCH18
DRAMRST_CNTRL_EC28
5
U28A
U28A
VCC
VCC
GND
GND
R326 1KR5%0402R326 1KR5%0402
DMI_TXN019
DMI_TXN119
DMI_TXN219
+VTT_CORE
+VTT_CORE
R184
R184
10KR0402
10KR0402
Z0301
R190
R190
20KR1%0402
20KR1%0402
DMI_TXN319
DMI_TXP019
DMI_TXP119
DMI_TXP219
DMI_TXP319
DMI_RXN019
DMI_RXN119
DMI_RXN219
DMI_RXN319
DMI_RXP019
DMI_RXP119
DMI_RXP219
DMI_RXP319
R427 1KR5%0402R427 1KR5%0402
R395 24.9R1%0402R395 24.9R1%0402
R130 10KR0402R130 10KR0402
+3VSUS
B
B
C217
C217
C1u6.3Y0402
C1u6.3Y0402
4 4
3 3
R428
R428
1KR5%0402
1KR5%0402
Intel Comments:
eDP COMP signals are required
if integrated gfx is enabled even
if eDP interface is disabled.
+1_5VRUN
2 2
1 1
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PM_DRAM_PWRGD19
0C
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
200R5%0402
200R5%0402
+1_5VRUN_PWGD 38
+1_5VDIMM
R323
R323
1KR5%0402
1KR5%0402
R321 0R0402R321 0R0402
R314 X_0R0402R314 X_0R0402
PEG_COMP
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
+3VSUS
1
A
A
2
B
B
U27
U27
Q24
Q24
N-BSS138_SOT23
N-BSS138_SOT23
D S
G
C359
C359
C0.047u10X0402
C0.047u10X0402
R138 24.9R1%0402R138 24.9R1%0402
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
53
VCC
VCC
Y
Y
GND
GND
S08P5X_SC70
S08P5X_SC70
4
PEG_RXN[15:0] 14
PEG_RXP[15:0] 14
PEG_TXN[15:0] 14
PEG_TXP[15:0] 14
R181 1.5KR1%0402R181 1.5KR1%0402
CPUDRAMRST#
R324
R324
5.1KR1%0402
5.1KR1%0402
B
+VTT_CORE
X_SN74LVC1G07
X_SN74LVC1G07
EC_PROCHOT#28
EC default tri-state, active low
R180 10KR0402R180 10KR0402
VDDPWRGOOD_RZ0302
R187
R187
1.27KR1%0402
1.27KR1%0402
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
+3VSUS
R185
R185
CATERR# doesn't not require an external on board pull-up resistor
H_SNB_IVB#22
R372 X_51R1%0402R372 X_51R1%0402
H_PECI22,28
R213 54.9R1%0402R213 54.9R1%0402
1 2
1 2
JNC14 X_0402JNC14 X_0402
0C
R417 1.5KR1%0402R417 1.5KR1%0402
0C
+3VSUS +VTT_CORE
1
AY
AY
2
TPJNC16TPJNC16
H_THRMTRIP#22
C216
C216
53
VCC
VCC
U51
U51
GND
GND
X_74LVC1G07DCK
X_74LVC1G07DCK
+3VRUN +VTT_CORE
74LVC1G07:
pin 1 is NC
U53
U53
1
AY
AY
2
VCCPWRGOOD_0_R
+VTT_CORE
R170
C218
C218
53
X_0.1u10X0402
X_0.1u10X0402
VCC
VCC
4
GND
GND
R4260R0402 R4260R0402
0C
R170
68R0402
68R0402
IMVP_PROCHOT#41
H_PM_SYNC19
H_CPUPWRGD22
BUF_PTL_RST#21
JNC9 X_0402JNC9 X_0402
74LVC1G07:
pin 1 is NC
1.5V
SMB_DATA_DIMM9,10,11,12,18,27
SMB_CLK_DIMM9,10,11,12,18,27
C
SKTOCC#JNC
H_PROCHOT#_R
H_PM_SYNC_R
VCCPWRGOOD_0_R
VDDPWRGOOD_R
1.065V
R414
R414
715R1%0402
715R1%0402
X_C0.1u10X0402
X_C0.1u10X0402
R419
R419
4
H_CATERR#
PLT_RST#_R
R420
R420
X_75R1%0402
X_75R1%0402
X_43R5%0402
X_43R5%0402
+VTT_CORE
U50B
U50B
C26
PROC_SELECT#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
PLT_RST#_R
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
XDP_PREQ#
XDP_PRDY#
XDP_CPU_BPM_N0
XDP_CPU_BPM_N1
XDP_CPU_BPM_N2
XDP_CPU_BPM_N3
XDP_CPU_BPM_N4
XDP_CPU_BPM_N5
XDP_CPU_BPM_N6
XDP_CPU_BPM_N7
R201 X_0R0402R201 X_0R0402
R202 X_0R0402R202 X_0R0402
JXDP1
JXDP1
43
44
3
5
9
11
15
17
21
23
27
29
33
35
51
53
4
6
10
12
16
18
22
24
28
30
34
36
61
VCC_OBS_AB
VCC_OBS_CD
OBSFN_A0
OBSFN_A1
OBSDATA_A_0
OBSDATA_A_1
OBSDATA_A_2
OBSDATA_A_3
OBSFN_B0
OBSFN_B1
OBSDATA_B_0
OBSDATA_B_1
OBSDATA_B_2
OBSDATA_B_3
SDA
SCL
OBSFN_C0
OBSFN_C1
OBSDATA_C_0
OBSDATA_C_1
OBSDATA_C_2
OBSDATA_C_3
OBSFN_D_0
OBSFN_D_1
OBSDATA_D_0
OBSDATA_D_1
OBSDATA_D_2
OBSDATA_D_3
61
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
0C
GND18_XDP_PRESENTB
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
ITPCLK/HOOK4
ITPCLKB/HOOK5
RESETB/HOOK6
DBRB/HOOK7
X_BTB60PF-RH
X_BTB60PF-RH
BCLK
BCLK#
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TRST#
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TCK1
TCK0
TDO
TRSTn
TDI
TMS
HOOK0
HOOK1
HOOK2
HOOK3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
62
D
TCK
TMS
TDI
TDO
55
57
52
54
56
58
39
41
45
47
40
42
46
48
1
7
13
19
25
31
37
49
59
2
8
14
20
26
32
38
50
60
62
A28
A27
R444 1KR5%0402R444 1KR5%0402
A16
R445 1KR5%0402R445 1KR5%0402
A15
CPUDRAMRST#
R8
SM_RCOMP0JNC
AK1
SM_RCOMP1JNC
A5
SM_RCOMP2JNC
A4
XDP_PRDY#
AP29
XDP_PREQ#
AP27
XDP_TCLK
AR26
XDP_TMS
AR27
XDP_TRST#
AP30
XDP_TDI
AR28
XDP_TDO
AP26
XDP_DBRESET#
AL35
XDP_CPU_BPM_N0
AT28
XDP_CPU_BPM_N1
AR29
XDP_CPU_BPM_N2
AR30
XDP_CPU_BPM_N3
AT30
XDP_CPU_BPM_N4
AP32
XDP_CPU_BPM_N5
AR31
XDP_CPU_BPM_N6
AT31
XDP_CPU_BPM_N7
AR32
XDP_TCLK
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_PWRGD
XDP_HOOK1
XDP_HOOK2
XDP_PWROK
XPD_RESET#
XDP_DBRESET#
CPU_CLKP
CPU_CLKN
R408 140R1%0402R408 140R1%0402
R391 25.5R1%0402R391 25.5R1%0402
R390 200R1%0402R390 200R1%0402
R199
R199
R198 X_0R0402R198 X_0R0402
R197
R197
R196 X_0R0402R196 X_0R0402
X_1KR1%0402
X_1KR1%0402
X_1KR1%0402
X_1KR1%0402
R425
R425
XDP_PWROK
R388 X_0R0402R388 X_0R0402
R392 X_0R0402R392 X_0R0402
R389 0R0402R389 0R0402
R393 0R0402R393 0R0402
+VTT_CORE
H_CPUPWRGD
X_1KR1%0402
X_1KR1%0402
CLK_CPU1P 27
CLK_CPU1N 27
CLK_EXP 18
CLK_EXP# 18
SM_RCOMP[0] Width:20mil Spacing:20mil
SM_RCOMP[1] Width:20mil Spacing:20mil
SM_RCOMP[2] Width:15mil Spacing:20mil
SM_RCOMP[1][2][3] Length max: 500mil
RN6
XDP_TDI
XDP_TMS
XDP_TDO
XDP_PREQ#
XDP_TCLK
XDP_TRST#
XDP_DBRESET#
PM_PWRBTN# 19,28
CFG0 8
SYS_PWROK 19,41
XDP_CPU_CLK_P 18
XDP_CPU_CLK_N 18
XDP_RST# 21
X_1KR1%0402
X_1KR1%0402
R200
R200
Title
Title
Title
PROCESSOR
PROCESSOR
PROCESSOR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
Date: Sheet
1
3
5
7
8P4R-51R1%0402
8P4R-51R1%0402
R182 X_51R1%0402R182 X_51R1%0402
R179 51R1%0402R179 51R1%0402
R176 51R1%0402R176 51R1%0402
R171
R171
+3VSUS
E
RN6
2
4
6
8
1KR1%0402
1KR1%0402
+VTT_CORE
+3VRUN
357Wednesday, June 30, 2010
357Wednesday, June 30, 2010
357Wednesday, June 30, 2010
0C
0C
0C
of
of
of
A
B
C
D
E
SANDYBRIDGE PROCESSOR (DDR3)
U50D
AM5
AM6
AR3
AN3
AN2
AN1
AN9
AN8
AR6
AR5
AR9
AJ11
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA10
U50D
AE2
SB_CLK[0]
AD2
SB_CLK#[0]
C9
SB_DQ[0]
A7
SB_DQ[1]
D10
SB_DQ[2]
C8
SB_DQ[3]
A9
SB_DQ[4]
A8
SB_DQ[5]
D9
SB_DQ[6]
D8
SB_DQ[7]
G4
SB_DQ[8]
F4
SB_DQ[9]
F1
SB_DQ[10]
G1
SB_DQ[11]
G5
SB_DQ[12]
F5
SB_DQ[13]
F2
SB_DQ[14]
G2
SB_DQ[15]
J7
SB_DQ[16]
J8
SB_DQ[17]
K10
SB_DQ[18]
K9
SB_DQ[19]
J9
SB_DQ[20]
J10
SB_DQ[21]
K8
SB_DQ[22]
K7
SB_DQ[23]
M5
SB_DQ[24]
N4
SB_DQ[25]
N2
SB_DQ[26]
N1
SB_DQ[27]
M4
SB_DQ[28]
N5
SB_DQ[29]
M2
SB_DQ[30]
M1
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
AP3
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
AP2
SB_DQ[39]
AP5
SB_DQ[40]
SB_DQ[41]
AT5
SB_DQ[42]
AT6
SB_DQ[43]
AP6
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
AT8
SB_DQ[50]
AT9
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
AA9
SB_BS[0]
AA7
SB_BS[1]
R6
SB_BS[2]
SB_CAS#
AB8
SB_RAS#
AB9
SB_WE#
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]
RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]
RSVD_TP[17]
RSVD_TP[18]
RSVD_TP[19]
RSVD_TP[20]
SB_CKE[0]
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[1]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
R9
AE1
AD1
R10
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
AE4
AD4
AD5
AE5
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_CLK_DDR0 11
M_B_CLK_DDR#0 11
M_B_CKE0 11
M_B_CLK_DDR1 11
M_B_CLK_DDR#1 11
M_B_CKE1 11
M_B_CLK_DDR2 12
M_B_CLK_DDR#2 12
M_B_CKE2 12
M_B_CLK_DDR3 12
M_B_CLK_DDR#3 12
M_B_CKE3 12
M_B_CS#0 11
M_B_CS#1 11
M_B_CS#2 12
M_B_CS#3 12
M_B_ODT0 11
M_B_ODT1 11
M_B_ODT2 12
M_B_ODT3 12
M_B_DQS#[7:0] 11,12
M_B_DQS[7:0] 11,12
M_B_A[15:0] 11,12
U50C
U50C
4 4
M_A_DQ[63:0]9,10
3 3
2 2
M_A_BS09,10
M_A_BS19,10
M_A_BS29,10
M_A_CAS#9,10
M_A_RAS#9,10
M_A_WE#9,10
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
G10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AK8
AK9
AH8
AH9
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
AE8
AD9
F10
N10
AJ5
AJ6
AJ8
AJ9
AL9
AL8
AF9
C5
D5
D3
D2
D6
C6
C2
C3
F8
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N8
N7
M9
N9
M7
V6
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]
RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]
RSVD_TP[7]
RSVD_TP[8]
RSVD_TP[9]
RSVD_TP[10]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLK_DDR0 9
M_A_CLK_DDR#0 9
M_A_CKE0 9
M_A_CLK_DDR1 9
M_A_CLK_DDR#1 9
M_A_CKE1 9
M_A_CLK_DDR2 10
M_A_CLK_DDR#2 10
M_A_CKE2 10
M_A_CLK_DDR3 10
M_A_CLK_DDR#3 10
M_A_CKE3 10
M_A_CS#0 9
M_A_CS#1 9
M_A_CS#2 10
M_A_CS#3 10
M_A_ODT0 9
M_A_ODT1 9
M_A_ODT2 10
M_A_ODT3 10
M_A_DQS#[7:0] 9,10
M_A_DQS[7:0] 9,10
M_A_A[15:0] 9,10
M_B_DQ[63:0]11,12
M_B_BS011,12
M_B_BS111,12
M_B_BS211,12
M_B_CAS#11,12
M_B_RAS#11,12
M_B_WE#11,12
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
1 1
Title
Title
Title
DDR3
DDR3
DDR3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
E
457Tuesday, June 29, 2010
457Tuesday, June 29, 2010
457Tuesday, June 29, 2010
0C
0C
0C
of
of
of
A
B
C
D
E
SANDYBRIDGE PROCESSOR (POWER)
POWER
U50F
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
U50F
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
4 4
3 3
2 2
1 1
+VCC_CORE
POWER
CORE SUPPLY
CORE SUPPLY
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
SENSE LINES SVID
SENSE LINES SVID
PEG AND DDR
PEG AND DDR
VCCIO_SENSE
VSSIO_SENSE
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
JNC7 X_0402JNC7 X_0402
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
TP_VSS_SENSE_VTTJNC
A10
1 2
R162 44.2R1%0402R162 44.2R1%0402
VTT_SENSE
TPJNC14TPJNC14
C180
C166
C166
C506
C506
C10u6.3X0805
C10u6.3X0805
C10u6.3X50805
C10u6.3X50805
C527
C527
C516
C516
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
+VTT_CORE
+VTT_CORE +VTT_CORE
R161
R161
75R1%0402
75R1%0402
VR_SVID_ALERT# 41
+VTT_CORE +VTT_CORE
R167
R167
130R1%0402
130R1%0402
C520
C520
C473
C473
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C499
C499
C513
C513
C22u6.3X0805
C22u6.3X0805
C22u6.3X0805
C22u6.3X0805
1 2
JNC16 X_0402JNC16 X_0402
JNC17 X_0402JNC17 X_0402
1 2
+VTT_CORE
C177
C177
C171
C171
C180
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C22u6.3X50805
C22u6.3X50805
R158
R158
54.9R1%0402
54.9R1%0402
VR_SVID_CLK 41
R156
R156
130R1%0402
130R1%0402
Close to CPU Close to IMVP7
+VCC_CORE
R411
R411
100R1%0402
100R1%0402
VCCSENSE 41
VSSSENSE 41
VTT_SENSE 39
R410
R410
100R1%0402
100R1%0402
+VTT_CORE
C526
C526
C10u6.3X50805
C10u6.3X50805
C511
C511
VR_SVID_DATA 41
C22u6.3X0805
C22u6.3X0805
C515
C515
C22u6.3X0805
C22u6.3X0805
VTT_SENSE
+VCC_CORE
C191
C528
C528
C181
C181
C137
C137
C519
C519
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C503
C503
C523
C523
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
+VTT_CORE
R452
R452
X_100R1%0402
X_100R1%0402
Place a 100 ohm catch resistor on VCCIO_SENSE to VCCIO.
PPDG note to include 100ohm catch resistors on all sense lines
C191
C193
C193
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
+VCC_CORE
C505
C505
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C22u6.3X50805
C22u6.3X50805
C133
C133
C192
C192
C158
C158
C136
C22u6.3X50805
C22u6.3X50805
C530
C530
C136
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C149
C149
C172
C172
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C135
C135
C22u6.3X50805
C22u6.3X50805
C134
C134
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C194
C194
C482
C187
C187
C22u6.3X50805
C22u6.3X50805
C162
C162
C10u6.3X50805
C10u6.3X50805
C482
C481
C188
C188
C22u6.3X50805
C22u6.3X50805
C481
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
Title
Title
Title
PROCESSOR POWER
PROCESSOR POWER
PROCESSOR POWER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet
E
557Thursday, July 01, 2010
557Thursday, July 01, 2010
557Thursday, July 01, 2010
0C
0C
0C
of
A
B
C
D
E
SANDYBRIDGE PROCESSOR (GRAPHICS POWER)
1 1
POWER
U50G
U50G
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
2 2
3 3
+1_8VRUN
12
+
+
C125
C125
4 4
C100u6.3pSO
C100u6.3pSO
A
C124
C124
C22u6.3X50805-RH
C22u6.3X50805-RH
B
C122
C122
C1u16X0603
C1u16X0603
C123
C123
C1u16X0603
C1u16X0603
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
B6
A6
A2
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VCCPLL1
VCCPLL2
VCCPLL3
POWER
GRAPHICS
GRAPHICS
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
1.8V RAIL
1.8V RAIL
C
SENSE
SENSE
VREFMISC
VREFMISC
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VAXG_SENSE
VSSAXG_SENSE
LINES
LINES
SM_VREF
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA_SENSE
FC_C22
VCCSA_VID1
AK35
AK34
AL1
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
SM_VREF
C534
C534
+1_5VRUN
C0.1u10X0402
C0.1u10X0402
R409
R409
100R0402
100R0402
SM_VERF should have 20mil trace width & 20mil spacing
R407
R407
100R0402
100R0402
+1_5VRUN
+
+
C170
C170
C157
C157
12
C190
C190
C330u2.5KO
C330u2.5KO
C10u6.3X50805
C10u6.3X50805
+0.85VRUN
C10u6.3X50805
C10u6.3X50805
of
of
of
657Thursday, July 01, 2010
657Thursday, July 01, 2010
657Thursday, July 01, 2010
E
C189
C189
C152
C183
C183
C0.1u10X0402
C0.1u10X0402
+0.85VRUN
R451
R451
X_100R1%0402
X_100R1%0402
R394 10KR0402R394 10KR0402
R151 10-K pull-down resistor should be placed on the VCCSA VID lines.
This will ensure the VID is 00 prior to VCCIO stability.
R151
R151
10KR0402
10KR0402
D
C152
C185
C185
C0.1u10X0402
C0.1u10X0402
C160
C160
X_C0.1u10X0402
X_C0.1u10X0402
Place a 100 ohm catch resistor on VCCSA_SENSE
to VCCSA rail when CPU is not present.
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C142
C142
C150
C150
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
VCCUSA_SENSE 40
VCCSA_SEL 40
Title
Title
Title
Graphics Power
Graphics Power
Graphics Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
Date: Sheet
0C
0C
0C
A
B
C
D
E
SANDYBRIDGE PROCESSOR (GND)
U50I
U50I
U50H
U50H
AT35
VSS1
AT32
4 4
3 3
2 2
1 1
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
AT13
VSS9
AT10
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
A
VSS
VSS
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
B
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
C
VSS
VSS
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
Title
Title
Title
PROCESSOR GND
PROCESSOR GND
PROCESSOR GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
Date: Sheet
D
E
0C
0C
0C
757Tuesday, June 29, 2010
757Tuesday, June 29, 2010
757Tuesday, June 29, 2010
of
of
of
A
B
C
D
E
SANDYBRIDGE PROCESSOR (RESERVED)
1 1
U50E
U50E
L7
RSVD28
AG7
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
VCC_DIE_SENSE
RSVD54
RSVD55
RSVD56
RSVD57
RSVD58
KEY
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AH27
AN35
AM35
AT2
AT1
AR1
B1
TPJNC17JNC
TPJNC44JNC
TPJNC17TPJNC17
TPJNC44TPJNC44
CFG3 - PCI-Express Static Lane Reversal
CFG2
CFG4 - Display Port Presence
CFG4
PCI-Express Configuration Select
CFG[5:6] 11:Default X16-device 1 functions 1 and 2 disabled
PEG DEFER TRAINING
CFG7
1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
10: X8 X8-device 1 functions 1 enable, function2 disabled
01:Reserved--(device 1 functions 1disabled function2 enable
00: X8 X4 X4-device 1 functions 1 and 2 enable
1 :(Default)PEG train immediately following xxRESETB de assertion
0 :PEG wait for BIOS for training
CFG03
R174 X_1KR0402R174 X_1KR0402
R163 X_1KR0402R163 X_1KR0402
R168 X_1KR0402R168 X_1KR0402
R175 X_1KR0402R175 X_1KR0402
R173 X_1KR0402R173 X_1KR0402
2 2
3 3
H_SNB_IVB#_PWRCTRL39
On CRB: Low-- VTT 1.0V ; High--- VTT 1.05V
4 4
CFG2
CFG4
CFG5
CFG6
CFG7
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
B4
RSVD6
D1
RSVD7
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
A19
VCCIO_SEL
J15
RSVD27
RESERVED
RESERVED
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
Title
Title
Title
PROCESSOR RESERVED
PROCESSOR RESERVED
PROCESSOR RESERVED
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
A
B
C
Date: Sheet
D
of
857Wednesday, June 30, 2010
of
857Wednesday, June 30, 2010
of
857Wednesday, June 30, 2010
E
0C
0C
0C
A
M_A_A[15:0]4,10
4 4
3 3
2 2
SODIMM #A0
JNC10 X_0402JNC10 X_0402
1 2
JNC13 X_0402JNC13 X_0402
1 2
M_A_BS04,10
M_A_BS14,10
M_A_BS24,10
M_A_CS#04
M_A_CS#14
M_A_CLK_DDR04
M_A_CLK_DDR#04
M_A_CLK_DDR14
M_A_CLK_DDR#14
M_A_CKE04
M_A_CKE14
M_A_CAS#4,10
M_A_RAS#4,10
M_A_WE#4,10
SMB_CLK_DIMM3,10,11,12,18,27
SMB_DATA_DIMM3,10,11,12,18,27
M_A_ODT04
M_A_ODT14
M_A_DQS[7:0]4,10
M_A_DQS#[7:0]4,10
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
SA0_DIM0_0
SA1_DIM0_0
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
B
SOCKET1A
SOCKET1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
C
M_A_DQ[63:0] 4,10
+1_5VDIMM
R121
R121
1KR1%0402
1KR1%0402
M_VREF_DQ_DIMMA_0
R122
R122
1KR1%0402
1KR1%0402
+1_5VDIMM
R143
R143
1KR1%0402
1KR1%0402
R145
R145
1KR1%0402
1KR1%0402
+3VRUN
C205
C205
C0.1u10X0402
C0.1u10X0402
TPJNC19TPJNC19
DDR3_DRAMRST#3,10,11,12
TPJNC19JNC
C116
C116
C0.1u10X0402
C0.1u10X0402
M_VREF_CA_DIMMA_0
C174
C174
C0.1u10X0402
C0.1u10X0402
D
C202
C202
C2.2u6.3X0603
C2.2u6.3X0603
M_VREF_DQ_DIMMA_0
C114
C114
C2.2u6.3X0603
C2.2u6.3X0603
C182
C182
C2.2u6.3X0603
C2.2u6.3X0603
VERF should have 20mil trace width & 20mil spacing
+1_5VDIMM
C139
C151
C151
C1u10X50402
C1u10X50402
C139
C1u10X50402
C1u10X50402
C131
C131
C1u10X50402
C1u10X50402
C159
C159
C1u10X50402
C1u10X50402
+1_5VDIMM
SOCKET1B
SOCKET1B
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
DDR3SODIMM-204PS_BLACK-RH
DDR3SODIMM-204PS_BLACK-RH
SODIMM_S204_H5_2_1
SODIMM_S204_H5_2_1
N13-2040120-F02
N13-2040120-F02
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MEC1
MEC2
VTT
VTT
E
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
MEC1
MEC2
203
204
205
205
206
206
+0_75VRUN
C225
C225
C1u16X0603
C1u16X0603
C224
C224
C1u16X0603
C1u16X0603
DDR3SODIMM-204PS_BLACK-RH
DDR3SODIMM-204PS_BLACK-RH
SODIMM_S204_H5_2_1
SODIMM_S204_H5_2_1
N13-2040120-F02
N13-2040120-F02
1 1
A
B
+1_5VDIMM
C165
C128
C128
C10u6.3X5-RH
C10u6.3X5-RH
C
C165
C10u6.3X5-RH
C10u6.3X5-RH
C169
C169
C10u6.3X5-RH
C10u6.3X5-RH
Title
Title
Title
DDR3 SODIMM A0
DDR3 SODIMM A0
DDR3 SODIMM A0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
D
Date: Sheet
E
of
of
of
957Wednesday, June 30, 2010
957Wednesday, June 30, 2010
957Wednesday, June 30, 2010
0C
0C
0C
A
M_A_A[15:0]4,9
1 1
2 2
3 3
SODIMM #A1
+3VRUN
R413
R413
10KR0402
10KR0402
JNC32 X_0402JNC32 X_0402
1 2
M_A_BS04,9
M_A_BS14,9
M_A_BS24,9
M_A_CS#24
M_A_CS#34
M_A_CLK_DDR24
M_A_CLK_DDR#24
M_A_CLK_DDR34
M_A_CLK_DDR#34
M_A_CKE24
M_A_CKE34
M_A_CAS#4,9
M_A_RAS#4,9
M_A_WE#4,9
SMB_CLK_DIMM3,9,11,12,18,27
SMB_DATA_DIMM3,9,11,12,18,27
M_A_ODT24
M_A_ODT34
M_A_DQS[7:0]4,9
M_A_DQS#[7:0]4,9
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
SA0_DIM0_1
SA1_DIM0_1
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
B
SOCKET4A
SOCKET4A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
C
M_A_DQ[63:0] 4,9
+1_5VDIMM
R387
R387
1KR1%0402
1KR1%0402
M_VREF_DQ_DIMMA_1
R386
R386
1KR1%0402
1KR1%0402
+1_5VDIMM
R404
R404
1KR1%0402
1KR1%0402
R405
R405
1KR1%0402
1KR1%0402
DDR3_DRAMRST#3,9,11,12
M_VREF_CA_DIMMA_1
TPJNC45TPJNC45
+3VRUN
C540
C540
C0.1u10X0402
C0.1u10X0402
TPJNC45JNC
C469
C469
C0.1u10X0402
C0.1u10X0402
C517
C517
C0.1u10X0402
C0.1u10X0402
D
+1_5VDIMM
C535
C535
C2.2u6.3X0603
C2.2u6.3X0603
M_VREF_DQ_DIMMA_1
C470
C470
C2.2u6.3X0603
C2.2u6.3X0603
C518
C518
C2.2u6.3X0603
C2.2u6.3X0603
VERF should have 20mil trace width & 20mil spacing
+1_5VDIMM
C514
C514
C1u10X50402
C1u10X50402
C493
C493
C1u10X50402
C1u10X50402
C483
C483
C1u10X50402
C1u10X50402
C498
C498
C1u10X50402
C1u10X50402
SOCKET4B
SOCKET4B
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
DDR3SODIMM-204PS_BLACK-RH
DDR3SODIMM-204PS_BLACK-RH
SODIMM_S204
SODIMM_S204
N13-2040060-L41
N13-2040060-L41
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MEC1
MEC2
VTT
VTT
E
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
MEC1
MEC2
203
204
205
205
206
206
+0_75VRUN
C538
C538
C1u16X0603
C1u16X0603
C541
C541
C1u16X0603
C1u16X0603
DDR3SODIMM-204PS_BLACK-RH
DDR3SODIMM-204PS_BLACK-RH
SODIMM_S204
SODIMM_S204
N13-2040060-L41
N13-2040060-L41
4 4
A
B
+1_5VDIMM
C508
C508
C10u6.3X50805
C10u6.3X50805
C
C501
C501
C10u6.3X50805
C10u6.3X50805
C492
C492
C10u6.3X50805
C10u6.3X50805
Title
Title
Title
DDR3 SODIMM A1
DDR3 SODIMM A1
DDR3 SODIMM A1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
D
Date: Sheet
E
of
of
of
10 57Wednesday, June 30, 2010
10 57Wednesday, June 30, 2010
10 57Wednesday, June 30, 2010
0C
0C
0C
A
M_B_A[15:0]4,12
1 1
2 2
3 3
SODIMM #B0
M_B_BS04,12
M_B_BS14,12
M_B_BS24,12
M_B_CS#04
M_B_CS#14
M_B_CLK_DDR04
+3VRUN
R186
R186
10KR0402
10KR0402
M_B_CLK_DDR#04
M_B_CLK_DDR14
M_B_CLK_DDR#14
M_B_CKE04
M_B_CKE14
M_B_CAS#4,12
M_B_RAS#4,12
M_B_WE#4,12
JNC12 X_0402JNC12 X_0402
1 2
SMB_CLK_DIMM3,9,10,12,18,27
SMB_DATA_DIMM3,9,10,12,18,27
M_B_ODT04
M_B_ODT14
M_B_DQS[7:0]4,12
M_B_DQS#[7:0]4,12
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
SA0_DIM1_0
SA1_DIM1_0
B
SOCKET2A
SOCKET2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
C
M_B_DQ[63:0] 4,12
+1_5VDIMM
R120
R120
1KR1%0402
1KR1%0402
M_VREF_DQ_DIMMB_0
R118
R118
1KR1%0402
1KR1%0402
+1_5VDIMM
R144
R144
1KR1%0402
1KR1%0402
R142
R142
1KR1%0402
1KR1%0402
DDR3_DRAMRST#3,9,10,12
M_VREF_CA_DIMMB_0
TPJNC18TPJNC18
+3VRUN
C206
C206
C0.1u10X0402
C0.1u10X0402
C112
C112
C0.1u10X0402
C0.1u10X0402
C175
C175
C0.1u10X0402
C0.1u10X0402
D
TPJNC18JNC
M_VREF_DQ_DIMMB_0
C110
C110
C2.2u6.3X0603
C2.2u6.3X0603
C178
C178
C2.2u6.3X0603
C2.2u6.3X0603
+1_5VDIMM
C211
C211
C2.2u6.3X0603
C2.2u6.3X0603
VERF should have 20mil trace width & 20mil spacing
+1_5VDIMM
C143
C143
C1u10X50402
C1u10X50402
C154
C154
C1u10X50402
C1u10X50402
C164
C164
C1u10X50402
C1u10X50402
C146
C146
C1u10X50402
C1u10X50402
SOCKET2B
SOCKET2B
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
DDR3SODIMM-204PS_BLACK-RH
DDR3SODIMM-204PS_BLACK-RH
SODIMM_S204
SODIMM_S204
N13-2040060-L41
N13-2040060-L41
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MEC1
MEC2
VTT
VTT
E
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
MEC1
MEC2
203
204
205
205
206
206
+0_75VRUN
C208
C208
C1u16X0603
C1u16X0603
C204
C204
C1u16X0603
C1u16X0603
DDR3SODIMM-204PS_BLACK-RH
DDR3SODIMM-204PS_BLACK-RH
SODIMM_S204
SODIMM_S204
N13-2040060-L41
N13-2040060-L41
4 4
A
B
+1_5VDIMM
C476
C476
C10u6.3X50805
C10u6.3X50805
C
C475
C475
C10u6.3X50805
C10u6.3X50805
C474
C474
C10u6.3X50805
C10u6.3X50805
Title
Title
Title
DDR3 SODIMM B0
DDR3 SODIMM B0
DDR3 SODIMM B0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
D
Date: Sheet
E
of
of
of
11 57Wednesday, June 30, 2010
11 57Wednesday, June 30, 2010
11 57Wednesday, June 30, 2010
0C
0C
0C
A
M_B_A[15:0]4,11
1 1
2 2
3 3
SODIMM #B1
+3VRUN
R415
10KR0402
10KR0402
+3VRUN
R412
R412
10KR0402
10KR0402
M_B_BS04,11
M_B_BS14,11
M_B_BS24,11
M_B_CS#24
M_B_CS#34
M_B_CLK_DDR24
M_B_CLK_DDR#24
M_B_CLK_DDR34
M_B_CLK_DDR#34
M_B_CKE24
M_B_CKE34
M_B_CAS#4,11
M_B_RAS#4,11
M_B_WE#4,11
SMB_CLK_DIMM3,9,10,11,18,27
SMB_DATA_DIMM3,9,10,11,18,27
M_B_ODT24
M_B_ODT34
M_B_DQS[7:0]4,11
M_B_DQS#[7:0]4,11
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
SA0_DIM1_1
SA1_DMI1_1
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
107
119
109
108
114
121
101
103
102
104
115
110
113
197
201
202
200
116
120
136
153
170
187
137
154
171
188
135
152
169
186
98
97
96
95
92
91
90
86
89
85
84
83
80
78
79
73
74
11
28
46
63
12
29
47
64
10
27
45
62
B
SOCKET3A
SOCKET3A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3SODIMM-204PS_BLACK-RH-5
DDR3SODIMM-204PS_BLACK-RH-5
SODIMM_S204_1
SODIMM_S204_1
N13-2040080-L41
N13-2040080-L41
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
C
M_B_DQ[63:0] 4,11
+1_5VDIMM
R385
R385
1KR1%0402
1KR1%0402
M_VREF_DQ_DIMMB_1
R384
R384
1KR1%0402
1KR1%0402
+1_5VDIMM
R403
R403
1KR1%0402
1KR1%0402
M_VREF_CA_DIMMB_1
R406
R406
1KR1%0402
1KR1%0402
TPJNC46TPJNC46R415
DDR3_DRAMRST#3,9,10,11
TPJNC46JNC
C468
C468
C0.1u10X0402
C0.1u10X0402
C522
C522
C2.2u6.3X0603
C2.2u6.3X0603
+1_5VDIMM
+3VRUN
C537
C537
C0.1u10X0402
C0.1u10X0402
M_VREF_DQ_DIMMB_1
C467
C467
C2.2u6.3X0603
C2.2u6.3X0603
C525
C525
C2.2u6.3X0603
C2.2u6.3X0603
VERF should have 20mil trace width & 20mil spacing
+1_5VDIMM
C168
C156
C156
C1u10X50402
C1u10X50402
C480
C480
C1u10X50402-HF
C1u10X50402-HF
C168
C1u10X50402
C1u10X50402
D
C488
C488
C1u10X50402
C1u10X50402
SOCKET3B
SOCKET3B
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
DDR3SODIMM-204PS_BLACK-RH-5
DDR3SODIMM-204PS_BLACK-RH-5
SODIMM_S204_1
SODIMM_S204_1
N13-2040080-L41
N13-2040080-L41
+
+
12
C155
C155
C330u2.5KO
C330u2.5KO
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MEC1
MEC2
VTT
VTT
205
206
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
MEC1
MEC2
203
204
205
206
E
+0_75VRUN
C545
C545
C1u16X0603
C1u16X0603
C542
C542
C1u16X0603
C1u16X0603
+1_5VDIMM
C144
C510
C479
C479
C10u6.3X50805
C10u6.3X50805
4 4
A
B
C
C510
C10u6.3X0603
C10u6.3X0603
C144
C10u6.3X50805
C10u6.3X50805
Title
Title
Title
DDR3 SODIMM B1
DDR3 SODIMM B1
DDR3 SODIMM B1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
D
Date: Sheet
E
of
of
of
12 57Wednesday, June 30, 2010
12 57Wednesday, June 30, 2010
12 57Wednesday, June 30, 2010
0C
0C
0C
A
B
C
D
E
EDP
+3VRUN
R189
42
TX0N_EDP14
TX0P_EDP14
TX1N_EDP14
TX1P_EDP14
1 1
+3V_LCD_PANEL
120Mil
L26 X_80L3A-100_0805L26 X_80L3A-100_0805
L25 X_80L3A-100_0805L25 X_80L3A-100_0805
PWR_SRC
TX2N_EDP14
TX2P_EDP14
TX3N_EDP14
TX3P_EDP14
+3V_LCD_PANEL_EDP
C424
C424
X_C10u10Y0805
X_C10u10Y0805
C233
C233
X_C0.01u25X0402
X_C0.01u25X0402
120Mil
C262
C262
X_C0.1u16Y0402
X_C0.1u16Y0402
PWR_INVERTER_EDP
C231
C231
X_C10u25X51206
X_C10u25X51206
1
2
3
4
5
6
7
8
9
10
11
12
13
1
21
42
2
22
3
23
4
24
5
25
6
26
7
27
8
28
9
29
10
30
11
31
12
32
13
33
141434
151535
161636
171737
181838
191939
202040
41
41
JLVDS2
JLVDS2
X_BH2X20S-1PITCH
X_BH2X20S-1PITCH
N32-2200210-A81
N32-2200210-A81
LVDS_40P_1MM
LVDS_40P_1MM
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
BR-ADJ-EDP
BL-ON 15
SMB_CPU_DATA 14,18,28,41
SMB_CPU_CLK 14,18,28,41
20Mil
C380
C380
EDP_CLK_MXM 14
EDP_DATA_MXM 14
+3V_CAMERA
C222
C222
CPT Comments:EDP_D_HDP NC
40Mil
4
1
3
2
LI21
LI21
X_CMC-L12-9008084-RH
X_CMC-L12-9008084-RH
R442X_0R0402 R442X_0R0402
C383
C383
C0.1u16Y0402
C0.1u16Y0402
USB_EDPN 21
USB_EDPP 21
R188 33R0402R188 33R0402
R226 X_33R0402R226 X_33R0402
RESERVED
CI32
CI32
X_C10p25N0402
X_C10p25N0402
WebCAM
BR-PWM 15,28
BL_PWM_EDP 14
+3VRUN
L6 X_80L3AL6 X_80L3A
0C
X_C10p25N0402
X_C10p25N0402
X_C10p25N0402
X_C10p25N0402
TX2N_EDP TX0N_EDP
2 2
TX2P_EDP
TX1N_EDP TX3N_EDP
TX1P_EDP TX3P_EDP
4
1
3
2
LI18
LI18
X_CMC-L12-9008084-RH
X_CMC-L12-9008084-RH
4
1
3
2
LI23
LI23
X_CMC-L12-9008084-RH
X_CMC-L12-9008084-RH
RI12
RI12
X_100R0402
X_100R0402
TX0P_EDP
RI9
RI9
X_100R0402
X_100R0402
4
1
3
2
LI24
LI24
X_CMC-L12-9008084-RH
X_CMC-L12-9008084-RH
4
1
3
2
LI20
LI20
X_CMC-L12-9008084-RH
X_CMC-L12-9008084-RH
RI11
RI11
X_100R0402
X_100R0402
RI13
RI13
X_100R0402
X_100R0402
R189
1KR0402
1KR0402
R17
R17
X_100KR0402
X_100KR0402
EDP_D_HPD 14
3 3
4 4
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
EDP
EDP
EDP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-16F21
MS-16F21
MS-16F21
E
0C
0C
0C
of
of
of
13 57Tuesday, June 29, 2010
13 57Tuesday, June 29, 2010
13 57Tuesday, June 29, 2010
A
+3VRUN
+5VRUN
C265
C265
C0.1u10X0402
C0.1u10X0402
2.5A
C266
C266
C10u10Y0805
C10u10Y0805
1A
C466
C221
C221
+3VSUS+3VRUN
1
2 5
C466
TPJNC22TPJNC22
TPJNC3TPJNC3
TPJNC7TPJNC7
TPJNC24TPJNC24
C0.1u10X0402
C0.1u10X0402
TPJNC20TPJNC20
R232 X_0R0402R232 X_0R0402
TPJNC38TPJNC38
6
100KR0402
100KR0402
R222
R222
1 2
PWR_SRC
MXM內WAKE#空接
MXM_PWR_EN_R
PRSNT MXM Pull Low
NC7WZ17P6X
NC7WZ17P6X
JNC19 X_0402JNC19 X_0402
MXM_GPIO0JNC
MXM_GPIO1JNC
MXM_GPIO2JNC
TP146JNC
TP147JNC
MXM_WAKE#
MXM_PRSNT_R#JNC
AC/BATT#
PWR_Level internal pull high
C464
C464
1 1
R259 4.7KR0402R259 4.7KR0402
2 2
C10u6.3X50805
C10u6.3X50805
C186
C186
C1u10X0603
C1u10X0603
X_4.7u6.3X5_0603
X_4.7u6.3X5_0603
PCIE_WAKE#19,26,29,31
U55A
U55A
MXM_ACOK35
10A
C243
C243
C256
C256
C0.1u25X0603
C0.1u25X0603
C10u25X51206
C10u25X51206
PEG_RXN[15:0]
PEG_RXP[15:0]
PEG_TXP[15:0]
PEG_TXN[15:0]
3 3
The change in AC capacitor value from 0.1uf to 0.22uf is to enable compatibility with futrue platforms having PCIE GEN3(8GT/s)
n'VIDIA Comments: NV11 can't support PCIE GEN3,so used 0.1uf CAP
4 4
CLK_PEGA_MXM_N18
CLK_PEGA_MXM_P18
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
PEG_RXN[15:0] 3
PEG_RXP[15:0] 3
PEG_TXP[15:0] 3
PEG_TXN[15:0] 3
C371 C0.1u10X0402C371 C0.1u10X0402
C364 C0.1u10X0402C364 C0.1u10X0402
C354 C0.1u10X0402C354 C0.1u10X0402
C341 C0.1u10X0402C341 C0.1u10X0402
C338 C0.1u10X0402C338 C0.1u10X0402
C329 C0.1u10X0402C329 C0.1u10X0402
C324 C0.1u10X0402C324 C0.1u10X0402
C318 C0.1u10X0402C318 C0.1u10X0402
C310 C0.1u10X0402C310 C0.1u10X0402
C302 C0.1u10X0402C302 C0.1u10X0402
C301 C0.1u10X0402C301 C0.1u10X0402
C299 C0.1u10X0402C299 C0.1u10X0402
C286 C0.1u10X0402C286 C0.1u10X0402
C283 C0.1u10X0402C283 C0.1u10X0402
C279 C0.1u10X0402C279 C0.1u10X0402
C280 C0.1u10X0402C280 C0.1u10X0402
C374 C0.1u10X0402C374 C0.1u10X0402
C368 C0.1u10X0402C368 C0.1u10X0402
C360 C0.1u10X0402C360 C0.1u10X0402
C349 C0.1u10X0402C349 C0.1u10X0402
C342 C0.1u10X0402C342 C0.1u10X0402
C335 C0.1u10X0402C335 C0.1u10X0402
C330 C0.1u10X0402C330 C0.1u10X0402
C316 C0.1u10X0402C316 C0.1u10X0402
C306 C0.1u10X0402C306 C0.1u10X0402
C305 C0.1u10X0402C305 C0.1u10X0402
C303 C0.1u10X0402C303 C0.1u10X0402
C290 C0.1u10X0402C290 C0.1u10X0402
C284 C0.1u10X0402C284 C0.1u10X0402
C281 C0.1u10X0402C281 C0.1u10X0402
C282 C0.1u10X0402C282 C0.1u10X0402
JNC24 X_0402JNC24 X_0402
1 2
JNC25 X_0402JNC25 X_0402
1 2
TPJNC9TPJNC9
A
PEG_RXN0_CJNC
PEG_RXN1_CJNC
PEG_RXN2_CJNC
PEG_RXN3_CJNC
PEG_RXN4_CJNC
PEG_RXN5_CJNC
PEG_RXN6_CJNC
PEG_RXN7_CJNC
PEG_RXN8_CJNC
PEG_RXN9_CJNC
PEG_RXN10_CJNC
PEG_RXN11_CJNC
PEG_RXN12_CJNC
PEG_RXN13_CJNC
PEG_RXN14_CJNC
PEG_RXN15_CJNC
PEG_RXP0_CJNC
PEG_RXP1_CJNC
PEG_RXP2_CJNC
PEG_RXP3_CJNC
PEG_RXP4_CJNC
PEG_RXP5_CJNC
PEG_RXP6_CJNC
PEG_RXP7_CJNC
PEG_RXP8_CJNC
PEG_RXP9_CJNC
PEG_RXP10_CJNC
PEG_RXP11_CJNC
PEG_RXP12_CJNC
PEG_RXP13_CJNC
PEG_RXP14_CJNC
PEG_RXP15_CJNC
PEX_REFCLK#JNC
PEX_REFCLKJNC
TPJNC9JNC
CONP1A
CONP1A
1
5V_1
3
5V_2
5
5V_3
7
5V_4
9
5V_5
278
3V3_1
280
3V3_2
26
GPIO0
28
GPIO1
30
GPIO2
29
HDMI_CEC
21
VGA_DISABLE#
4
WAKE#
2
PRSNT_R#
281
PRSNT_L#
8
PWR_EN
18
PWR_LEVEL
11
GND1
13
GND2
15
GND3
17
GND4
36
GND5
37
GND6
46
GND7
47
GND8
52
GND9
53
GND10
58
GND11
59
GND12
64
GND13
65
GND14
70
GND15
71
GND16
76
GND17
77
GND18
82
GND19
83
GND20
88
GND21
89
GND22
284
GND76
E10
PWR_SRC_E10
E11
PWR_SRC_E11
E12
PWR_SRC_E12
E13
PWR_SRC_E13
E14
PWR_SRC_E14
E15
PWR_SRC_E15
E16
PWR_SRC_E16
E17
PWR_SRC_E17
E18
PWR_SRC_E18
E19
PWR_SRC_E19
E20
PWR_SRC_E20
E21
PWR_SRC_E21
E22
PWR_SRC_E22
E23
PWR_SRC_E23
E24
PWR_SRC_E24
E25
PWR_SRC_E25
E26
PWR_SRC_E26
E27
PWR_SRC_E27
E28
PWR_SRC_E28
E29
PWR_SRC_E29
SLOT-MXM314P-0.5PITCH-RH-3
SLOT-MXM314P-0.5PITCH-RH-3
N11-3140030-A81
N11-3140030-A81
CONP1B
CONP1B
147
PEX_RX0#
141
PEX_RX1#
135
PEX_RX2#
121
PEX_RX3#
115
PEX_RX4#
109
PEX_RX5#
103
PEX_RX6#
97
PEX_RX7#
91
PEX_RX8#
85
PEX_RX9#
79
PEX_RX10#
73
PEX_RX11#
67
PEX_RX12#
61
PEX_RX13#
55
PEX_RX14#
49
PEX_RX15#
149
PEX_RX0
143
PEX_RX1
137
PEX_RX2
123
PEX_RX3
117
PEX_RX4
111
PEX_RX5
105
PEX_RX6
99
PEX_RX7
93
PEX_RX8
87
PEX_RX9
81
PEX_RX10
75
PEX_RX11
69
PEX_RX12
63
PEX_RX13
57
PEX_RX14
51
PEX_RX15
153
PEX_REFCLK#
155
PEX_REFCLK
45
OEM8
44
OEM7
43
OEM6
42
OEM5
SLOT-MXM314P-0.5PITCH-RH-3
SLOT-MXM314P-0.5PITCH-RH-3
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND_E30
GND_E31
GND_E32
GND_E33
GND_E34
GND_E35
GND_E36
GND_E37
GND_E38
GND_E39
GND_E40
GND_E41
GND_E42
GND_E43
GND_E44
GND_E45
GND_E46
GND_E47
GND_E48
GND_E49
PEX_TX0#
PEX_TX1#
PEX_TX2#
PEX_TX3#
PEX_TX4#
PEX_TX5#
PEX_TX6#
PEX_TX7#
PEX_TX8#
PEX_TX9#
PEX_TX10#
PEX_TX11#
PEX_TX12#
PEX_TX13#
PEX_TX14#
PEX_TX15#
PEX_TX0
PEX_TX1
PEX_TX2
PEX_TX3
PEX_TX4
PEX_TX5
PEX_TX6
PEX_TX7
PEX_TX8
PEX_TX9
PEX_TX10
PEX_TX11
PEX_TX12
PEX_TX13
PEX_TX14
PEX_TX15
PEX_CLK_REQ#
PEX_RST#
PEX_STD_SW#
OEM1
OEM2
OEM3
OEM4
B
R336
94
95
100
101
106
107
112
113
118
119
124
125
133
134
139
140
145
146
151
152
157
166
173
174
179
180
185
186
191
192
197
198
203
204
209
210
215
216
221
222
228
244
250
251
256
257
262
263
268
269
275
282
283
E30
E31
E32
E33
E34
E35
E36
E37
E38
E39
E40
E41
E42
E43
E44
E45
E46
E47
E48
E49
PEG_C_TXN0JNC
148
PEG_C_TXN1JNC
142
PEG_C_TXN2JNC
136
PEG_C_TXN3JNC
120
PEG_C_TXN4JNC
114
PEG_C_TXN5JNC
108
PEG_C_TXN6JNC
102
PEG_C_TXN7JNC
96
PEG_C_TXN8JNC
90
PEG_C_TXN9JNC
84
PEG_C_TXN10JNC
78
PEG_C_TXN11JNC
72
PEG_C_TXN12JNC
66
PEG_C_TXN13JNC
60
PEG_C_TXN14JNC
54
PEG_C_TXN15JNC
48
PEG_C_TXP0JNC
150
PEG_C_TXP1JNC
144
PEG_C_TXP2JNC
138
PEG_C_TXP3JNC
122
PEG_C_TXP4JNC
116
PEG_C_TXP5JNC
110
PEG_C_TXP6JNC
104
PEG_C_TXP7JNC
98
PEG_C_TXP8JNC
92
PEG_C_TXP9JNC
86
PEG_C_TXP10JNC
80
PEG_C_TXP11JNC
74
PEG_C_TXP12JNC
68
PEG_C_TXP13JNC
62
PEG_C_TXP14JNC
56
PEG_C_TXP15JNC
50
154
156
PEX_STD_SW#JNC
19
n'VIDIA Comments: PEX_STD_SW# float
38
39
High Swing : connect GND
40
41
Low Swing : Float
B
R336
X_2.2KR0402
X_2.2KR0402
RGB_DATA_MXM15
RGB_CLK_MXM15
MXM DDC internal pull high
+3VRUN
D8
D8
X_S-RB551V-30_SOD323
X_S-RB551V-30_SOD323
R249 X_4.7KR0402R249 X_4.7KR0402
R253 X_4.7KR0402R253 X_4.7KR0402
C377 C0.1u10X0402C377 C0.1u10X0402
C367 C0.1u10X0402C367 C0.1u10X0402
C357 C0.1u10X0402C357 C0.1u10X0402
C348 C0.1u10X0402C348 C0.1u10X0402
C337 C0.1u10X0402C337 C0.1u10X0402
C331 C0.1u10X0402C331 C0.1u10X0402
C321 C0.1u10X0402C321 C0.1u10X0402
C315 C0.1u10X0402C315 C0.1u10X0402
C307 C0.1u10X0402C307 C0.1u10X0402
C300 C0.1u10X0402C300 C0.1u10X0402
C293 C0.1u10X0402C293 C0.1u10X0402
C288 C0.1u10X0402C288 C0.1u10X0402
C285 C0.1u10X0402C285 C0.1u10X0402
C45 C0.1u10X0402C45 C0.1u10X0402
C44 C0.1u10X0402C44 C0.1u10X0402
C33 C0.1u10X0402C33 C0.1u10X0402
C382 C0.1u10X0402C382 C0.1u10X0402
C372 C0.1u10X0402C372 C0.1u10X0402
C363 C0.1u10X0402C363 C0.1u10X0402
C352 C0.1u10X0402C352 C0.1u10X0402
C340 C0.1u10X0402C340 C0.1u10X0402
C336 C0.1u10X0402C336 C0.1u10X0402
C328 C0.1u10X0402C328 C0.1u10X0402
C320 C0.1u10X0402C320 C0.1u10X0402C322 C0.1u10X0402C322 C0.1u10X0402
C311 C0.1u10X0402C311 C0.1u10X0402
C304 C0.1u10X0402C304 C0.1u10X0402
C298 C0.1u10X0402C298 C0.1u10X0402
C291 C0.1u10X0402C291 C0.1u10X0402
C287 C0.1u10X0402C287 C0.1u10X0402
C46 C0.1u10X0402C46 C0.1u10X0402
C43 C0.1u10X0402C43 C0.1u10X0402
C37 C0.1u10X0402C37 C0.1u10X0402
R340 X_0R0402R340 X_0R0402
R348 X_0R0402R348 X_0R0402
+3VRUN +3VRUN
PEG_CLKREQ# 18
R343
R343
X_2.2KR0402
X_2.2KR0402
LVDS_DATA_MXM
LVDS_CLK_MXM
LVDS_VDDEN_MXM15
BLON_MXM15
BL_PWM_EDP13
LVDS_DATA_MXM15
LVDS_CLK_MXM15
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
MXM RGB internal pull low 150 Ohm
VGA_R_MXM15
VGA_G_MXM15
VGA_B_MXM15
VGA_HSYNC_MXM15
VGA_VSYNC_MXM15
LVDS_TXUCKN_MXM15
LVDS_TXUCKP_MXM15
LVDS_TXU2N_MXM15
LVDS_TXU2P_MXM15
LVDS_TXU1N_MXM15
LVDS_TXU1P_MXM15
LVDS_TXU0N_MXM15
B Port
LVDS_TXU0P_MXM15
LVDS_TXLCKN_MXM15
LVDS_TXLCKP_MXM15
LVDS_TXL2N_MXM15
LVDS_TXL2P_MXM15
LVDS_TXL1N_MXM15
A Port
LVDS_TXL1P_MXM15
LVDS_TXL0N_MXM15
LVDS_TXL0P_MXM15
R355 X_0R0402R355 X_0R0402
TPJNC25TPJNC25
PEG_RST# 21
C
TP145JNC
C
BL_PWM_MXM
CONP1C
CONP1C
168
VGA_RED
170
VGA_GREEN
172
VGA_BLUE
164
VGA_HSYNC
162
VGA_VSYNC
158
VGA_DDC_DAT
160
VGA_DDC_CLK
169
LVDS_UCLK#
171
LVDS_UCLK
175
LVDS_UTX3#
177
LVDS_UTX3
181
LVDS_UTX2#
183
LVDS_UTX2
187
LVDS_UTX1#
189
LVDS_UTX1
193
LVDS_UTX0#
195
LVDS_UTX0
176
LVDS_LCLK#
178
LVDS_LCLK
182
LVDS_LTX3#
184
LVDS_LTX3
188
LVDS_LTX2#
190
LVDS_LTX2
194
LVDS_LTX1#
196
LVDS_LTX1
200
LVDS_LTX0#
202
LVDS_LTX0
23
PNL_PWR_EN
25
PNL_BL_EN
27
PNL_BL_PWM
31
DVI_HPD
33
LVDS_DDC_DAT
35
LVDS_DDC_CLK
10
RSVD1
12
RSVD2
14
RSVD3
16
RSVD4
159
RSVD5
161
RSVD6
163
RSVD77
165
RSVD8
167
RSVD9
227
RSVD10
229
RSVD11
231
RSVD12
233
RSVD13
235
RSVD14
237
RSVD15
238
RSVD16
239
RSVD17
240
RSVD18
241
RSVD19
242
RSVD20
243
RSVD21
245
RSVD22
247
RSVD23
249
RSVD24
SLOT-MXM314P-0.5PITCH-RH-3
SLOT-MXM314P-0.5PITCH-RH-3
DP_A_L0#
DP_A_L0
DP_A_L1#
DP_A_L1
DP_A_L2#
DP_A_L2
DP_A_L3#
DP_A_L3
DP_A_HPD
DP_A_AUX#
DP_A_AUX
DP_B_L0#
DP_B_L0
DP_B_L1#
DP_B_L1
DP_B_L2#
DP_B_L2
DP_B_L3#
DP_B_L3
DP_B_HPD
DP_B_AUX#
DP_B_AUX
DP_C_L0#
DP_C_L0
DP_C_L1#
DP_C_L1
DP_C_L2#
DP_C_L2
DP_C_L3#
DP_C_L3
DP_C_HPD
DP_C_AUX#
DP_C_AUX
DP_D_L0#
DP_D_L0
DP_D_L1#
DP_D_L1
DP_D_L2#
DP_D_L2
DP_D_L3#
DP_D_L3
DP_D_HPD
DP_D_AUX#
DP_D_AUX
TH_OVERT#
TH_ALERT#
TH_PWM
PWR_GOOD
SMB_DAT
SMB_CLK
MEC1
MEC2
253
255
259
261
265
267
271
273
276
277
279
246
248
252
254
258
260
264
266
270
272
274
199
201
205
207
211
213
217
219
234
223
225
206
208
212
214
218
220
224
226
236
230
232
20
22
24
6
32
34
MEC1
MEC2
TP143JNC
TP48JNC
TP46JNC
D
TX2N_MXM_CJNC
TX2P_MXM_CJNC
TX1N_MXM_CJNC
TX1P_MXM_CJNC
TX0N_MXM_CJNC
TX0P_MXM_CJNC
CLKN_MXM_CJNC
CLKP_MXM_CJNC
+3VRUN
R382 4.7KR0402R382 4.7KR0402
R383 4.7KR0402R383 4.7KR0402
TX0N_EDP_CJNC
TX0P_EDP_CJNC
TX1N_EDP_CJNC
TX1P_EDP_CJNC
TX2N_EDP_CJNC
TX2P_EDP_CJNC
TX3N_EDP_CJNC
TX3P_EDP_CJNC
EDP_DATA_MXM_JNC
EDP_CLK_MXM_JNC
TPJNC1TPJNC1
TPJNC21TPJNC21
TPJNC2TPJNC2
DGPU_PWROK 28
SMB_CPU_DATA 13,18,28,41
SMB_CPU_CLK 13,18,28,41
D
C446 C0.1u10X0402C446 C0.1u10X0402
C449 C0.1u10X0402C449 C0.1u10X0402
C459 C0.1u10X0402C459 C0.1u10X0402
C460 C0.1u10X0402C460 C0.1u10X0402
C461 C0.1u10X0402C461 C0.1u10X0402
C462 C0.1u10X0402C462 C0.1u10X0402
C463 C0.1u10X0402C463 C0.1u10X0402
C465 C0.1u10X0402C465 C0.1u10X0402
DVI_DATA_MXM
DVI_CLK_MXM
C447 C0.1u10X0402C447 C0.1u10X0402
C450 C0.1u10X0402C450 C0.1u10X0402
C551 C0.1u10X0402C551 C0.1u10X0402
C560 C0.1u10X0402C560 C0.1u10X0402
C562 C0.1u10X0402C562 C0.1u10X0402
C554 C0.1u10X0402C554 C0.1u10X0402
C561 C0.1u10X0402C561 C0.1u10X0402
C563 C0.1u10X0402C563 C0.1u10X0402
R228
R228
X_100KR0402
X_100KR0402
MXM internal pull low
E
TX2N_MXM 16
TX2P_MXM 16
TX1N_MXM 16
TX1P_MXM 16
TX0N_MXM 16
TX0P_MXM 16
CLKN_MXM 16
CLKP_MXM 16
DVI_A_HPD 16
DVI_DATA_MXM 16
DVI_CLK_MXM 16
TX0N_EDP 13
TX0P_EDP 13
TX1N_EDP 13
TX1P_EDP 13
TX2N_EDP 13
TX2P_EDP 13
TX3N_EDP 13
TX3P_EDP 13
EDP_D_HPD 13
C564 C0.1u10X0402C564 C0.1u10X0402
C565 C0.1u10X0402C565 C0.1u10X0402
R229
R229
X_100KR0402
X_100KR0402
+3VRUN
R230
R230
100KR0402
100KR0402
R231
R231
100KR0402
100KR0402
EDP_DATA_MXM 13
EDP_CLK_MXM 13
R230 & R231 Close EDP CON
Title
Title
Title
MXM 3.0 Slot
MXM 3.0 Slot
MXM 3.0 Slot
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet of
Date: Sheet of
Date: Sheet
E
0C
0C
0C
of
14 57Wednesday, June 30, 2010
14 57Wednesday, June 30, 2010
14 57Wednesday, June 30, 2010
1
+5VRUN
CRT
1 1
RGB_DATA_MXM14
RGB_CLK_MXM14
+3VRUN
G
G
+3VRUN
Q2
Q2
N-BSS138_SOT23
N-BSS138_SOT23
DS
DS
Q3
Q3
N-BSS138_SOT23
N-BSS138_SOT23
12
F2
F2
F-SMD1206P050TF-15-RH
F-SMD1206P050TF-15-RH
D2
D2
S-RB551V-30_SOD323
S-RB551V-30_SOD323
R5
2.2KR0402R52.2KR0402
+5V_CRT
2
R6
2.2KR0402R62.2KR0402
3
C244
C244
C245
C245
X_C10p25N0402
X_C10p25N0402
L15 60L500mA-100-RHL15 60L500mA-100-RH
L16 60L500mA-100-RHL16 60L500mA-100-RH
L14 60L500mA-100-RHL14 60L500mA-100-RH
X_C10p25N0402
X_C10p25N0402
CI1
CI1
CI2
CI2
C238
C238
C10p25N0402
C10p25N0402
CI24
CI24
CI23
CI23
VGA_R_MXM14
VGA_G_MXM14
VGA_B_MXM14
246
8
RN11
RN11
8P4R-150R0402
8P4R-150R0402
135
7
0C
HSYNC
VSYNC VSYNC_R
C246
C246
X_C10p25N0402
X_C10p25N0402
RB15 33R0402RB15 33R0402
RB14 33R0402RB14 33R0402
C240
C240
C10p25N0402
C10p25N0402
DDC_DATA_R
DDC_CLK_R
HSYNC_R
C239
C239
R_DVI
B_DVI
+5V_CRT
30Mil
C10p25N0402
C10p25N0402
C2
C2
C0.1u16Y0402
C0.1u16Y0402
4
1617
1819
6
1
11
7
2
8
3
9
4
10
5
DDC_DATA_RG_DVI
12
HSYNC_R
13
VSYNC_R
14
DDC_CLK_R
15
VGA1
VGA1
VGAF_BLACK-RH
VGAF_BLACK-RH
N59-15F0451-H06
N59-15F0451-H06
SILM_DSUB_15PF_T
SILM_DSUB_15PF_T
5
VCC
+5VRUN
5
VSYNC
4
R1433R0402 R1433R0402
+3V_LCD_PANEL +3V_LCD_PANEL_LVDS
C14
C14
C0.1u16Y0402
C0.1u16Y0402
PWR_SRC
X_C10p25N0402
X_C10p25N0402
X_C10p25N0402
X_C10p25N0402
X_C10p25N0402
X_C10p25N0402
L3 80L3A-100_0805L3 80L3A-100_0805
C16 C10u10Y0805C16 C10u10Y0805
C17 X_C0.1u16Y0402C17 X_C0.1u16Y0402
L5 80L3A-100_0805L5 80L3A-100_0805
X_C10p25N0402
X_C10p25N0402
LVDS_TXU2N_MXM14
LVDS_TXU2P_MXM14
LVDS_TXU1N_MXM14
LVDS_TXU1P_MXM14
LVDS_TXU0N_MXM14
LVDS_TXU0P_MXM14
LVDS_TXLCKN_MXM14
LVDS_TXLCKP_MXM14
LVDS_CLK_MXM14
LVDS_DATA_MXM14
C25
C25
C0.01u25X0402
C0.01u25X0402
120Mil120Mil
PWR_INVERTER
C26
C26
C10u25X51206
C10u25X51206
42
1
2
3
4
5
6
7
8
9
10
11
12
13
JLVDS1
JLVDS1
BH2X20S-1PITCH_WHITE-RH
BH2X20S-1PITCH_WHITE-RH
N32-2200210-A81
N32-2200210-A81
LVDS_40P_1MM
LVDS_40P_1MM
1
42
2
3
4
5
6
7
8
9
10
11
12
13
141434
151535
161636
171737
181838
191939
202040
41
41
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
35
36
37
38
39
40
BL-ONBR-ADJ
20Mil
LVDS_TXUCKN_MXM 14
LVDS_TXUCKP_MXM 14
LVDS_TXL2N_MXM 14
LVDS_TXL2P_MXM 14
LVDS_TXL1N_MXM 14
LVDS_TXL1P_MXM 14
LVDS_TXL0N_MXM 14
LVDS_TXL0P_MXM 14
+3V_CAMERA
C36
C36
C35
C35
40Mil
4
1
3
2
LI11
LI11
X_CMC-L12-9008084-RH
X_CMC-L12-9008084-RH
LVDS
+3VRUN
L2 80L3A-100_0805L2 80L3A-100_0805
CI11
CI11
X_C10p25N0402
X_C10p25N0402
USB_PN12 21
USB_PP12 21
WebCAM
X_C10p25N0402
X_C10p25N0402
X_C10p25N0402
X_C10p25N0402
+3V_CAMERA
20Mil 20Mil
D S
U9
U9
+3VSUS
VCC
VCC
1
A
A
2
B
B
C10 C0.1u16Y0402C10 C0.1u16Y0402
53
4
Y
Y
U7
U7
GND
GND
NC7S08P5X_SC70-RH
NC7S08P5X_SC70-RH
R11 33R0402R11 33R0402
R10
R10
X_100KR0402
X_100KR0402
4
BL-ONBLON_AND
C11
C11
C0.01u25X0402
C0.01u25X0402
RI1
RI1
X_100R0402
X_100R0402
RI2
RI2
X_100R0402
X_100R0402
LID#28
BLON_MXM14
R18
R18
100KR0402
100KR0402
3
C19
C19
C10u10Y0805
C10u10Y0805
BL-ON 13
G
P-IRLML6402PBF_SOT23-3-RH
P-IRLML6402PBF_SOT23-3-RH
CAMERA_ON#JNC
C23
C23
C0.1u10X0402
C0.1u10X0402
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
+3VRUN
1 2
JNC1 X_0402JNC1 X_0402
CRT/LVDS/CCD
CRT/LVDS/CCD
CRT/LVDS/CCD
MS-16F21
MS-16F21
MS-16F21
CAMERA_ON# 28
0C
0C
0C
of
15 57Tuesday, June 29, 2010
15 57Tuesday, June 29, 2010
5
15 57Tuesday, June 29, 2010
C242 C0.1u16Y0402C242 C0.1u16Y0402
1
0C
G
OE
2
A
GND3Y
U31
U31
NC7SZ125_SOT23-5
NC7SZ125_SOT23-5
LVDS_VDDEN#
DS
2 2
+5VRUN
R431 X_100R1%0402R431 X_100R1%0402
R192
R192
X_180R1%0402
X_180R1%0402
3 3
LVDS_TXU2N_MXM LVDS_TXU0N_MXM
LVDS_TXU2P_MXM
4 4
LVDS_TXU1N_MXM
LVDS_TXU1P_MXM
VGA_HSYNC_MXM14
For 3D Panel
U32 X_APL1085U32 X_APL1085
3
Vin
Vout
1
ADJ
+3VRUN
LVDS_VDDEN_MXM14
120Mil
2
C546
C546
X_C10u10Y0805
X_C10u10Y0805
R432 0R0805R432 0R0805
R252
R252
100KR0402
100KR0402
RI7
RI7
X_100R0402
X_100R0402
LVDS_TXU0P_MXM
LVDS_TXLCKN_MXM
RI5
RI5
X_100R0402
X_100R0402
LVDS_TXLCKP_MXM
1
+5VRUN
5
VCC
HSYNC
4
R430
R430
X_0R0805
X_0R0805
120Mil 120Mil
R250
R250
1MR0402
1MR0402
R245 10KR0402R245 10KR0402
Q18
Q18
N-2N7002_SOT23-1
N-2N7002_SOT23-1
RDS(ON)35mohm
DS
Q17
Q17
G
C278
C278
C0.01u16X0402
C0.01u16X0402
LVDS_VDDEN_G
LVDS_VDDEN#
LVDS_TXUCKN_MXM LVDS_TXL1N_MXM
RI4
RI4
X_100R0402
X_100R0402
LVDS_TXUCKP_MXM
LVDS_TXL2N_MXM
RI8
RI8
X_100R0402
X_100R0402
LVDS_TXL2P_MXM LVDS_TXL0P_MXM
C241 C0.1u16Y0402C241 C0.1u16Y0402
1
OE
VGA_VSYNC_MXM14
+3V_LCD_PANEL
R235
R235
X_1KR0805
3V_LCD_D
DS
G
2
X_1KR0805
Q16
Q16
X_N-2N7002_SOT23-1
X_N-2N7002_SOT23-1
RI6
RI6
X_100R0402
X_100R0402
RI3
RI3
X_100R0402
X_100R0402
APM2317AC
APM2317AC
2
BR-PWM13,28
LVDS_TXL1P_MXM
LVDS_TXL0N_MXM
A
GND3Y
U30
U30
NC7SZ125_SOT23-5
NC7SZ125_SOT23-5
A
4 4
DVI_DATA_MXM14
DVI_CLK_MXM14
3 3
2 2
+3VRUN
Q9
Q9
N-BSS138_SOT23
N-BSS138_SOT23
G
Q12
Q12
G
N-BSS138_SOT23
N-BSS138_SOT23
+3VRUN
DS
DS
DVI_A_HPD14
C257
C257
C1u10X0603
C1u10X0603
B
+5VRUN
R221
R221
4.7KR0402
4.7KR0402
C258
C258
X_C10p25N0402
X_C10p25N0402
R1
R1
10KR0402
10KR0402
D7
D7
S-BAT54ALT1G_SOT23-RH
S-BAT54ALT1G_SOT23-RH
YZX
R220
R220
4.7KR0402
4.7KR0402
SDADDC
SCLDDC
C252
C252
X_C10p25N0402
X_C10p25N0402
+3VRUN+3VRUN
R8
R8
100KR0402
100KR0402
D1
D2
C254
C254
C1u10X0603
C1u10X0603
+5VRUN
Q1
Q1
2N7002DW-7-F_SOT363-6-RH
2N7002DW-7-F_SOT363-6-RH
C
F1 F-SMD1206P050TF-15-RHF1 F-SMD1206P050TF-15-RH
1 2
C1
X_C220p50N0402C1X_C220p50N0402
CLKN_MXM14
+5VRUN
LTX2+JNC
LTX2-JNC
LTX1+JNC
LTX1-JNC
LTX0+JNC
LTX0-JNC
LTXC+JNC
LTXC-JNC
SCLDDC
SDADDC
HDMI_5V
HP_DET
Z
Y
D1
D1
X_BAV99LT1_SOT23
X_BAV99LT1_SOT23
4
3
X
L19
L19
X_CMC-L12-9008064-RH
X_CMC-L12-9008064-RH
1
LTXC+JNC
2
LTXC-JNC
LTXC-JNCLTXC-JNC
D
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
D0+
8
D0 Shield
9
D0-
10
CK+
11
CK Shield
12
CK-
13
CE Remote
14
NC
15
DDC CLK
16
DDC DATA
17
GND
18
+5V
19
HP DET
HDMI1
HDMI1
CONN-HDMI19P_BLACK-RH-4
CONN-HDMI19P_BLACK-RH-4
N5I-19M0180-AF2
N5I-19M0180-AF2
HDMI_S19_3
HDMI_S19_3
R208
R208
X_100R0402
X_100R0402
SHELL1
GND
MEC2
MEC1
GND
SHELL2
E
20
22
MEC2
MEC1
23
21
L18
L18
X_CMC-L12-9008064-RH
X_CMC-L12-9008064-RH
TX0P_MXM14
TX0N_MXM14CLKP_MXM14
3
4
LTX0+JNC
2
LTX0-JNC
1
R207
R207
X_100R0402
X_100R0402
S2
S1
G2
G1
HP_DET
R223 499R1%0402R223 499R1%0402
R224 499R1%0402R224 499R1%0402
R214 499R1%0402R214 499R1%0402
R215 499R1%0402R215 499R1%0402
R216 499R1%0402R216 499R1%0402
R217 499R1%0402R217 499R1%0402
R218 499R1%0402R218 499R1%0402
1 1
+3VRUN
G
R219 499R1%0402R219 499R1%0402
DS
Q10
Q10
N-2N7002_SOT23-1
N-2N7002_SOT23-1
A
TX2P_MXM
TX2N_MXM
TX1P_MXM
TX1N_MXM
TX0P_MXM
TX0N_MXM
CLKP_MXM
CLKN_MXM
TX1N_MXM14
R7
R7
100KR0402
100KR0402
B
C3
C3
X_C220p50N0402
X_C220p50N0402
TX1P_MXM14
C
L17
L17
X_CMC-L12-9008064-RH
X_CMC-L12-9008064-RH
4
3
1
LTX1+JNC
2
L20
L20
X_CMC-L12-9008064-RH
X_CMC-L12-9008064-RH
TX2N_MXM14
R206
R206
X_100R0402
X_100R0402
D
TX2P_MXM14
Title
Title
Title
HDMI
HDMI
HDMI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
Date: Sheet
4
3
LTX2-JNCLTX1-JNC
LTX2-JNC
1
LTX2+JNC
2
E
R212
R212
X_100R0402
X_100R0402
0C
0C
0C
of
16 57Tuesday, June 29, 2010
of
16 57Tuesday, June 29, 2010
of
16 57Tuesday, June 29, 2010
A
B
C
D
E
+3VALW
D6
D6
S-BAT54C_SOT23
S-BAT54C_SOT23
Y
Z
1 1
BH1X2S-1.25PIT
BH1X2S-1.25PIT
RTC_BAT
2 2
3 3
+3VRUN
4 4
RTC_BAT
BAT2
BAT2
D06-0100300-K26
D06-0100300-K26
CODEC_HDA_RST#33
CODEC_HDA_BITCLK33
CODEC_HDA_SYNC33
CODEC_HDA_SDOUT33
SPI_MISO
SPI_MOSI
SPI_CS0#
SPI_CLK
SPI_HOLD#_B
R44
R44
2.2KR0402
2.2KR0402
SPI_CS0#
SPI_MISO SPI_HOLD#_B
CN2
CN2
+3VRUN
1
2
3
4
5
6
7
8
9
10
C58 C0.1u16Y0402C58 C0.1u16Y0402
1
CS
2
DO
3
WP
GND4DI
U14
U14
SPI FLASH-8P_BLACK-RH
SPI FLASH-8P_BLACK-RH
N14-0080030-L06
N14-0080030-L06
SPIFLASH8
SPIFLASH8
A
X
RTC_P2
R119
R119
1KR0402
1KR0402
RTC_P3
1
2
EC7
EC7
X_C10p50N0402
X_C10p50N0402
1112
CON6
CON6
BH1X10HS-1.25PITCH_WHITE-RH
BH1X10HS-1.25PITCH_WHITE-RH
N32-1100130-H06
N32-1100130-H06
FPC_CONN_12P
FPC_CONN_12P
VCC
HLOD
CLK
RTCVCC
R292 20KR0402R292 20KR0402
C111
C111
RTCVCC
C1u16X0603
C1u16X0603
R296
R296
1MR0402
1MR0402
43
EC5
EC5
EC6
EC6
X_C10p50N0402
X_C10p50N0402
X_C10p50N0402
X_C10p50N0402
8
7
SPI_CLK
6
SPI_MOSI
5
BIOS1
BIOS1
MX25L3205DM2I-12G-RH
MX25L3205DM2I-12G-RH
SM_INTRUDER#
EC8
EC8
X_C10p50N0402
X_C10p50N0402
+3VRUN+3VRUN
R45
R45
2.2KR0402
2.2KR0402
R291 20KR0402-2R291 20KR0402-2
RN1
RN1
1
2
3
4
5
6
7
8
8P4R-33R0402
8P4R-33R0402
HDA_SDO
COUGAR POINT (HDA,JTAG,SATA)
1 2
+3VSUS
TPJNC33TPJNC33
TPJNC31TPJNC31
TPJNC34TPJNC34
TPJNC32TPJNC32
R720R0402 R720R0402
R30
R30
TPJNC8TPJNC8
TPJNC48TPJNC48
+3VSUS
RTCX1JNC
R41
R41
10MR1%0402
10MR1%0402
RTCX2JNC
RTCRST#
SRTCRST#
PCH_INTVRMEN
HDA_SDIN0_R
R28733R0402 R28733R0402
HDA_SDOUT_PCH_R
HDA_DOCK_ENJNC
TPJNC33JNC
TPJNC31JNC
TPJNC34JNC
TPJNC32JNC
SPI_CLKR
SPI_CS0#
TPJNC48JNC
SPI_MOSI
SPI_MISO
C
U16A
U16A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
C333
C333
C1u16X0603
C1u16X0603
C332
C332
C1u16Y0603
C1u16Y0603
FLASH_SECURITY28
C53 C18p50N0402C53 C18p50N0402
32.768KHZ12.5p_S-RH-2
32.768KHZ12.5p_S-RH-2
C52 C18p50N0402C52 C18p50N0402
RTCVCC
HDA_RST#_PCH_R
CODEC_HDA_SDIN033
R33 1KR0402R33 1KR0402
Flash Descriptor Security Protect
Low = Enable
High = Disable
SPI_CLK
Checklist Page48: Needs to be pulled high for HR
HDA_SYNC
B
Low = On Die PLL VR is supplied by 1.8V
High = On Die PLL VR is supplied by 1.5V
Y1
Y1
R40 330KR0402R40 330KR0402
HDA_BIT_CLK_PCH_R
HDA_SYNC_PCH_R
SPKR33
R32
R32
X_1KR0402
X_1KR0402
EC14
EC14
X_C10p50N0402
X_C10p50N0402
1KR0402
1KR0402
HDA_SYNC_PCH_R
RTCIHDA
RTCIHDA
JTAG
JTAG
SPI
SPI
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA 6G
SATA 6G
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
+3VRUN
C38
A38
B37
C37
D36
E36
K36
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
SATAICOMP
Y10
AB12
AB13
AH1
Unused SATAxGP pins must be terminated to either VCC3_3 rail or GND using 8.2-kΩ to 10kΩ
P3
V14
P1
close to the PCH
SATA3COMP
R82 750R1%0402R82 750R1%0402
BBS_BIT0
R64
R64
X_1KR0402
X_1KR0402
LAD0 28
LAD1 28
LAD2 28
LAD3 28
LPC_FRAME# 28
L_LDRQ0# 28
SATA0RXN 31
SATA0RXP 31
SATA0TXN 31
SATA0TXP 31
SATA1RXN 32
SATA1RXP 32
SATA1TXN 32
SATA1TXP 32
SATA2RXN 32
SATA2RXP 32
SATA2TXN 32
SATA2TXP 32
ESATA_RXN 32
ESATA_RXP 32
ESATA_TXN 32
ESATA_TXP 32
R347 37.4R1%0402R347 37.4R1%0402
R351 49.9R1%0402R351 49.9R1%0402
R349 10KR0402R349 10KR0402
R63 10KR0402R63 10KR0402
SATA_ACTIVE# 31
R344
R344
10KR0402
10KR0402
INT_SERIRQ 28
HDD1 GEN3(6Gb/s)
HDD2 GEN3(6Gb/s)
ODD
ESATA
VTT
+3VRUN
+3VRUN
BBS_BIT0--BIIOS BOOT STRAP BIT0
Title
Title
Title
PCH_HDA/JTAG/SATA
PCH_HDA/JTAG/SATA
PCH_HDA/JTAG/SATA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
D
Date: Sheet
E
of
17 57Wednesday, June 30, 2010
of
17 57Wednesday, June 30, 2010
of
17 57Wednesday, June 30, 2010
0C
0C
0C
A
COUGAR POINT (PCI-E,SMBUS,CLK)
PCIE_GLAN_RXN29
PCIE_GLAN_RXP29
PCIE_GLAN_TXN29
+3VSUS
PCIE_GLAN_TXP29
PCIE_NEWCARD_RXN31
PCIE_NEWCARD_RXP31
PCIE_NEWCARD_TXN31
PCIE_NEWCARD_TXP31
PCIE_MINI1_RXN31
PCIE_MINI1_RXP31
PCIE_MINI1_TXN31
PCIE_MINI1_TXP31
PCIE_USB3_RXN26
PCIE_USB3_RXP26
PCIE_USB3_TXN26
PCIE_USB3_TXP26
PCIE_CARDREADER_RXN30
PCIE_CARDREADER_RXP30
PCIE_CARDREADER_TXN30
PCIE_CARDREADER_TXP30
CLK_PCIE_LAN#29
CLK_PCIE_LAN29
CLK_GLAN_OE#29
CLK_CARDREADER_N30
CLK_CARDREADER_P30
CARDREADER_CLKREQ#30
CLK_MINI_PCIE2#31
CLK_MINI_PCIE231
CLK_USB3N26
CLK_USB3P26
USB3_CLKRQ#26
CLK_NEW_CARDN31
CLK_NEW_CARDP31
CLK_NEWCARD_OE#31
RN12
RN12
1
3
5
7
8P4R-10K0402
8P4R-10K0402
0C
XDP_CPU_CLK_N3
XDP_CPU_CLK_P3
1 1
2 2
3 3
Intel Comments:
4 4
If CLKREQ# control is not needed, say for a free running clock, DO NOT pull-down signal to GND. This will increase leakage in Sx states.
PCIe devices or addin cards that do NOT support CLKREQ# functionality should not route this signal to PCH.
Intel recommends terminating PCIECLKRQx# pin on PCH with 10 kΩ ±10% external pull-up resistor instead of No Connect.
Only PCIECLKRQ[2:1]# on PCH are core well powered. All other PCIECLKRQx# are suspend well powered.
+3VRUN
2
4
6
8
A
C431 C0.1u10X0402C431 C0.1u10X0402
C427 C0.1u10X0402C427 C0.1u10X0402
C455 C0.1u10X0402C455 C0.1u10X0402
C456 C0.1u10X0402C456 C0.1u10X0402
C420 C0.1u10X0402C420 C0.1u10X0402
C416 C0.1u10X0402C416 C0.1u10X0402
C454 C0.1u10X0402C454 C0.1u10X0402
C453 C0.1u10X0402C453 C0.1u10X0402
C452 X_C0.1u10X0402C452 X_C0.1u10X0402
C451 X_C0.1u10X0402C451 X_C0.1u10X0402
0C
+3VSUS
+3VSUS
R361 X_0R0402R361 X_0R0402
R356 X_0R0402R356 X_0R0402
R2810KR0402 R2810KR0402
R346X_10KR0402 R346X_10KR0402
PETN1_JNC
PETP1_JNC
PETN2_JNC
PETP2_JNC
PETN3_JNC
PETP3_JNC
PETN4_JNC
PETP4_JNC
PETN5_JNC
PETP5_JNC
R5810KR0402 R5810KR0402
BG34
BJ34
AV32
AU32
BE34
BF34
BB32
AY32
BG36
BJ36
AV34
AU34
BF36
BE36
AY34
BB34
BG37
BH37
AY36
BB36
BJ38
BG38
AU36
AV36
BG40
BJ40
AY40
BB40
BE38
BC38
AW38
AY38
Y40
Y39
J2
AB49
AB47
M1
AA48
AA47
V10
Y37
Y36
A8
Y43
Y45
L12
V45
V46
L14
AB42
AB40
E6
V40
V42
R15710KR0402 R15710KR0402
T13
V38
V37
K12
AK14
AK13
B
U16B
U16B
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2# / GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P
PCIECLKRQ3# / GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4# / GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5# / GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56
CLKOUT_PCIE6N
CLKOUT_PCIE6P
PCIECLKRQ6# / GPIO45
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7# / GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
B
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
SMBALERT# / GPIO11
SMBDATA
SML0ALERT# / GPIO60
SML0DATA
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
FLEX CLOCKS
FLEX CLOCKS
CL_DATA1
CL_RST1#
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
SMBCLK
SML0CLK
CL_CLK1
E12
H14
C9
A12
C8
G12
SMLINK0 for PHY
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
TPJNC15JNC
AM12
TPJNC47JNC
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
C
PCH_GPIO11
SUS_SMBCLK
SUS_SMBDATA
DRAMRST_CNTRL_PCH 3
SML0_CLK
SML0_DATA
PCH_GPIO74
SML1_CLK
SML1_DATA
CLK_PEGA_MXM_N 14
CLK_PEGA_MXM_P 14
CLK_EXP# 3
CLK_EXP 3
CLK_BUF_EXP# 27
CLK_BUF_EXP 27
CLK_BUF_CPYCLKN 27
CLK_BUF_CPYCLKP 27
CLK_BUF_DOT96# 27
CLK_BUF_DOT96 27
CLK_BUF_SATA# 27
CLK_BUF_SATA 27
CLK_BUF_REF14 27
CLK_PCI_FB 21
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
TP_CLK_FLEX0JNC
TP_CLK_FLEX1JNC
TP_CLK_FLEX2JNC
TP_CLK_FLEX3JNC
C
PCH_GPIO74
PCH_GPIO11
DRAMRST_CNTRL_PCH
SUS_SMBDATA
SUS_SMBCLK
SML0_CLK
SML0_DATA
SML1_CLK
SML1_DATA
TPJNC15TPJNC15
TPJNC47TPJNC47
R342 90.9R1%0402R342 90.9R1%0402
TPJNC35TPJNC35
TPJNC10TPJNC10
R322 33R0402R322 33R0402
0C0C
C438
C438
X_C10p25N0402
X_C10p25N0402
R27910KR0402 R27910KR0402
R28010KR0402 R28010KR0402
R281 1KR1%0402R281 1KR1%0402
R283 2.2KR0402R283 2.2KR0402
R282 2.2KR0402R282 2.2KR0402
RN10
RN10
1
2
3
4
5
6
7
8
8P4R-2.2K0402
8P4R-2.2K0402
PEG_CLKREQ# 14
R315
R315
10KR0402
10KR0402
VTT
R320 33R0402R320 33R0402
PCH_USB_48 26
D
+3VSUS
SUS_SMBCLK
SUS_SMBDATA
+3VRUN
SML1_CLK
SML1_DATA
NN-2N7002DW-7-F_SOT363-6-RH
NN-2N7002DW-7-F_SOT363-6-RH
+3VRUN
CLK_BUF_CPYCLKN
CLK_BUF_CPYCLKP
R74
R74
1MR1%0402
1MR1%0402
C433
C433
X_C10p25N0402
X_C10p25N0402
D
D1
D2
S2
G2
G1
Q22
Q22
D1
D2
S2
G2
G1
C74 C18p50N0402C74 C18p50N0402
12
X1
X1
25MHZ20p_S-RH-2
25MHZ20p_S-RH-2
C72 C18p50N0402C72 C18p50N0402
CLK_CARD48 30
E
Q21
Q21
NN-2N7002DW-7-F_SOT363-6-RH
NN-2N7002DW-7-F_SOT363-6-RH
S1
SMB_CLK_DIMM 3,9,10,11,12,27
SMB_DATA_DIMM 3,9,10,11,12,27
+3VRUN
246
8
8P4R-2.2K0402
8P4R-2.2K0402
RN13
RN13
135
7
S1
SMB_CPU_CLK 13,14,28,41
SMB_CPU_DATA 13,14,28,41
0C
R10610KR0402 R10610KR0402
R10710KR0402 R10710KR0402
R374 10KR0402R374 10KR0402
CLK_BUF_EXP#
R375 10KR0402R375 10KR0402
CLK_BUF_EXP
R293 10KR0402R293 10KR0402
CLK_BUF_DOT96#
R294 10KR0402R294 10KR0402
CLK_BUF_DOT96
R359 10KR0402R359 10KR0402
CLK_BUF_SATA#
R358 10KR0402R358 10KR0402
CLK_BUF_SATA
R306 10KR0402R306 10KR0402
CLK_BUF_REF14
For Intergrated Clock Generation Mode
Title
Title
Title
PCH_PCIE/SMBUS/CLK
PCH_PCIE/SMBUS/CLK
PCH_PCIE/SMBUS/CLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-16F21
MS-16F21
MS-16F21
Date: Sheet
Date: Sheet
Date: Sheet
E
0C
0C
18 57Thursday, July 01, 2010
18 57Thursday, July 01, 2010
18 57Thursday, July 01, 2010
0C
of
of
of
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