W220 Block Diagram Signal Desription
Signal Description W220 (EURO)
Signal Description
Lower PCB Upper PCB Lower PCB Upper PCB Daughter_PCB
ToFrom
Lower PCB
MAIN_CS U201 R313 chip selection of LCM driver IC
MAIN_CS_1 U307 CON301 chip selection of LCM driver IC
LCDC_RESET U201 CON301,C302 reset of LCM driver IC
V-FLASH U202 U201,U204,U314,CON301,U501 1.8V, regulater output of IOTA
V-IO U202 U101,U102,U103,U104,U105,U108,U109,U201,CON301,U313,U604,U701 2.8V, regulater output of IOTA
V-DBB U202 U201 1.5V, regulater output of IOTA
V-RTC U202 U201 1.5V, regulater output of IOTA
V-SRAM U202 U501 1.8V, regulater output of IOTA
VRSIM U202 CON304 1.5V, regulater output of IOTA
V-ABB U202 2.8V, regulater output of IOTA
SIM-IO3 U201 U202 SIM IO
SIM-CLK3 U201 U202 SIM Clock
SIM_RST3 U201 U202 SIM Reset
TDI U201 JTAG data Input
TDO U201 JTAG data Output
TCK U201 JTAG data Clock
TMS U201 JTAG Mode select
TXD
RXD U201 U103 UART RX
TXD2 U201 TP205 IRDA TX
RXD2 U201 TP206 IRDA RX
I2C_SCL U201 C302,U313 I2C Clock
I2C_SDA U201 C302,U313 I2C Serial Data & Address
VOICE_FM U201 U104 VOICE/FM path Selection
OP_EN U201 U105 OP Enable
EP_STATUS U201 J102,U108 Earphone status
VOICE_UART U201 U102,U103 VOICE/UART Selection
IRQ1 U201 U108 Earphone insert Interrupter
HOOK_SW U201 U107 Hook SW detection
VDX U201 U202 TX data
VDR U201 U202 RX data
VFSRX U201 U202 TX/RX Synchro
VCLKRX U201 U202 TX/RX Clock
KBR[0..4] U201 C0N401 Keyboard matrix 5 by 5 row access.
KBC[0..4]
BUS_EN U201 U701 FM I2C bus enable
FM_GPIO1 U201 U701 GPIO simulate I2C bus Clock
FM_GPIO2 U201 U701 GPIO simulate I2C data bus
U201 U102 UART TX
U201 C0N401 Keyboard matrix 5 by 5 column access.
Level 3 Service Engineering Optimization 1/4
Signal Description W220 (EURO)
BL_EN U201 CON301 LCM backlight enable
Hall_Sensor U201 U109 Hall_Sensor output
LCM_DC U201 U314 LCM data/command control
BFSR U201 U202 Receiver synchro
BDR U201 U202 Receiver data
BFSX U201 U202 Transmit sychro
BDX U201 U202 Transmit data
MCUDI U201 U202 Input serial data
MCUDO U201 U202 Output serial data
MCUEN U201 U202 Configurable enable triggers(edge/level)
VIBRATOR_ON U201 U312 Enable vibrator
/PDN U201 U604 Transceiver enable
SPI_SDO U201 U202,U604 3wire bus data in/out
/SEN U201 U604 3wire bus enable
SPI_CLK U201 U604 3wire bus clock
TCXOEN U201 U601,U604 Enable SI4210 TCXO function
VC1B U201 U608 GSM TX enable
VC2B U201 U608 DCS TX Enable
PA_ON U201 U605 PA Enable
PA_BS U201 U605 PA Band selection
TSPEN0 U201 U202 Configurable triggers (edge/level)
CLK32K_OUT U201 U202,U701 RTC clock
CLK13M_OUT U201 U202,U101 Main clock
26MHz U604 U201 System clock
nRESPWON U202 U201 Chip Power-On reset
EXT-FIQ U202 U201 Fast external interrupt for ARM
EXT-IRQ U202 U201
ONnOFF U202 U201 Regulators activity
IT-WAKEUP U201 U201 Wake-up interrupt of Real Time Clock
/CS1 U201 U101 Melody IC chip select
MELODY_RESET U201 U101 Reset Melody
/RD U201 U101,U501 Read data
/WE U201 U101,U501 Write data
FDP U201 U501
/BHE U201 U501 Ext RAM1/RAM2 chip select
/BLE U201 U501 Ext RAM1/RAM2 chip select
/CS0 U201 U501 Flash chip selection
/CS3 U201 U501 SRAM chip selection
A[1..22] U201 U501 Address bus
A1 U201 U101 Command/address selection
D[0..15] U201 U501 Data bus
D[0..7] U201 U101,CON301 Data bus
SIMIO U202 CON304 SIM data in/out port
SIMCLK U202 CON304 SIM Clock
SIMRST U202 CON304 SIM reset
External interrupt for ARM
Flash deep low-power
Level 3 Service Engineering Optimization 2/4