Rev. 0.5 Motorola Confidential Proprietary Page 4 of 41
Non-adjunct EMU Bus HW/SW ICD
Table 6-13: Bus Configuration Settings ........................................................................... 40
Rev. 0.5 Motorola Confidential Proprietary Page 5 of 41
1. Revision History
Revision
Date
Author(s)
Reason
0.1
10/1/2003
Don La Monica
Tim McCune
Initial Draft. Incomplete Release.
0.2
10/24/2003
Don La Monica
Tim McCune
Initial Release for review. Major additions/editing.
Smart device section incomplete (not needed for
phase 1 or Razor SA).
0.3
10/27/2003
Tim McCune
Don Lamonica
Corrected SW_BP_EN to PA6 in tables 3-5 and 4-1
Corrected PPD_DET_I to PPD_DET_B in section
4.3.1.2
General corrections (spelling/grammar)
“Apps” added in figure 4-6
Corrected USB_PS description
Swapped Mono Headset and not used in Table 3-4
Changed 0 and 1 to ASSERTED and
DEASSERTED for clarity in table 3-4
Corrected HAPI_USB_HW and HAPI_USB_HW_5
in table 4-1
Changes related to dual path charging
PA13 Changed to MID_RATE_CTRL
SW_CUR_SEL removed
Changes to device handling for USB cable
PE12 Changed to FACT_DET (High voltage ID
detect)
Added content to Factory Interface Section
Charging Sections changed to reflect modified dual
path architecture.
0.4
12/16/03
Tim McCune
Don La Monica
PPD identification flow chart changed to reflect
changes in the EMU specification.
Changed MUX lines to original configuration (due to
leakage paths)
Added current check prior to turn on.
Clarification on stereo tests (only SPKR_R needs to
be tested).
Added FACT_DET control of external power path
Removed HV_FLASH
Added HAPI signal cross-reference for all hardware
signals
Added ISP1109 (Philips EMU IC) Addendum
Added Charge_USB_RX flow chart
Updated Charge_MID_TX
0.5
3/17/2004
Tim McCune
Updated title to reflect expanded scope.
Updated software regression and factory modes wrt
charging.
Updated SPD detection for SHIF
Added SET_CHARGER test command
Non-adjunct EMU Bus HW/SW ICD
Rev. 0.5 Motorola Confidential Proprietary Page 6 of 41
2. Introduction
2.1. Purpose and Scope
This document is meant as a design guide for the hardware and software implementation of the
EMU bus based on the use discrete components or Philips ISP1109 IC, Neptune LTE, and
PCAP2. The upper layers of EMU bus support (anything above rtime) should not change when
moving to a fully integrated solution; however some degree of low level change is expected.
Once completed all aspects of the HW/SW interface for this EMU bus implementation will be
covered within this document
2.2. Nomenclature and Conventions
2.2.1. Acronyms and Abbreviations
USB Universal Serial Bus
EMU Enhanced Mini USB
PPD Phone Powered Device
SPD Self Powered Device
SE1 Singled Ended 1
ISR Interrupt Service Routine
Non-adjunct EMU Bus HW/SW ICD
2.3. Contact Information
Any document issues, questions, or input should be relayed to the following:
Tim McCune Tim.McCune@motorola.com+1-847-523-2735
Don La Monica D.Lamonica@motorola.com+1-847-523-8285
2.4. References
All EMU bus specifications can be found at:
compass.mot.com/go/emu
EMU Bus: Audio Architecture
EMU Bus: Power Architecture
EMU Bus: Detection, Identification, and Control
Rev. 0.5 Motorola Confidential Proprietary Page 7 of 41
3. Hardware Interface
Signal
Connection
Description
VBUS
Mini USBEMU
control logic & power
Supplies power to the radio from SPD’s. Acts as SW_B+ for
PPD’s. Used in SPD detection
D+
Mini USBEMU
control logic & muxing
Used for device identification. Acts as D+ for USB mode,
UART RXD in UART mode
MIC_IN in audio mode
SPKR_R in stereo mode
D-
Mini USB EMU
control logic & muxing
Used for device identification. Acts as D- for USB mode,
UART TXD in UART mode
SPKR_OUT in audio mode
SPKR_L in stereo mode
ID
Mini USB EMU
control logic & sense
Used for PPD detection,
Device identification.
Acts as MUTE to SIHF (controlled by SNP_INT_CTL)
Acts as SEND/END for headset
MID_RATE_CTRL
Neptune EMU
Controls the external power supply path
3.1. EMU Block Diagram
Non-adjunct EMU Bus HW/SW ICD
3.2. Detailed Signal Description
Rev. 0.5 Motorola Confidential Proprietary Page 8 of 41
Figure 3-1: Razor EMU Bus Block Diagram
Non-adjunct EMU Bus HW/SW ICD
Signal
Connection
Description
charging control logic
SNP_INT_B
EMU Detection hardware
Neptune
Signal Negotiation Protocol Interrupt
CHRG_DET_PU_B
Neptune EMU control
logic
SNP_INT_CTL
EMU Detection hardware
Neptune
Control signal to pull the ID line low.
USB_EN_B
Neptune EMU Power
control
MUX1
Neptune Audio/Data
selection mux
Function multiplexor selection line
MUX2
Neptune Audio/Data
selection mux
Function multiplexor selection line
SW_BP_EN
Neptune EMU Power
control
Switched B+ enable
PPD_INT_B
EMU Detection hardware
Neptune
Phone Powered Device Detect
SPKR_R
PCAP Audio/Data
selection mux
Speaker right input to audio/data mux
SPKR_L
PCAP Audio/Data
selection mux
Speaker left input to audio/data mux. Also used for
SPKR_OUT for headset/car kit
MIC_IN
Audio/Data selection mux
PCAP
MIC input to PCAP from audio/data selection mux
FACT_DET
EMU Control logic
Neptune
Indicates factory mode entered by elevated ID voltage at power
up. Used to enable the external power path under SW control
EMU_2.8
2.8V reg EMU logic
EMU_3.3
3.3V reg EMU logic
AD6
ID PCAP
Used to sense the voltage on the ID line
USB_PWR
EMU control PCAP
Gated version og VBUS to PCAP USB power input.
USB_TXENB
Neptune PCAP
Used in USB mode to enable USB TX. Controlled from USB
module
USB_VPIN
PCAP Neptune
Used for VPIN in USB mode. Used to sense the D+ state for
PPD identification.
USB_XRXD
PCAP Neptune
USB receive data for USB mode
USB_SE0
Neptune PCAP
Single ended 0 generation in USB mode
USB_VMIN
PCAP Neptune
VMIN during USB mode. Used to sense the D- state during
device identification. Used as UART RXD in UARTmode
USB_VPOUT
Neptune PCAP
USB TX data in USB mode. UART TXD in UART mode
3.2.1. Power
The EMU bus allows charge current to be supplied by the VBUS pin. Supported VBUS
sources will be Motorola Chargers, CEA-936 compliant Car-kits, USB hosts, or a factory
mode supply. The charger path will be a dual-path topology with a hardware controlled
discharge lockout when connected to a USB host prior to software charge current
negotiation.
A Fast-Rate Charger (>1Amp capability) and a Mid-Rate Charger (>450mA capability)
will be standard Motorola EMU accessories. Razor will charge from either of these
charger types once they are identified as being valid. Validity will be based on a valid
USB_ID value as well as a valid voltage range (4.7V-5.25V). Both will be treated as a
Standard Charger in RX due to power dissipation constraints. If charger is invalid,
software will not charge. EMU Chargers are not compatible with P2k or LCA.
A Factory Mode can be entered by applying VBUS voltage to the USB_ID pin. The
purpose of Factory Mode is to allow power-up to occur without a battery.
When VBUS is supplied by a USB host, hardware detection will default charger to off
until SW powers up and negotiates 500mA with host. If 500mA is negotiated, software
Table 3-1: Consolidated Signal Description
Rev. 0.5 Motorola Confidential Proprietary Page 9 of 41
Non-adjunct EMU Bus HW/SW ICD
Hardware Source
Logical Interrupts
Function
PCAP_INT
USB4VI
Indicates when VBUS added or removed.
Currently proposed not to be used. All SPD
insertion and removal shall be performed using
MOBPORTBI
MOBPORTBI
indicates when charger is added or removed
SNP_INT_B
NA
Indicates accessory is initiating communication
with radio
PPD_INT_B
NA
Allows radio to initiate communication with
accessory
Signal
Function
MUX1
Switches appropriate signals on D+ / D- of min-USB connector
MUX2
Switches appropriate signals on D+ / D- of min-USB connector
SNP_INT_CTRL
interrupts accessory to request it to enter UART mode
FACT_DET
Detects elevated ID voltage factory mode. Also used to enable
the external power path via software.
MID_RATE_CTRL
Controls the external power path connection
CHRG_DET_PU
Connects a pull-up resistor on D+ when radio is not in USB
mode
USB_EN_B
Used to control the VBUS pass device to allow PCAP to detect
the voltage on VBUS and switch to USB mode.
SW_BP_EN
Enables the supply to phone powered devices. Also places
phone powered devices in low power mode.
will begin to charge battery. If 500mA is denied, then charging will not occur and the
USB host will be treated as a data cable only.
The Radio will also have the capability to supply a switched B+ supply to VBUS
originating from the battery. This supply will allow phone powered accessories to
receive power from the phone. This supply will be controlled by SW_BP_EN.
3.2.2. Communication (USB/RS232)
Along with the standard USB communication between a phone and a host, another
UART based protocol will also be supported. This protocol will allow a phone to
communicate with a CEA-936 compliant device without the expense of requiring it to be
a USB Host.
Standard USB communication will occur by utilizing the base band USB controller and
UART. USB and UART muxing will occur in PCAP2.
Software will need to put PCAP in the appropriate mode by drivingUSB_EN_B.
3.2.3. Interrupt and Control
The following Interrupts will be generated to indicate changes in EMU Bus state.
Table 3-2: EMU Interrupt Sources
The following signals will be used for EMU Bus Control
Table 3-3: EMU Control Signals
Rev. 0.5 Motorola Confidential Proprietary Page 10 of 41
Non-adjunct EMU Bus HW/SW ICD
Mode
MUX1
MUX2
USB_EN_B
USB mode
0 0 ASSERTED
UART mode
0 0 DEASSERTED
Not used
0 1 X
Mono headset / carkit
1 0 X
Stereo mode
1 1 X
3.2.3.1. Device to Device Communication Usage
The following signals are required to communicate with accessories:
PPD_INT_B: A falling edge indicates that a phone powered device has been
inserted. This interrupt should be masked when a self powered device is
detected. This interrupt will be asserted in conjunction with the SNP_INT_B for
a self powered device due to the nature of the hardware.
SNP_INT_B: A falling edge indicates a smart device request to enter UART
mode and begin communication. This interrupt should be masked during a
MS Accessory SNP_INT_B initiated by asserting SNP_INT_CTL. This
signal also serves the SEND/END functionality for the EMU headset. There
will be different ISR’s registered for this interrupt based on bus mode.
SNP_INT_CTL: Software will control the bus mode (audio or UART) to
CEA-936 compliant accessories by driving SNP_INT_CTL as necessary (see
x.x.x). This hardware signal is also used for MUTE control of the SIHF. In this
mode its polarity is reversed (H = SIHF un-muted, L= SIHF muted). For
maintainability it may be useful to define a separate HAPI signal the SIHF
MUTE functionality.
MUX1, MUX2, USB_EN_B: The truth table below indicates how MUX1,
MUX2 and USB_EN are used to place the bus in the appropriate state to switch
in the correct signals.
Table 3-4: Bus Mode Control
SW_BP_EN: See Table 3-3
3.2.3.2. Internal Control Usage
The following signals are used to control devices internal to the radio to allow
charging, detection and for some mode changes:
MID_RATE_CTRL: See Table 3-3
FACT_DET: This signal is used to detect fatory mode at power up. After
check initial states this signal acts as the software control signal to enable the
external power path. It should be set low when there is no external power
present to conserve power. FACT_DET should be driven high whenever
software must ensure the external power path remains connected (e.g. during
Charger/SIHF identification).
CHRG_DET_PU: See Table 3-3
3.2.4. Audio
Audio and data share the same pins on the mini-USB connector (D+ and D-). Supported
Audio accessories will be a mono-headset with send/end, a car-kit (mono audio and mic)
Rev. 0.5 Motorola Confidential Proprietary Page 11 of 41
and possibly a stereo headset. The audio interface will meet the CEA-936 requirements.
GPIO Pin
Signal(s)
Neptune
Module
Reuse from
Triplets
PA6
SW_BP_EN
MCU GPIO
Y
PA11
CHRG_DET_PU
MCU GPIO
N
PA12
PPD_INT_B
EXT INT 3
N
PA13
MID_RATE_CTRL
MCU GPIO
(Y)
PD8
USB_EN_B
MCU GPIO
N
PD10
USB_TXENB
USB
Y
PD11
USB_VPIN
USB
Y
PD13
USB_XRXD
USB
Y (no RTS)
PD15
USB_SE0
USB
Y
PE1
SNP_INT_CTL
MCU GPIO
N
PE3
SNP_INT_B
EXT INT 4
N
PE10
MUX1
MCU GPIO
N
PE11
MUX2
MCU GPIO
N
PE12
FACT_DET
MCU GPIO
N
GPIO
Pin
Signal
Neptune Module
Reuse
from
Triplets
Cross
Reference
USB Mode
UART Mode
USB
UART
PD12
USB_VMIN
URXD1
USB
UART1
Y
PD14
USB_VPOUT
UTXD1
USB
UART1
Y
Note that Razor will not have a separate headset-jack due to space constraints and thus
will have a mini-USB based headset. The gains will be same for a car-kit and headset
(with amplifiers in the headset to change gain as needed). Echo cancellation will need to
be disabled when headset audio is being sent.
3.3. GPIO Usage
3.3.1. Statically Configured GPIO
These signals retain the same GPIO configuration regardless of the operating mode of the
bus. This section serves as a quick reference for the GPIO connectivity; signal
definitions and usage are covered in other areas of this specification.
Non-adjunct EMU Bus HW/SW ICD
3.3.2. Dynamically Defined GPIO
These GPIO are used for different signals depending on the bus state.
4. Software Interface
4.1. Neptune Configuration
4.1.1. GPIO Configuration
Table 4-1 contains the information required for the GPIO configuration. The required
defines used by HAPI can be generated by placing “HAPI_GPIO_” prior to the hardware
signal, port, and data direction columns. Those signals that have HAPI signals defined in
this table already have all the required defines in hapi_gpio_defs.h, and
hapi_neptune_portlist.h. They also have the required table entries in place in
Table 3-5: Statically Defined GPIO
Table 3-6: Dynamically Configured GPIO
Rev. 0.5 Motorola Confidential Proprietary Page 12 of 41
Non-adjunct EMU Bus HW/SW ICD
Hardware Signal
Port
Pin
Data
Direction
Output
Selection
Input
Selection
Default
Active
State
HAPI signal
SW_BP_EN
PORT_A
6
OUTPUT 0 -
INACTIVE
HIGH
HAPI_SW_BPLUS_EN
CHRG_DET_PU_B
PORT_A
11
OUTPUT 0 -
ACTIVE
LOW
HAPI_CHRG_DET_PU_B
PPD_INT_B
PORT_A
12
INPUT - 0
*
LOW
HAPI_PPD_INT_B
MID_RATE_CTRL
PORT_A
13
OUTPUT 0 -
INACTIVE
HIGH
HAPI_SW_CUR_SEL
USB_EN_B
PORT_D
8
OUTPUT 0 -
ACTIVE
LOW
HAPI_USB_EN_B
USB_TXEN_B
PORT_D
10
OUTPUT 2 -
*
LOW
HAPI_USB_HW_2
USB_VPIN
PORT_D
11
INPUT - 0
*
NA
HAPI_USB_HW_6
USB_VMIN
PORT_D
12
INPUT - 0
*
NA
HAPI_USB_HW_5
URXD1
PORT_D
12
INPUT - 2
NA
HAPI_UART1_RX1_DATA
USB_XRXD
PORT_D
13
INPUT - 0
*
NA
HAPI_USB_HW_3
USB_VPOUT
PORT_D
14
OUTPUT 2 -
*
NA
HAPI_USB_HW_4
UTXD1
PORT_D
14
OUTPUT 5 -
NA
HAPI_UART1_TX1_DATA
USB_SE0
PORT_D
15
OUTPUT 2 -
*
HIGH
HAPI_USB_HW
SNP_INT_CTL
PORT_E
1
OUTPUT 0 -
INACTIVE
HIGH
HAPI_SNP_INT_CTL
SNP_INT_B
PORT_E
3
INPUT - 1
*
LOW
HAPI_SNP_INT_B
MUX1
PORT_E
10
OUTPUT 0 -
ACTIVE
HIGH
HAPI_MUX_1
MUX2
PORT_E
11
OUTPUT 0 -
ACTIVE
HIGH
HAPI_MUX_2
FACT_DET
PORT_E
12
INPUT 0 0
*
HIGH
HAPI_FACT_DET
Interrupt
PCAP Register
Bit
Bit Definition
MOBPORTBI
Reg 0: ISR
10
1=interrupt generated, write 1 to clear
MOBPORTBM
Reg 1: IMR
10
1=MobportBI is masked
MOBPORTBS
Reg 2:PSTAT
10
0=MobportB not present, 1=MobportB present
USB4VI
Reg 0:ISR
6 USB4M
Reg 1:IMR
6
USB4S
Reg 2:PSTAT
6
hapi_neptune_portlist.c. Entries with HAPI signals listed in () have the equivalent
physical configuration as the listed HAPI signal, but different logical usage.
GPIO initialization states are indicated in the default column. If a pin has multiple uses
the GPIO selection muxes and direction should reflect the setting for the signal that has
an entry in the default column. The default state (ACTIVE/INACTIVE) of signals with
an * in the default column is not configurable. For those signals with a default state
indicated the corresponding bit in MCU data register for the corresponding port should be
set to this state.
Table 4-1: GPIO Configuration Reference
4.1.2. External Interrupt Configuration
There are only three physical external interrupt sources used for EMU bus. These are the
PCAP interrupt connected to INT1 and configured exactly as it is in Triplets (no code
changes required); the PPD_INT_B connected to INT2 and configured exactly as the
Option select 2 interrupt in Triplets (probably should create a new signal for clarity, but
can copy defines); and the SNP_INT_B which must be reconfigured based on the
attached accessory.
4.2. PCAP Configuration
4.2.1. Interrupts
PCAP interrupts will be indicated to software by the PCAP_INT signal. Software will
then read the ISR and PSTAT registers to determine source of interrupt and debounce as
required.
The following PCAP interrupts will be used:
Rev. 0.5 Motorola Confidential Proprietary Page 13 of 41
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