MOTOROLA SN74LS85D, SN74LS85DR2, SN74LS85M, SN74LS85MEL, SN74LS85ML1 Datasheet

...
Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1 Publication Order Number:
SN74LS85/D
SN74LS85
4-Bit Magnitude Comparator
The SN74LS85 is a 4-Bit Magnitude Camparator which compares two 4-bit words (A, B), each word having four Parallel Inputs (A
0–A3
, B0–B3); A3, B3 being the most significant inputs. Operation is not restricted to binary codes, the device will work with any monotonic code. Three Outputs are provided: “A greater than B” (O
A>B
), “A less than B” (O
A<B
), “A equal to B” (O
A=B
). Three
Expander Inputs, I
A>B
, I
A<B
, I
A=B
, allow cascading without external gates. For proper compare operation, the Expander Inputs to the least significant position must be connected as follows: I
A<B
= I
A>B
= L,
I
A=B
= H. For serial (ripple) expansion, the O
A>B
, O
A<B
and O
A=B
Outputs are connected respectively to the I
A>B
, I
A<B
, and I
A=B
Inputs of the next most significant comparator, as shown in Figure 1. Refer to Applications section of data sheet for high speed method of comparing large words.
The Truth T able on the following page describes the operation of the SN74LS85 under all possible logic conditions. The upper 11 lines describe the normal operation under all conditions that will occur in a single device or in a series expansion scheme. The lower five lines describe the operation under abnormal conditions on the cascading inputs. These conditions occur when the parallel expansion technique is used.
Easily Expandable
Binary or BCD Comparison
O
A>B
, O
A<B
, and O
A=B
Outputs A vailable
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
CC
Supply Voltage 4.75 5.0 5.25 V
T
A
Operating Ambient
T emperature Range
0 25 70 °C
I
OH
Output Current – High –0.4 mA
I
OL
Output Current – Low 8.0 mA
LOW
POWER
SCHOTTKY
Device Package Shipping
ORDERING INFORMATION
SN74LS85N 16 Pin DIP 2000 Units/Box SN74LS85D 16 Pin
SOIC
D SUFFIX
CASE 751B
http://onsemi.com
2500/Tape & Reel
PLASTIC N SUFFIX CASE 648
16
1
16
1
SN74LS85
http://onsemi.com
2
LOGIC SYMBOL
CONNECTION DIAGRAM DIP (TOP VIEW)
Parallel Inputs A = B Expander Inputs A < B, A > B, Expander Inputs A Greater than B Output B Greater than A Output A Equal to B Output
A
0
– A3, B0 – B
3
I
A = B
I
A < B
, I
A > B
O
A > B
O
A < B
OA = B
1.5 U.L.
1.5 U.L.
0.5 U.L. 10 U.L. 10 U.L. 10 U.L.
0.75 U.L.
0.75 U.L.
0.25 U.L. 5 U.L. 5 U.L. 5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
HIGH LOW
(Note a)LOADING
PIN NAMES
V
CC
= PIN 16
GND = PIN 8
10 12 13 15 9 11 14 1
4 2 3
5 7 6
A
0A1A2A3B0B1B2B3
I
A>B
I
A<B
I
A=B
O
A>B
O
A<B
O
A=B
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
14 13 12 11 10 9
123456
7
16 15
8
V
CC
B
3
A
3
B2A2A
1
A
0
B
1
B
0
I
A<BIA=BIA>BOA>BOA=B
O
A<B
GND
H = HIGH Level L = LOW Level X = IMMATERIAL
SN74LS85
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3
LOGIC DIAGRAM
O
A>B
O
A<B
O
A=B
(5)
(6)
(7)
A3 B3
A2 B2
A<B A=B A>B
A1 B1
A0 B0
(15)
(1)
(13)
(14)
(12)
(11)
(10)
(9)
(2) (3) (4)
TRUTH TABLE
COMPARING INPUTS
CASCADING
INPUTS
OUTPUTS
A3,B3A2,B2A1,B1A0,B0I
A>BIA<BIA=B
O
A>B
O
A<B
O
A=B
A3>B
3
X X X X X X H L L
A3<B
3
XXXXXX L HL
A3=B3A2>B
2
XXXXX H LL
A3=B3A2<B
2
XXXXX L HL
A3=B3A2=B2A1>B
1
XXXX H LL
A3=B3A2=B2A1<B
1
XXXX L HL
A3=B3A2=B2A1=B1 A0>B
0
X XX H LL
A3=B3A2=B2A1=B1A0<B
0
X XX L HL
A3=B3A2=B2A1=B1A0=B
0
H LL H LL
A3=B3A2=B2A1=B1A0=B
0
L HL L HL
A3=B3A2=B2A1=B1A0=B
0
X XH L LH
A3=B3A2=B2A1=B1A0=B
0
H HL L LL
A3=B3A2=B2A1=B1A0=B
0
L L L H H L
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