Motorola SG3527AN, SG3525ADW, SG3525AN Datasheet

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Order this document by SG3525A/D

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The SG3525A, SG3527A pulse width modulator control circuits offer improved performance and lower external parts count when implemented for controlling all types of switching power supplies. The on–chip +5.1 V reference is trimmed to ±1% and the error amplifier has an input common–mode voltage range that includes the reference voltage, thus eliminating the need for external divider resistors. A sync input to the oscillator enables multiple units to be slaved or a single unit to be synchronized to an external system clock. A wide range of deadtime can be programmed by a single resistor connected between the CT and Discharge pins. These devices also feature built–in soft–start circuitry , requiring only an external timing capacitor. A shutdown pin controls both the soft–start circuitry and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown, as well as soft–start recycle with longer shutdown commands. The under voltage lockout inhibits the outputs and the changing of the soft–start capacitor when VCC is below nominal. The output stages are totem–pole design capable of sinking and sourcing in excess of 200 mA. The output stage of the SG3525A features NOR logic resulting in a low output for an off–state while the SG3527A utilized OR logic which gives a high output when off.

• 8.0 V to 35 V Operation

• 5.1 V ± 1.0% Trimmed Reference

• 100 Hz to 400 kHz Oscillator Range

• Separate Oscillator Sync Pin

• Adjustable Deadtime Control

• Input Undervoltage Lockout

• Latching PWM to Prevent Multiple Pulses

• Pulse–by–Pulse Shutdown

• Dual Source/Sink Outputs: ±400 mA Peak

Representative Block Diagram

ref

Ground

OSC Output

Sync

RT CT

Discharge

Compensation

INV. Input

Noninv. Input

Soft–Start

Shutdown

16 15 12

Reference Regulator

4 3

Oscillator

5 7

9 1

–

Error

Amp

5.0k

T o Internal

Circuitry

+ – PWM –

5.0k

Under– Voltage Lockout

F/F

Latch

REF

VC 13

Output A

NOR

SG3525A Output Stage

Output B

Output A

Output B

SG3527A Output Stage

PULSE WIDTH MODULATOR

CONTROL CIRCUITS

SEMICONDUCTOR

TECHNICAL DATA

N SUFFIX

Inv. Input

Noninv. Input

OSC. Output

Discharge Soft–Start

ORDERING INFORMATION

Device

SG3525AN SG3525ADW SG3527AN

PIN CONNECTIONS

1 2

Sync

3 4

7 89

Temperature Range

TA = 0° to +70°C

PLASTIC PACKAGE

DW SUFFIX

PLASTIC PACKAGE

CASE 751B

(Top View)

Operating

CASE 648

(SO–16L)

ref

Output B

Ground

Output A

Shutdown

Compensation

Package

Plastic DIP

SO–16L

Plastic DIP

MOTOROLA ANALOG IC DEVICE DATA

 Motorola, Inc. 1996 Rev 2

SG3525A SG3527A

MAXIMUM RATINGS

Supply Voltage V Collector Supply Voltage V Logic Inputs –0.3 to +5.5 V Analog Inputs –0.3 to V Output Current, Source or Sink I Reference Output Current I Oscillator Charging Current 5.0 mA Power Dissipation (Plastic & Ceramic Package)

TA = +25°C (Note 2)

TC = +25°C (Note 3) Thermal Resistance Junction–to–Air R Thermal Resistance Junction–to–Case R Operating Junction Temperature T Storage Temperature Range T Lead Temperature (Soldering, 10 seconds) T

NOTES: 1.Values beyond which damage may occur.

2.Derate at 10 mW/°C for ambient temperatures above +50°C.

3.Derate at 16 mW/°C for case temperatures above +25°C.

(Note 1)

Rating Symbol Value Unit

ref

θJA θJC

stg

Solder

+40 Vdc +40 Vdc

±500 mA

50 mA

1000 2000

100 °C/W

60 °C/W

+150 °C

–55 to +125 °C

+300 °C

RECOMMENDED OPERATING CONDITIONS

Characteristics Symbol Min Max Unit

Supply Voltage V Collector Supply Voltage V Output Sink/Source Current

(Steady State)

(Peak) Reference Load Current I Oscillator Frequency Range f Oscillator Timing Resistor R Oscillator Timing Capacitor C Deadtime Resistor Range R Operating Ambient Temperature Range T

APPLICATION INFORMATION

Shutdown Options (See Block diagram, front page)

Since both the compensation and soft–start terminals (Pins 9 and 8) have current source pull–ups, either can readily accept a pull–down signal which only has to sink a maximum of 100 µA to turn off the outputs. This is subject to the added requirement of discharging whatever external capacitance may be attached to these pins.

An alternate approach is the use of the shutdown circuitry of Pin 10 which has been improved to enhance the available shutdown options. Activating this circuit by applying a positive signal on Pin 10 performs two functions: the PWM

latch is immediately set providing the fastest turn–off signal to the outputs; and a 150 µA current sink begins to discharge the external soft–start capacitor. If the shutdown command is short, the PWM signal is terminated without significant discharge of the soft–start capacitor, thus, allowing, for example, a convenient implementation of pulse–by–pulse current limiting. Holding Pin 10 high for a longer duration, however, will ultimately discharge this external capacitor, recycling slow turn–on upon release.

Pin 10 should not be left floating as noise pickup could

conceivably interrupt normal operation.

ref

osc

8.0 35 Vdc

T D A

4.5 35 Vdc

0 0

0 20 mA

0.1 400 kHz

2.0 150 kΩ

0.001 0.2 µF 0 500 Ω 0 +70 °C

±100 ±400

MOTOROLA ANALOG IC DEVICE DATA

SG3525A SG3527A

ELECTRICAL CHARACTERISTICS (V

Characteristics

= +20 Vdc, TA = T

low

to T

[Note 4], unless otherwise noted.)

high

Symbol Min Typ Max Unit

REFERENCE SECTION

Reference Output Voltage (TJ = +25°C) V Line Regulation (+8.0 V ≤ VCC ≤ +35 V) Reg Load Regulation (0 mA ≤ IL ≤ 20 mA) Reg T emperature Stability ∆V Total Output Variation

∆V

Includes Line and Load Regulation over Temperature

Short Circuit Current

= 0 V, TJ = +25°C)

ref

Output Noise Voltage (10 Hz ≤ f ≤ 10 kHz, TJ = +25°C) V

ref

line

load

/∆T – 20 – mV

ref

5.00 5.10 5.20 Vdc – 10 20 mV – 20 50 mV

4.95 – 5.25 Vdc

– 80 100 mA

– 40 200 µV

Long Term Stability (TJ = +125°C) (Note 5) S – 20 50 mV/khr

OSCILLATOR SECTION (Note 6, unless otherwise noted.)

Initial Accuracy (TJ = +25°C) – ±2.0 ±6.0 % Frequency Stability with Voltage

(+8.0 V ≤ VCC ≤ +35 V)

Frequency Stability with Temperature

Minimum Frequency (RT = 150 kΩ, CT = 0.2 µF) f Maximum Frequency (RT = 2.0 kΩ, CT = 1.0 nF) f

∆f

osc VCC

osc

min

max

– ±1.0 ±2.0 %

– ±0.3 – %

– 50 – Hz

400 – – kHz Current Mirror (IRT = 2.0 mA) 1.7 2.0 2.2 mA Clock Amplitude 3.0 3.5 – V Clock Width (TJ = +25°C) 0.3 0.5 1.0 µs Sync Threshold 1.2 2.0 2.8 V Sync Input Current (Sync Voltage = +3.5 V) – 1.0 2.5 mA

ERROR AMPLIFIER SECTION (VCM = +5.1 V)

Input Offset Voltage V Input Bias Current I Input Offset Current I DC Open Loop Gain (RL ≥ 10 MΩ) A Low Level Output Voltage V High Level Output Voltage V

IO IB IO

VOL

OL OH

– 2.0 10 mV – 1.0 10 µA – – 1.0 µA

60 75 – dB

– 0.2 0.5 V

3.8 5.6 – V Common Mode Rejection Ratio (+1.5 V ≤ VCM ≤ +5.2 V) CMRR 60 75 – dB Power Supply Rejection Ratio (+8.0 V ≤ VCC ≤ +35 V) PSRR 50 60 – dB

PWM COMPARATOR SECTION

Minimum Duty Cycle DC Maximum Duty Cycle DC Input Threshold, Zero Duty Cycle (Note 6) V Input Threshold, Maximum Duty Cycle (Note 6) V Input Bias Current I

NOTES: 4.T

= 0° for SG3525A, 3527A T

low

5.Since long term stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot.

6.Tested at f

= 40 kHz (RT = 3.6 kΩ, CT = 0.01 µF, RD = 0Ω).

osc

= +70°C for SG3525A, 3527A

high

min

max

th th

– – 0 %

45 49 – %

0.6 0.9 – V – 3.3 3.6 V – 0.05 1.0 µA

rms

MOTOROLA ANALOG IC DEVICE DATA

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