Motorola and the stylized M logo are trademarks of Motorola, Inc., registered in the U.S.
Patent and Trademark Office.
All other product or service names mentioned in this document are the property of their
respective owners.
Page 3
Safety Summary
Warning
The following general safety precautions must be observed during all phases of operation, service, and repair of
this equipment. Failure to comply with these precautions or with specific warnings elsewhere in this manual
could result in personal injury or damage to the equipment.
The safety precautions listed below represent warnings of certain dangers of which Motorola is aware. You, as
the user of the product, should follow these warnings and all other safety precautions necessary for the safe
operation of the equipment in your operating environment.
Ground the Instrument.
To minimize shock hazard, the equipment chassis and enclosure must be connected to an electrical ground. If the
equipment is supplied with a three-conductor AC power cable, the power cable must be plugged into an approved
three-contact electrical outlet, with the grounding wire (green/yellow) reliably connected to an electrical ground
(safety ground) at the power outlet. The power jack and mating plug of the power cable meet International
Electrotechnical Commission (IEC) safety standards and local electrical regulatory codes.
Do Not Operate in an Explosive Atmosphere.
Do not operate the equipment in any explosive atmosphere such as in the presence of flammable gases or fumes.
Operation of any electrical equipment in such an environment could result in an explosion and cause injury or
damage.
Keep Away From Live Circuits Inside the Equipment.
Operating personnel must not remove equipment covers. Only Factory Authorized Service Personnel or other
qualified service personnel may remove equipment covers for internal subassembly or component replacement
or any internal adjustment. Service personnel should not replace components with power cable connected. Under
certain conditions, dangerous voltages may exist even with the power cable removed. To avoid injuries, such
personnel should always disconnect power and discharge circuits before touching components.
Use Caution When Exposing or Handling a CRT.
Breakage of a Cathode-Ray Tube (CRT) causes a high-velocity scattering of glass fragments (implosion). To
prevent CRT implosion, do not handle the CRT and avoid rough handling or jarring of the equipment. Handling
of a CRT should be done only by qualified service personnel using approved safety mask and gloves.
Do Not Substitute Parts or Modify Equipment.
Do not install substitute parts or perform any unauthorized modification of the equipment. Contact your local
Motorola representative for service and repair to ensure that all safety features are maintained.
Observe Warnings in Manual.
Warnings, such as the example below, precede potentially dangerous procedures throughout this manual.
Instructions contained in the warnings must be followed. You should also employ all other safety precautions
which you deem necessary for the operation of the equipment in your operating environment.
Warnin g
To prevent serious injury or death from dangerous voltages, use extreme
caution when handling, testing, and adjusting this equipment and its
components.
Page 4
Flammability
!
Caution
!
Caution
Attention
!
Vorsic h t
!
All Motorola PWBs (printed wiring boards) are manufactured with a flammability rating
of 94V-0 by UL-recognized manufacturers.
EMI Caution
Caution
This equipment generates, uses and can radiate electromagnetic energy. It
may cause or be susceptible to electromagnetic interference (EMI) if not
installed and used with adequate EMI protection.
Lithium Battery Caution
This product contains a lithium battery to power the clock and calendar circuitry.
Caution
Caution
Caution
Danger of explosion if battery is replaced incorrectly. Replace battery only
with the same or equivalent type recommended by the equipment
manufacturer. Dispose of used batteries according to the manufacturer’s
instructions.
Il y a danger d’explosion s’il y a remplacement incorrect de la batterie.
Remplacer uniquement avec une batterie du même type ou d’un type
équivalent recommandé par le constructeur. Mettre au rebut les batteries
usagées conformément aux instructions du fabricant.
Explosionsgefahr bei unsachgemäßem Austausch der Batterie. Ersatz nur
durch denselben oder einen vom Hersteller empfohlenen Typ. Entsorgung
gebrauchter Batterien nach Angaben des Herstellers.
Page 5
CE Notice (European Community)
!
Warning
Warnin g
Motorola products with the CE marking comply with the EMC Directive (89/336/EEC).
Compliance with this directive implies conformity to the following European Norms:
EN55022 “Limits and Methods of Measurement of Radio Interference Characteristics
of Information Technology Equipment”; this product tested to Equipment Class A
EN55024 “Information technology equipment—Immunity characteristics—Limits and
methods of measurement”
Board products are tested in a representative system to show compliance with the above
mentioned requirements. A proper installation in a CE-marked system will maintain the
required EMC performance.
In accordance with European Community directives, a “Declaration of Conformity” has
been made and is available on request. Please contact your sales representative.
This is a Class A product. In a domestic environment, this product may
cause radio interference, in which case the user may be required to take
adequate measures.
Page 6
Notice
While reasonable efforts have been made to assure the accuracy of this document,
Motorola, Inc. assumes no liability resulting from any omissions in this document, or from
the use of the information obtained therein. Motorola reserves the right to revise this
document and to make changes from time to time in the content hereof without obligation
of Motorola to notify any person of such revision or changes.
Electronic versions of this material may be read online, downloaded for personal use, or
referenced in another document as a URL to the Motorola Web site. The text itself may not
be published commercially in print or electronic form, edited, translated, or otherwise
altered without the permission of Motorola, Inc.
It is possible that this publication may contain reference to or information about Motorola
products (machines and programs), programming, or services that are not available in your
country. Such references or information must not be construed to mean that Motorola
intends to announce such Motorola products, programming, or services in your country.
Limited and Restricted Rights Legend
If the documentation contained herein is supplied, directly or indirectly, to the U.S.
Government, the following notice shall apply unless otherwise agreed to in writing by
Motorola, Inc.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in
subparagraph (b)(3) of the Rights in Technical Data clause at DFARS 252.227-7013 (Nov.
1995) and of the Rights in Noncommercial Computer Software and Documentation clause
at DFARS 252.227-7014 (Jun. 1995).
Motorola, Inc.
Embedded Communications Computing
2900 South Diablo Way
Tempe, Arizona 85282
The MVME3100 Single-Board Computer Installation and Use manual provides the information
you will need to install and configure your MVME3100 single-board computer and MVME721
rear transition module (RTM). It provides specific preparation and installation information, and
data applicable to the board.
As of the printing date of this manual, the MVME3100 supports the models listed below.
MVME721-101Rear Transition Module, direct connect, 75mm, PIM socket for
PMC-1 I/O, four serial, 10/100/1000 Enet, 10/100 Enet
Overview of Contents
This manual is divided into the following chapters and appendices:
Chapter 1, Hardware Preparation and Installation, provides MVME3100 board preparation and
installation instructions, as well as ESD precautionary notes.
Chapter 2, Startup and Operation, provides the power-up procedure and identifies the switches
and indicators on the MVMEM3100.
Chapter 3, MOTLoad Firmware, describes the basic features of the MOTLoad firmware
product.
Chapter 4, Functional Description, describes the MVME3100 and the MVME721 RTM on a
block diagram level.
Chapter 5, Pin Assignments, provides pin assignments for various headers and connectors on
the MMVE3100 single-board computer.
Appendix A, Specifications, provides power requirements and environmental specifications.
Appendix B, Related Documentation, provides a listing of related Motorola manuals, vendor
documentation, and industry specifications.
MVME3100 Installation and Use (V3100A/IH1)
xv
Page 13
About This Manual
Comments and Suggestions
Motorola welcomes and appreciates your comments on its documentation. We want to know
what you think about our manuals and how we can make them better. Mail comments to:
Motorola, Inc.
Embedded Communications Computing
Reader Comments DW278
2900 S. Diablo Way
Tempe, Arizona 85282
You can also submit comments to the following e-mail address:
reader-comments@mcg.mot.com
In all your correspondence, please list your name, position, and company. Be sure to include
the title and part number of the manual and tell how you used it. Then tell us your feelings about
its strengths and weaknesses and any recommendations for improvements.
Conventions Used in This Manual
The following typographical conventions are used in this document:
bold
is used for user input that you type just as it appears; it is also used for commands, options
and arguments to commands, and names of programs, directories and files.
italic
is used for names of variables to which you assign values, for function parameters, and for
structure names and fields. Italic is also used for comments in screen displays and
examples, and to introduce new terms.
courier
is used for system output (for example, screen displays, reports), examples, and system
prompts.
<Enter>, <Return> or <CR>
represents the carriage return or Enter key.
Ctrl
represents the Control key. Execute control characters by pressing the Ctrl key and the
letter simultaneously, for example, Ctrl-d.
xvi
MVME3100 Installation and Use (V3100A/IH1)
Page 14
1Hardware Preparation and Installation
Introduction
This chapter contains the following information:
■Board preparation and installation instructions
■ESD precautionary notes
Description
The MVME3100 is a single-slot, single-board computer based on the MPC8540 PowerQUICC
III™ integrated processor. The MVME3100 provides serial ATA (sATA), USB 2.0, 2eSST
VMEbus interfaces, dual 64-bit/100 MHz PMC sites, up to 128MB of Flash, dual 10/100/1000
Ethernet, one 10/100 Ethernet, and five serial ports. This board supports front and rear I/O and
a single SODIMM module for DDR memory. Access to rear I/O is available with the MVME721
rear transition module (RTM).
1
Front-panel connectors on the MVME3100 board include: one RJ-45 connector for the Gigabit
Ethernet, one RJ-45 connector for the asynchronous serial port, one USB port with one type A
connector, one sATA port with one external sATA connector, and a combined reset and abort
switch.
Rear-panel connectors on the MVME721 board include: one RJ-45 connector for each of the
10/100 and 10/100/1000 BaseT Ethernets and four RJ-45 connectors for the asynchronous
serial ports. The RTM also provides two planar connectors for one PIM with rear I/O.
Getting Started
This section provides an overview of the steps necessary to install and power up the
MVME3100 and a brief section on unpacking and ESD precautions.
MVME3100 Installation and Use (V3100A/IH1)
1
Page 15
Chapter 1 Hardware Preparation and Installation
Overview of Startup Procedures
The following table lists the things you will need to do before you can use this board and tells
where to find the information you need to perform each step. Be sure to read this entire chapter,
including all Caution and Warning notes, before you begin.
Table 1-1. Startup Overview
What you need to do...Refer to...
Unpack the hardware.Unpacking Guidelines on page 2
Identify various components on the board.MVME3100 Layout on page 3
Install the MVME3100 board in a chassis.Installing the MVME3100 into a Chassis on page 8
Connect any other equipment you will be usingConnection to Peripherals on page 9
Verify the hardware is installed.Completing the Installation on page 10
Unpacking Guidelines
Unpack the equipment from the shipping carton. Refer to the packing list and verify that all items
are present. Save the packing material for storing and reshipping of equipment.
Caution
!
Caution
ESD
Use ESD
Wrist Strap
Caution
!
Caution
Note If the shipping carton is damaged upon receipt, request that the carrier’s agent be present
during the unpacking and inspection of the equipment.
Avoid touching areas of integrated circuitry; static discharge can damage circuits.
Motorola strongly recommends that you use an antistatic wrist strap and a conductive
foam pad when installing or upgrading a system. Electronic components, such as disk
drives, computer boards, and memory modules can be extremely sensitive to
electrostatic discharge (ESD). After removing the component from its protective
wrapper or from the system, place the component flat on a grounded, static-free
surface (and, in the case of a board, component side up). Do not slide the component
over any surface.
If an ESD station is not available, you can avoid damage resulting from ESD by wearing
an antistatic wrist strap (available at electronics stores) that is attached to an active
electrical ground. Note that a system chassis may not be grounded if it is unplugged.
Inserting or removing modules with power applied may result in damage to module
components.
2
MVME3100 Installation and Use (V3100A/IH1)
Page 16
Chapter 1 Hardware Preparation and Installation
Warning
Warning
Dangerous voltages, capable of causing death, are present in this equipment. Use
extreme caution when handling, testing, and adjusting.
Hardware Configuration
This section discusses certain hardware and software tasks that may need to be performed
prior to installing the board in a chassis.
To produce the desired configuration and ensure proper operation of the MVME3100, you may
need to carry out certain hardware modifications before installing the module.
Most options on the MVME3100 are software configurable. Configuration changes are made by
setting bits in control registers after the board is installed in a system.
Jumpers/switches are used to control those options that are not software configurable. These
jumper settings are described further on in this section. If you are resetting the board jumpers
from their default settings, it is important to verify that all settings are reset properly.
MVME3100 Layout
Figure 1-1 on page 4 illustrates the placement of the jumpers, headers, connectors, switches,
and various other components on the MVME3100.
There are two switch blocks which have user-selectable settings. Refer to Table 1-2, Table 1-3,
and Tab l e 1 -4 for switch settings. There is one switch on the MVME721. Refer to Table 1-5 and
Table 1-6 for switch settings.
MVME3100 Installation and Use (V3100A/IH1)
3
Page 17
Chapter 1 Hardware Preparation and Installation
The MVME3100 is factory tested and shipped with the configuration described in the following
sections.
Figure 1-1. MVME3100 Board Layout
PMC 1PMC 2
SATA 1
COM 1
G ENET 1
ABORT/RESET
USER 1 FAIL SPEED ACT
J25J24
U1014
U1049
J2
U1024
U1050
U1051
U1020
U1019
U1052
U1008
U1025
U1026
U1027
U1012
U21
U1003
U1007
U1012
J21
J23
J11
J13
U1010
J30J28
J22
P1
U1046
U1047
J12
J14
P2
U1000
J4
4381 0106
4
MVME3100 Installation and Use (V3100A/IH1)
Page 18
Configuration Switch (S4)
An 8-position SMT configuration switch controls the VME SCON setting, Flash bank writeprotect, and the safe start ENV settings. It also selects the Flash boot image. The default setting
on all switch positions is OFF.
Table 1-2. Configuration Switch (S4) Settings
Setting
SwitchPos.
Chapter 1 Hardware Preparation and Installation
NotesOFF (Factory Default)ON
SAFE_START1Normal ENV settings
should be used.
BOOT BLOCK
SELECT
FLASH BANK WP3Entire Flash is not write-
Reserved4
VME SCON
AUTO /MANUAL
MODE
MANUAL VME
SCON SELECT
sATA Mode7Legacy ModesATA ModeSets GD31244 to
2Flash memory map is
normal and boot block A is
selected.
protected.
5Auto-SCON mode.Manual SCON mode.Manual SCON mode
6Non-SCON mode.Always SCON mode.This switch is only
Safe ENV settings
should be used.
Boot block B is
selected and mapped
to the highest
address.
Flash is writeprotected.
This switch status is
readable from System
Status register 1, bit 5.
Software may check
this bit and act
accordingly.
works in conjunction
with the VME SCON
SELECT switch.
effective when the
VME SCON
AUTO/MANUAL
MODE switch is ON.
legacy or sATA mode
during reset
TRST SELECT8Normal MPC8540 TRST
mode where the board
HRESET will assert
TRST.
MVME3100 Installation and Use (V3100A/IH1)
Isolates the board
HRESET from TRST
and allows the board
to reset without
resetting the
MPC8540 JTAG/COP
interface.
This switch should
remain in the OFF
position unless a
MPC8540 emulator is
attached.
5
Page 19
Chapter 1 Hardware Preparation and Installation
Geographical Address Switch (S3)
The TSi148 VMEbus Status register provides the VMEbus geographical address of the
MVME3100. This switch reflects the inverted states of the geographical address signals.
Applications not using the 5-row backplane can use the geographical address switch to assign
a geographical address.
The onboard PMC sites may be configured to support 3.3V or 5.0V I/O PMC modules. To
support 3.3V or 5.0V I/O PMC modules, both PMC I/O keying pins must be installed in the
holes. If both keying pins are not in the same location or if the keying pins are not installed, the
PMC sites will not function. Note that setting the PMC I/O voltage to 5.0V forces the PMC sites
to operate in PCI mode instead of PCI-X mode. The default factory configuration is for 3.3V
PMC I/O voltage.
RTM SEEPROM Address Switch (S1)
A 4-position SMT configuration switch is located on the RTM to set the device address of the
RTM serial EEPROM device. The switch settings are defined in the following table.
Table 1-5. RTM EEPROM Address Switch Assignments
PositionSW1SW2SW3SW4
FunctionA0A1A2Not Used
OFF111
MVME3100 Installation and Use (V3100A/IH1)
7
Page 21
Chapter 1 Hardware Preparation and Installation
Table 1-6. EEPROM Address Settings
Device AddressA(2:0)SW1SW2SW3
$A0000ONONON
$A2001OFFONON
$A4010ONOFFON
$A6011OFFOFFON
$A8100ONONOFF
$AA (Factory)101OFFONOFF
$AC110ONOFFOFF
$AE111OFFOFFOFF
Note The RTM EEPROM address switches must be set for address $AA in order for this device
to be accessible by MotLoad.
Hardware Installation
Installing the MVME3100 into a Chassis
Use the following steps to install the MVME3100 into your computer chassis.
1. Attach an ESD strap to your wrist. Attach the other end of the ESD strap to an electrical ground
(refer to Unpacking Guidelines). The ESD strap must be secured to your wrist and to ground
throughout the procedure.
2. Remove any filler panel that might fill that slot.
3. Install the top and bottom edge of the MVME3100 into the guides of the chassis.
Warning
!
Warning
Only use injector handles for board insertion to avoid damage/deformation to the front
panel and/or PCB. Deformation of the front panel can cause an electrical short or other
board malfunction.
4. Ensure that the levers of the two injector/ejectors are in the outward position.
5. Slide the MVME3100 into the chassis until resistance is felt.
6. Simultaneously move the injector/ejector levers in an inward direction.
7. Verify that the MVME3100 is properly seated and secure it to the chassis using the two screws
located adjacent to the injector/ejector levers.
8. Connect the appropriate cables to the MVME3100.
8
MVME3100 Installation and Use (V3100A/IH1)
Page 22
To remove the board from the chassis, press the red locking tabs (IEEE handles only) and
reverse the procedure.
Connection to Peripherals
When the MVME3100 is installed in a chassis, you are ready to connect peripherals and apply
power to the board.
Figure 1-1 on page 4 shows the locations of the various connectors while Ta bl e 1 - 7 and Ta b le
1-8 list them for you. Refer to Chapter 5, Pin Assignments for the pin assignments of the
Verify that hardware is installed and the power/peripheral cables connected are appropriate for
your system configuration.
Replace the chassis or system cover, reconnect the system to the AC or DC power source, and
turn the equipment power on.
10
MVME3100 Installation and Use (V3100A/IH1)
Page 24
2Startup and Operation
Introduction
This chapter gives you information about the:
■Power-up procedure
■Runtime switches and indicators
Applying Power
After you verify that all necessary hardware preparation is complete and all connections are
made correctly, you can apply power to the system.
When you are ready to apply power to the MVME3100:
■Verify that the chassis power supply voltage setting matches the voltage present in the
country of use (if the power supply in your system is not auto-sensing)
2
■On powering up, the MVME3100 brings up the MOTLoad prompt, MVME3100>
Switches and Indicators
The MVME3100 board provides a single push button switch that provides both abort and reset
(ABT/RST) functions. When the switch is pressed for less than five seconds, an abort interrupt
is generated to the processor. If the switch is held for more than five seconds, a board hard reset
is generated. The board hard reset will reset the MPC8540, local PCI/PCI-X buses, Ethernet
PHYs, serial ports, Flash devices, and PLD(s). If the MVME3100 is configured as the VME
system controller, the VME bus and local TSi148 reset input are also reset.
The MVME3100 has four front-panel indicators. The following table describes these indicators:
Table 2-1. Front-Panel LED Status Indicators
FunctionLabelColorDescription
Board FailFAILYellowBoard has a failure. After Power On or reset,
User DefinedUSER 1GreenThis indicator is illuminated by software
this LED is ON until extinguished by
firmware or software.
assertion of its corresponding register bit.
MVME3100 Installation and Use (V3100A/IH1)
11
Page 25
Chapter 2 Startup and Operation
Table 2-1. Front-Panel LED Status Indicators (continued)
FunctionLabelColorDescription
GENET 1 Link /
Speed
GENET 1
Activity
SPEEDOffNo link
Yellow10/100Base-T operation
Green1000Base-T operation
ACTBlinking GreenActivity proportional to bandwidth utilization.
OffNo activity
The MVME721 rear transition module also has four status indicators. The following table
describes these indicators:
Table 2-2. MVME721 LED Status Indicators
FunctionLabelColorDescription
GENET 2 Link/SpeedSPEEDOffNo link
Yellow10/100Base-T operation
Green1000Base-T operation
GENET 2 ActivityACTBlinking GreenActivity proportional to bandwidth utilization.
OffNo activity
ENET 1 Link/SpeedSPEEDOffNo link
Yellow10/100Base-T operation
ENET 1 ActivityACTBlinking GreenActivity proportional to bandwidth utilization.
OffNo activity
Table 2-3. Additional Onboard Status Indicators
FunctionLabelColorDescription
User Defined
LED 2
User Defined
LED 3
Power Supply
Fail
sATA 0
Activity
DS7
(silkscreen)
DS8
(silkscreen)
DS1
(silkscreen)
DS4
(silkscreen)
GreenThis indicator is illuminated by software assertion of its
corresponding register bit.
GreenThis indicator is illuminated by software assertion of its
corresponding register bit.
RedThis indicator is illuminated to indicate a power supply fail
condition.
GreensATA 0 or 1 activity in legacy mode (default). sATA 0 activity in
DPA mode.
12
MVME3100 Installation and Use (V3100A/IH1)
Page 26
Chapter 2 Startup and Operation
Table 2-3. Additional Onboard Status Indicators (continued)
FunctionLabelColorDescription
sATA 1
Activity
MPC8540
Ready
GENET 1
Link Quality
GENET 2
Link Quality
DS5
(silkscreen)
DS3
(silkscreen)
DS2
(silkscreen)
DS3[Same as DS2}
GreenNo function in legacy mode (default). sATA 1 activity in DPA
GreenIndicates that the MPC8540 has completed the reset
Off
Slow Blink Green
Fast Blink Green
Green
mode.
operation and is not in a power-down state. The MPC8540
Ready is multiplexed with the MPC8540 TRIG_OUT so the
LED can be programmed to indicate one of three trigger
events based on the value in the MPC8540 TOSR register.
Extremely poor Signal to Noise ratio - cannot receive data
Poor SNR - receive errors detected
Fair SNR - close to data error threshold
Good SNR on link
MVME3100 Installation and Use (V3100A/IH1)
13
Page 27
3MOTLoad Firmware
Introduction
This chapter describes the basic features of the MOTLoad firmware product, designed by
Motorola as the next generation initialization, debugger, and diagnostic tool for highperformance embedded board products using state-of-the-art system memory controllers and
bridge chips, such as the MPC8540 processor.
In addition to an overview of the product, this chapter includes a list of standard MOTLoad
commands, the default VME and firmware settings that are changeable by the user, remote
start, and the alternate boot procedure.
Overview
The MOTLoad firmware package serves as a board power-up and initialization package, as well
as a vehicle from which user applications can be booted. A secondary function of the MOTLoad
firmware is to serve in some respects as a test suite providing individual tests for certain
devices.
3
MOTLoad is controlled through an easy-to-use, UNIX-like, command line interface. The
MOTLoad software package is similar to many end-user applications designed for the
embedded market, such as the real time operating systems currently available.
Refer to the MOTLoad Firmware Package User’s Manual, listed in Appendix B, Related
Documentation, for more details.
MOTLoad Implementation and Memory Requirements
The implementation of MOTLoad and its memory requirements are product specific. The
MVME3100 single-board computer (SBC) is offered with a range of memory (for example,
DRAM or flash). Typically, the smallest amount of on-board DRAM that a Motorola SBC has is
32MB. Each supported Motorola product line has its own unique MOTLoad binary image(s).
Currently the largest MOTLoad compressed image is less than 1MB in size.
MOTLoad Commands
MOTLoad supports two types of commands (applications): utilities and tests. Both types of
commands are invoked from the MOTLoad command line in a similar fashion. Beyond that,
MOTLoad utilities and MOTLoad tests are distinctly different.
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
15
Page 28
Chapter 3 MOTLoad Firmware
MOTLoad Utility Applications
The definition of a MOTLoad utility application is very broad. Simply stated, it is considered a
MOTLoad command, if it is not a MOTLoad test. Typically, MOTLoad utility applications are
applications that aid the user in some way (that is, they do something useful). From the
perspective of MOTLoad, examples of utility applications are: configuration, data/status
displays, data manipulation, help routines, data/status monitors, etc.
Operationally, MOTLoad utility applications differ from MOTLoad test applications in several
ways:
■Only one utility application operates at any given time (that is, multiple utility applications
cannot be executing concurrently)
■Utility applications may interact with the user. Most test applications do not.
MOTLoad Tests
A MOTLoad test application determines whether or not the hardware meets a given standard.
Test applications are validation tests. Validation is conformance to a specification. Most
MOTLoad tests are designed to directly validate the functionality of a specific SBC subsystem
or component. These tests validate the operation of such SBC modules as: dynamic memory,
external cache, NVRAM, real time clock, etc.
All MOTLoad tests are designed to validate functionality with minimum user interaction. Once
launched, most MOTLoad tests operate automatically without any user interaction. There are a
few tests where the functionality being validated requires user interaction (that is, switch tests,
interactive plug-in hardware modules, etc.). Most MOTLoad test results (error-data/status-data)
are logged, not printed. All MOTLoad tests/commands have complete and separate
descriptions (refer to the MOTLoad Firmware Package User’s Manual for this information).
All devices that are available to MOTLoad for validation/verification testing are represented by
a unique device path string. Most MOTLoad tests require the operator to specify a test device
at the MOTLoad command line when invoking the test.
A listing of all device path strings can be displayed through the devShow command. If an SBC
device does not have a device path string, it is not supported by MOTLoad and can not be
directly tested. There are a few exceptions to the device path string requirement, like testing
RAM, which is not considered a true device and can be directly tested without a device path
string. Refer to the devShow command description page in the MOTLoad Firmware Package
User’s Manual.
Most MOTLoad tests can be organized to execute as a group of related tests (a testSuite)
through the use of the testSuite command. The expert operator can customize their testing by
defining and creating a custom testSuite(s). The list of built-in and user-defined MOTLoad
testSuites, and their test contents, can be obtained by entering testSuite -d at the MOTLoad
prompt. All testSuites that are included as part of a product specific MOTLoad firmware
package are product specific. For more information, refer to the testSuite command description
page in the MOTLoad Firmware Package User’s Manual.
16
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
Page 29
Test results and test status are obtained through the testStatus, errorDisplay, and taskActive
commands. Refer to the appropriate command description page in the MOTLoad Firmware
Package User’s Manual for more information.
Using MOTLoad
Interaction with MOTLoad is performed via a command line interface through a serial port on
the SBC, which is connected to a terminal or terminal emulator (for example, Window’s
Hypercomm). The default MOTLoad serial port settings are: 9600 baud, 8 bits, no parity.
Command Line Interface
The MOTLoad command line interface is similar to a UNIX command line shell interface.
Commands are initiated by entering a valid MOTLoad command (a text string) at the MOTLoad
command line prompt and pressing the carriage-return key to signify the end of input. MOTLoad
then performs the specified action. An example of a MOTLoad command line prompt is shown
below. The MOTLoad prompt changes according to what product it is used on (for example,
MVME6100, MVME3100).
Chapter 3 MOTLoad Firmware
Example:
MVME3100>
If an invalid MOTLoad command is entered at the MOTLoad command line prompt, MOTLoad
displays a message that the command was not found.
Example:
MVME3100> mytest
"mytest" not found
MVME3100>
If the user enters a partial MOTLoad command string that can be resolved to a unique valid
MOTLoad command and presses the carriage-return key, the command is executed as if the
entire command string had been entered. This feature is a user-input shortcut that minimizes
the required amount of command line input. MOTLoad is an ever changing firmware package,
so user-input shortcuts may change as command additions are made.
Example:
MVME3100> version
Copyright: Motorola Inc.1999-2005, All Rights Reserved
MOTLoad RTOS Version 2.0, PAL Version 1.0 RM01
Mon Aug 29 15:24:13 MST 2005
MVME3100>
Example:
MVME3100> ver
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Chapter 3 MOTLoad Firmware
Copyright: Motorola Inc.1999-2005, All Rights Reserved
MOTLoad RTOS Version 2.0, PAL Version 1.0 RM01
Mon Aug 29 15:24:13 MST 2005
MVME3100>
If the partial command string cannot be resolved to a single unique command, MOTLoad
informs the user that the command was ambiguous.
Example:
MVME3100> te
"te" ambiguous
MVME3100>
Command Line Help
Each MOTLoad firmware package has an extensive, product-specific help facility that can be
accessed through the help command. The user can enter help at the MOTLoad command line
to display a complete listing of all available tests and utilities.
Example
MVME3100> help
For help with a specific test or utility the user can enter the following at the MOTLoad prompt:
help <command_name>
The help command also supports a limited form of pattern matching. Refer to the help
command page.
-a Ph: Address to Start (Default = Dynamic Allocation)
-b Ph: Block Size (Default = 16KB)
-i Pd: Iterations (Default = 1)
-n Ph: Number of Bytes (Default = 1MB)
-t Ph: Time Delay Between Blocks in OS Ticks (Default = 1)
-v O : Verbose Output
MVME3100>
Command Line Rules
18
There are a few things to remember when entering a MOTLoad command:
■Multiple commands are permitted on a single command line, provided they are separated
by a single semicolon (;)
■Spaces separate the various fields on the command line (command/arguments/options)
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
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■The argument/option identifier character is always preceded by a hyphen (-) character
■Options are identified by a single character
■Option arguments immediately follow (no spaces) the option
■All commands, command options, and device tree strings are case sensitive
Example:
MVME3100> flashProgram –d/dev/flash0 –n00100000
For more information on MOTLoad operation and function, refer to the MOTLoad Firmware
Package User’s Manual.
MOTLoad Command List
The following table provides a list of all current MOTLoad commands. Products supported by
MOTLoad may or may not employ the full command set. Typing help at the MOTLoad command
prompt will display all commands supported by MOTLoad for a given product.
Chapter 3 MOTLoad Firmware
Table 3-1. MOTLoad Commands
CommandDescription
asOne-Line Instruction Assembler
bcb bch bcwBlock Compare Byte/Halfword/Word
bdTempShowDisplay Current Board Temperature
bfb bfh bfwBlock Fill Byte/Halfword/Word
blkCpBlock Copy
blkFmtBlock Format
blkRdBlock Read
blkShowBlock Show Device Configuration Data
blkVeBlock Verify
blkWrBlock Write
bmb bmh bmwBlock Move Byte/Halfword/Word
brAssign/Delete/Display User-Program Break-Points
bsb bsh bswBlock Search Byte/Halfword/Word
bvb bvh bvwBlock Verify Byte/Halfword/Word
cdDirISO9660 File System Directory Listing
cdGetISO9660 File System File Load
clearClear the Specified Status/History Table(s)
cmTurns on Concurrent Mode
csb csh cswCalculates a Checksum Specified by Command-line Options
pciSpaceDisplay PCI Device Address Space Allocation
pingPing Network Host
portSetPort Set
portShowDisplay Port Device Configuration Data
rdUser Program Register Display
resetReset System
rsUser Program Register Set
setSet Date and Time
sromReadSROM Read
sromWriteSROM Write
staSymbol Table Attach
stlSymbol Table Lookup
stopStop Date and Time (Power-Save Mode)
taskActiveDisplay the Contents of the Active Task Table
tcTrace (Single-Step) User Program
tdTrace (Single-Step) User Program to Address
testDiskTest Disk
testEnetPtPEthernet Point-to-Point
testNvramRdNVRAM Read
testNvramRdWrNVRAM Read/Write (Destructive)
testRamRAM Test (Directory)
testRamAddrRAM Addressing
testRamAltRAM Alternating
testRamBitToggleRAM Bit Toggle
testRamBounceRAM Bounce
testRamCodeCopyRAM Code Copy and Execute
testRamEccMonitorMonitor for ECC Errors
testRamMarchRAM March
testRamPatternsRAM Patterns
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Chapter 3 MOTLoad Firmware
Table 3-1. MOTLoad Commands (continued)
CommandDescription
testRamPermRAM Permutations
testRamQuickRAM Quick
testRamRandomRAM Random Data Patterns
testRtcAlarmRTC Alarm
testRtcResetRTC Reset
testRtcRollOverRTC Rollover
testRtcTickRTC Tick
testSerialExtLoopSerial External Loopback
testSeriallntLoopSerial Internal Loopback
testStatusDisplay the Contents of the Test Status Table
testSuiteExecute Test Suite
testSuiteMakeMake (Create) Test Suite
testThermoOpThermometer Temp Limit Operational Test
testThermoQThermometer Temp Limit Quick Test
testThermoRangeTests That Board Thermometer is Within Range
testWatchdogTimerTests the Accuracy of the Watchdog Timer Device
tftpGetTFTP Get
tftpPutTFTP Put
timeDisplay Date and Time
transparentModeTransparent Mode (Connect to Host)
tsShowDisplay Task Status
upLoadUp Load Binary Data from Target
versionDisplay Version String(s)
vmeCfgManages user specified VME configuration parameters
vpdDisplayVPD Display
vpdEditVPD Edit
waitProbeWait for I/O Probe to Complete
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Default VME Settings
As shipped from the factory, the MVME3100 has the following VME configuration programmed
via Global Environment Variables (GEVs) for the Tsi148 VME controller. The firmware allows
certain VME settings to be changed in order for the user to customize the environment. The
following is a description of the default VME settings that are changeable by the user. For more
information, refer to the MOTLoad User’s Manual and Tundra’s Tsi148 User Manual, listed in
Appendix B, Related Documentation.
■MVME3100> vmeCfg –s –m
Displaying the selected Default VME Setting
- interpreted as follows:
VME PCI Master Enable [Y/N] = Y
MVME3100>
The PCI Master is enabled.
■MVME3100> vmeCfg –s –r234
Displaying the selected Default VME Setting
- interpreted as follows:
VMEbus Master Control Register = 00000003
MVME3100>
The VMEbus Master Control Register is set to the default (RESET) condition.
Chapter 3 MOTLoad Firmware
■MVME3100> vmeCfg –s –r238
Displaying the selected Default VME Setting
- interpreted as follows:
VMEbus Control Register = 00000008
MVME3100>
The VMEbus Control Register is set to a Global Timeout of 2048 μseconds.
■MVME3100> vmeCfg –s –r414
Displaying the selected Default VME Setting
- interpreted as follows:
CRG Attribute Register = 00000000
CRG Base Address Upper Register = 00000000
CRG Base Address Lower Register = 00000000
MVME3100>
The CRG Attribute Register is set to the default (RESET) condition.
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Chapter 3 MOTLoad Firmware
Inbound window 0 (ITAT0) is not enabled; Virtual FIFO at 256 bytes, 2eSST timing at
SST320, respond to 2eSST, 2eVME, MBLT, and BLT cycles, A32 address space, respond
to Supervisor, User, Program, and Data cycles. Image maps from 0x00000000 to
0x1FFF0000 on the VMbus, translates 1x1 to the PCI-X bus (thus 1x1 to local memory). To
enable this window, set bit 31 of ITAT0 to 1.
Note For Inbound Translations, the Upper Translation Offset Register needs to be set to
0xFFFFFFFF to ensure proper translations to the PCI-X Local Bus.
Outbound window 1 (OTAT1) is enabled, 2eSST timing at SST320, transfer mode of 2eSST,
A32/D32 Supervisory access. The window accepts transfers on the PCI-X Local Bus from
0x91000000-0xAFFF0000 and translates them onto the VMEbus using an offset of
0x70000000, thus an access to 0x91000000 on the PCI-X Local Bus becomes an access
to 0x01000000 on the VMEbus.
Outbound window 2 (OTAT2) is enabled, 2eSST timing at SST320, transfer mode of SCT,
A24/D32 Supervisory access. The window accepts transfers on the PCI-X Local Bus from
0xB0000000-0xB0FF0000 and translates them onto the VMEbus using an offset of
0x40000000, thus an access to 0xB0000000 on the PCI-X Local Bus becomes an access
to 0xF0000000 on the VMEbus.
Outbound window 3 (OTAT3) is enabled, 2eSST timing at SST320, transfer mode of SCT,
A16/D32 Supervisory access. The window accepts transfers on the PCI-X Local Bus from
0xB3FF0000-0xB3FF0000 and translates them onto the VMEbus using an offset of
0x4C000000, thus an access to 0xB3FF0000 on the PCI-X Local Bus becomes an access
to 0xFFFF0000 on the VMEbus.
Outbound window 7 (OTAT7) is enabled, 2eSST timing at SST320, transfer mode of SCT,
CR/CSR Supervisory access. The window accepts transfers on the PCI-X Local Bus from
0xB1000000-0xB1FF0000 and translates them onto the VMEbus using an offset of
0x4F000000, thus an access to 0xB1000000 on the PCI-X Local Bus becomes an access
to 0x00000000 on the VMEbus.
Firmware Settings
The following sections provide additional information pertaining to the VME firmware settings
of the MVME3100. A few VME settings are controlled by hardware jumpers while the majority
of the VME settings are managed by the firmware command utility vmeCfg.
CR/CSR Settings
The CR/CSR base address is initialized to the appropriate setting based on the Geographical
address; that is, the VME slot number. See the VME64 Specification and the VME64
Extensions for details. As a result, a 512K byte CR/CSR area can be accessed from the
VMEbus using the CR/CSR AM code.
Displaying VME Settings
To display the changeable VME setting, type the following at the firmware prompt:
■To display Master Enable state
vmeCfg –s –m
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Chapter 3 MOTLoad Firmware
■To display selected Inbound Window state
vmeCfg –s –i(0 - 7)
■To display selected Outbound Window state
vmeCfg –s –o(0 - 7)
■To display PCI Miscellaneous Register state
vmeCfg –s –r184
■To display Special PCI Target Image Register state
vmeCfg –s –r188
■To display Master Control Register state
vmeCfg –s –r400
■To display Miscellaneous Control Register state
vmeCfg –s –r404
■To display User AM Codes Register state
vmeCfg –s –r40C
■To display VMEbus Register Access Image Control Register state
vmeCfg –s –rF70
Editing VME Settings
To edit the changeable VME setting, type the following at the firmware prompt:
■Edits Master Enable state
vmeCfg –e –m
■Edits selected Inbound Window state
vmeCfg –e –i(0 - 7)
■Edits selected Outbound Window state
vmeCfg –e –o(0 - 7)
■Edits PCI Miscellaneous Register state
vmeCfg –e –r184
■Edits Special PCI Target Image Register state
vmeCfg –e –r188
■Edits Master Control Register state
vmeCfg –e –r400
■Edits Miscellaneous Control Register state
vmeCfg –e –r404
26
■Edits User AM Codes Register state
vmeCfg –e –r40C
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■Edits VMEbus Register Access Image Control Register state
vmeCfg –e –rF70
Deleting VME Settings
To delete the changeable VME setting (restore default value), type the following at the firmware
prompt:
■Deletes Master Enable state
vmeCfg –d –m
■Deletes selected Inbound Window state
vmeCfg –d –i(0 - 7)
■Deletes selected Outbound Window state
vmeCfg –d –o(0 - 7)
■Deletes PCI Miscellaneous Register state
vmeCfg –d –r184
■Deletes Special PCI Target Image Register state
Chapter 3 MOTLoad Firmware
vmeCfg –d –r188
■Deletes Master Control Register state
vmeCfg –d –r400
■Deletes Miscellaneous Control Register state
vmeCfg –d –r404
■Deletes User AM Codes Register state
vmeCfg –d –r40C
■Deletes VMEbus Register Access Image Control Register state
vmeCfg –d –rF70
Restoring Default VME Settings
To restore all of the changeable VME setting back to their default settings, type the following at
the firmware prompt:
vmeCfg –z
Remote Start
As described in the MOTLoad Firmware Package User’s Manual, listed in Appendix B, Related
Documentation, remote start allows the user to obtain information about the target board,
download code and/or data, modify memory on the target, and execute a downloaded program.
These transactions occur across the VMEbus in the case of the MVME3100. MOTLoad uses
one of four mailboxes in the Tsi148 VME controller as the inter-board communication address
(IBCA) between the host and the target.
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Chapter 3 MOTLoad Firmware
CR/CSR slave addresses configured by MOTLoad are assigned according to the installation
slot in the backplane, as indicated by the VME64 Specification. For reference, the following
values are provided:
Slot PositionCS/CSR Starting Address
10x0008.0000
20x0010.0000
30x0018.0000
40x0020.0000
50x0028.0000
60x0030.0000
70x0038.0000
80x0040.0000
90x0048.0000
A0x0050.0000
B0x0058.0000
C0x0060.0000
For further details on CR/CSR space, please refer to the VME64 Specification, listed in
Appendix B, Related Documentation.
The MVME3100 uses a TSi148 for its PCI/X-to-VME bus bridge. The offsets of the mailboxes
in the TSi148 are defined in the TSi148 VMEBus PCI/X-to-VME User Manual, listed in
Appendix B, Related Documentation, but are noted here for reference:
Mailbox 0 is at offset 7f610 in the CR/CSR space
Mailbox 1 is at offset 7f614 in the CR/CSR space
Mailbox 2 is at offset 7f618 in the CR/CSR space
Mailbox 3 is at offset 7f61C in the CR/CSR space
The selection of the mailbox used by remote start on an individual MVME3100 is determined
by the setting of a global environment variable (GEV). The default mailbox is zero. Another GEV
controls whether remote start is enabled (default) or disabled. Refer to the Remote Start
appendix in the MOTLoad Firmware Package User’s Manual for remote start GEV definitions.
The MVME3100’s IBCA needs to be mapped appropriately through the master’s VMEbus
bridge. For example, to use remote start using mailbox 0 on an MVME3100 installed in slot 5,
the master would need a mapping to support reads and writes of address 0x002ff610 in VME
CR/CSR space (0x280000 + 0x7f610).
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Chapter 3 MOTLoad Firmware
Alternate Boot Images and Safe Start
Some later versions of MOTLoad support Alternate Boot Images and a Safe Start recovery
procedure. If Safe Start is available on the MVME3100, Alternate Boot Images are supported.
With Alternate Boot Image support, the bootloader code in the boot block examines the upper
8MB of the flash bank for Alternate Boot images. If an image is found, control is passed to the
image.
Firmware Startup Sequence Following Reset
The firmware startup sequence following reset of MOTLoad is to:
■Initialize cache, MMU, FPU, and other CPU internal items
■Initialize the memory controller
■Search the active flash bank, possibly interactively, for a valid POST image. If found, the
POST images executes. Once completed, the POST image returns and startup continues.
■Search the active flash bank, possibly interactively, for a valid USER boot image. If found,
the USER boot image executes. A return to the boot block code is not anticipated.
■If a valid USER boot image is not found, search the active flash bank, possibly interactively,
for a valid Alternate MOTLoad boot image; anticipated to be an upgrade of Alternate
MOTLoad firmware. If found, the image is executed. A return to the boot block code is not
anticipated.
■Execute the recovery image of the firmware in the boot block if no valid USER or alternate
MOTLoad image is found
During startup, interactive mode may be entered by either setting the Safe Start jumper/switch
or by sending an <ESC> to the console serial port within five seconds of the board reset. During
interactive mode, the user has the option to display locations at which valid boot images were
discovered, specify which discovered image is to be executed, or specify that the recovery
image in the boot block of the active Flash bank is to be executed.
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Chapter 3 MOTLoad Firmware
Firmware Scan for Boot Image
The scan is performed by examining each 1MB boundary for a defined set of flags that identify
the image as being Power On Self Test (POST), USER, or Alternate MOTLoad. POST is a userdeveloped Power On Self Test that would perform a set of diagnostics and then return to the
bootloader image. USER would be a boot image, such as the VxWorks bootrom, which would
perform board initialization. A bootable VxWorks kernel would also be a USER image. Boot
images are not restricted to being MB or less in size; however, they must begin on a 1MB
boundary within the 8MB of the scanned flash bank. The Flash Bank Structure is shown below:
AddressUsage
0xFFF00000 to 0xFFFFFFFFBoot block. Recovery code
0xFFE00000 to 0XFFFFFFFFReserved.
0xFFD00000 to 0xFFDFFFFFFirst possible alternate image
0xFFC00000 to 0xFFCFFFFFSecond possible alternate image
....Alternate boot images
(MOTLoad update image)
(Bank B / Bank A actual)
(Bank B / Bank A actual)
0xFF899999 to 0xFF8FFFFFBottom of Flash
(Flash size varies per product)
The scan is performed downwards beginning at the location of the first possible alternate image
and searches first for POST, then USER, and finally Alternate MOTLoad images. In the case of
multiple images of the same type, control is passed to the first image encountered in the scan.
Safe Start, whether invoked by hitting ESC on the console within the first five seconds following
power-on reset or by setting the Safe Start jumper, interrupts the scan process. The user may
then display the available boot images and select the desired image. The feature is provided to
enable recovery in cases when the programmed Alternate Boot Image is no longer desired. The
following output is an example of an interactive Safe Start:
ABCDEInteractive Boot Mode Entered
boot> ?
Interactive boot commands:
’d’:show directory of alternate boot images
’c’:continue with normal startup
’q’:quit without executing any alternate boot image
Copyright Motorola Inc. 1999-2004, All Rights Reserved
MOTLoad RTOS Version 2.0, PAL Version 0.b EA02
30
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...
MVME3100>
Valid Boot Images
Valid boot images whether POST, USER, or Alternate MOTLoad, are located on 1MB
boundaries within flash. The image may exceed 1MB in size. An image is determined valid
through the presence of two "valid image keys" and other sanity checks. A valid boot image
begins with a structure as defined in the following table:
NameTy peSizeNotes
UserDefinedunsigned integer8User defined
ImageKey 1unsigned integer10x414c5420
ImageKey 2unsigned integer10x424f4f54
ImageChecksumunsigned integer1Image checksum
ImageSizeunsigned integer1Must be a multiple of 4
ImageNameunsigned character20User defined
Chapter 3 MOTLoad Firmware
ImageRamAddressunsigned integer1RAM address
ImageOffsetunsigned integer1Offset from header start to entry
ImageFlagsunsigned integer1Refer to MOTLoad Image Flags on page 32
ImageVersionunsigned integer1User defined
Reservedunsigned integer8Reserved for expansion
Checksum Algorithm
The checksum algorithm is a simple unsigned word add of each word (4 byte) location in the
image. The image must be a multiple of 4 bytes in length (word-aligned). The content of the
checksum location in the header is not part of the checksum calculation. The calculation
assumes the location to be zero. The algorithm is implemented using the following code:
Unsigned int checksum(
Unsigned int *startPtr,/* starting address */
Unsigned int endPtr/* ending address */
) {
unsigned int checksum=0;
while (startPtr < endPtr) {
checksum += *startPtr;
startPtr++;
}
return(checksum);
}
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Chapter 3 MOTLoad Firmware
MOTLoad Image Flags
The image flags of the header define various bit options that control how the image will be
executed.
Table 3-2. MOTLoad Image Flags
NameValu eInterpretation
COPY_TO_RAM0x00000001Copy image to RAM at ImageRamAddress
IMAGE_MCG0x00000002Alternate MOTLoad image
IMAGE_POST0x00000004POST image
DONT_AUTO_RUN0x00000008Image not to be executed
COPY_TO_RAM
If set, this flag indicates that the image is to be copied to RAM at the address specified in
the header before control is passed. If not set, the image will be executed in Flash. In both
instances, control will be passed at the image offset specified in the header from the base
of the image.
before execution
IMAGE_MCG
If set, this flag defines the image as being an Alternate MOTLoad, as opposed to USER,
image. This bit should not be set by developers of alternate boot images.
IMAGE_POST
If set, this flag defines the image as being a power-on self-test image. This bit flag is used
to indicate that the image is a diagnostic and should be run prior to running either USER or
MCG boot images. POST images are expected, but not required, to return to the boot block
code upon completion.
DONT_AUTO_RUN
If set, this flag indicates that the image is not to be selected for automatic execution. A user,
through the interactive command facility, may specify the image to be executed.
Note MOTLoad currently uses an Image Flag value of 0x3, which identifies itself as an
Alternate MOTLoad image that executes from RAM. MOTLoad currently does not support
execution from flash.
USER Images
32
These images are user-developer boot code; for example, a VxWorks bootrom image. Such
images may expect the system software state to be as follows upon entry:
■The MMU is disabled.
■L1 instruction cache has been initialized and is enabled.
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Chapter 3 MOTLoad Firmware
■L1 data cache has been initialized (invalidated) and is disabled.
■L2 cache is disabled.
■L3 cache is disabled.
■RAM has been initialized and is mapped starting at CPU address 0.
■If RAM ECC or parity is supported, RAM has been scrubbed of ECC or parity errors.
■The active Flash bank (boot) is mapped from the upper end of the address space.
■If specified by COPY_TO_RAM, the image has been copied to RAM at the address
specified by ImageRamAddress.
■CPU register R1 (the stack pointer) has been initialized to a value near the end of RAM.
■CPU register R3 is added to the following structure:
typedef struct altBootData {
unsigned int ramSize;/* board’s RAM size in MB */
void flashPtr;/* ptr to this image in flash */
char boardType[16];/* name string, eg MVME3100 */
void globalData;/* 16K, zeroed, user defined */
unsigned int reserved[12];
} altBootData_t;
Alternate Boot Data Structure
The globalData field of the alternate boot data structure points to an area of RAM which was
initialized to zeroes by the boot loader. This area of RAM is not cleared by the boot loader after
execution of a POST image, or other alternate boot image, is executed. It is intended to provide
a user a mechanism to pass POST image results to subsequent boot images.
The boot loader performs no other initialization of the board than that specified prior to the
transfer of control to either a POST, USER, or Alternate MOTLoad image. Alternate boot
images need to initialize the board to whatever state the image may further require for its
execution.
POST images are expected, but not required, to return to the boot loader. Upon return, the boot
loader proceeds with the scan for an executable alternate boot image. POST images that return
control to the boot loader must ensure that upon return, the state of the board is consistent with
the state that the board was in at POST entry. USER images should not return control to the
boot loader.
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4Functional Description
This chapter describes the MVME3100 and the MVME721 rear transition module (RTM) on a
block diagram level.
Features
The following tables list the features of the MVME3100 and its RTM.
Table 4-1. MVME3100 Features Summary
FeatureDescription
4
Processor/Host
Controller/Memory
Controller
System Memory– One SODIMM socket
I2C Interface– One 8KB VPD serial EEPROM
Flash– 128MB soldered Flash with two alternate 1MB boot sectors
– Up to DDR333, ECC
– One or two banks of memory on a single SODIMM
– Two 64KB user configuration serial EEPROMs
– One real-time clock (RTC) with removable battery
– One temperature sensor
– Interface to SPD(s) on SODIMM and P2 for RTM VPD
selectable via a hardware switch
– Hardware switch or software bit write protection for entire logical
bank
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Chapter 4 Functional Description
Table 4-1. MVME3100 Features Summary (continued)
FeatureDescription
PCI InterfaceBus A:
I/O– One front panel RJ45 connector with integrated LEDs for front I/O:
– 66 MHz PCI or PCI-X mode (switch selectable)
– One TSi148 VMEbus controller
– One serial ATA (sATA) controller
– One MPC8540
– Two PCI6520 PCI-X-to-PCI-X bridges (primary side)
Bus B:
– 33/66/100 MHz PCI/PCI-X (PCI 2.2 and PCI-X 1.0b compliant)
– Two +3.3V/5V selectable VIO, 64-bit, single-wide PMC sites or
one double-wide PMC site (PrPMC ANSI/VITA 32-2003 and PCI-X
Auxiliary ANSI/VITA 39-2003 compliant)
– One PCI6520 PCI-X-to-PCI-X bridge (secondary side)
Bus C (-1263 version):
– 33 MHz PCI (PCI 2.2 compliant)
– One USB 2.0 controller
– One PCI expansion connector for interface to PMCspan
– One PCI6520 PCI-X-to-PCI-X bridge (secondary side)
one serial channel
– One front panel RJ45 connector with integrated LEDs for front I/O:
one 10/100/1000 Ethernet channel
– One front panel external sATA data connector for front I/O: one
sATA channel
– One front panel USB Type A upright receptacle for front I/O: one
USB 2.0 channel (-1263 version)
– PMC site 1 front I/O and rear P2 I/O
– PMC site 2 front I/O
Serial ATA– One four-channel sATA controller: one channel for front-panel I/O,
one channel for planar I/O, one channel for future rear P0 I/O, and
one channel is not used
– One planar data connector and one planar power connector for
an interface to the sATA hard disk drive
USB (-1263 version)– One four-channel USB 2.0 controller: one channel for front panel
Ethernet– Two 10/100/1000 MPC8540 Ethernet channels for front-panel I/O
and rear P2 I/O
– One 10/100 MPC8540 Ethernet channel for rear P2 I/O
Serial Interface– One 16550-compatible, 9.6 to 115.2 KBAUD, MPC8540,
asynchronous serial channel for front-panel I/O
– One quad UART controller to provide four 16550-compatible, 9.6
to 115.2 KBAUD, asynchronous serial channels for rear P2 I/O
Timers– Four 32-bit MPC8540 timers
– Four 32-bit timers in a PLD
Watchdog Timer– One MPC8540 watchdog timer
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Chapter 4 Functional Description
Table 4-1. MVME3100 Features Summary (continued)
FeatureDescription
VME Interface– VME64 (ANSI/VITA 1-1994) compliant
– VME64 Extensions (ANSI/VITA 1.1-1997) compliant
– 2eSST (ANSI/VITA 1.5-2003) compliant
– VITA 41.0, version 0.9 compliant
– Two five-row P1 and P2 backplane connectors
– One TSi148 VMEbus controller
Form Factor– Standard 6U VME
Miscellaneous– One front-panel reset/abort switch
– Four front-panel status indicators: 10/100/1000 Ethernet
link/speed and activity, board fail, and user software controlled LED
– Six planar status indicators: one power supply status LED, two
user software controlled LEDs, three sATA activity LEDs (one per
channel)
– One standard 16-pin COP header
– Boundary scan support
– Switches for VME geographical addressing in a three-row
backplane
Software Support– VxWorks operating system
– Linux operating system
Table 4-2. MVME721 RTM Features Summary
FeatureDescription
I/O– One five-row P2 backplane connector for serial and Ethernet I/O
passed from the MVME3100
– Four RJ-45 connectors for rear-panel I/O: four asynchronous
serial channels
– Two RJ-45 connectors with integrated LEDs for rear panel I/O:
one 10/100/1000 Ethernet channel and one 10/100 Ethernet
channel
– One PIM site with rear-panel I/O
Miscellaneous– Four status indicators: 10/100/1000 and 10/100 Ethernet
link/speed and activity LEDs
MVME3100 Installation and Use (V3100A/IH1)
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Chapter 4 Functional Description
Block Diagrams
Figure 4-1 shows a block diagram of the overall board architecture and Figure 4-2 shows a block
diagram of the MVME721 rear transition module architecture.
Figure 4-1. MVME3100 Block Diagram
Front Panel
RST/ABORT
COM1
RJ45
U
S
sATA
B
PMC 1 Front IO
GigE
RJ45
PMC 2 Front IO
PHY
5461
GigE 2
4377 0106
PHY
5461
XCVR
RS232
PHY
5221
Serial Port 0
Serial Ports 1-4
De-pop in -1152
PCI 33 MHz
XCVR
RS232
GigE 1
GigE 2
10/100
P2P
PCI6520
Bus C
USB
uPD720101
166 MHz Memory Bus
DUART
TSEC1
TSEC2
FECLBC
PMCSpan
USB 2USB 1
DDR MC
MPC8540
Processor
833 MHz
PCIX
Bus A
PCI-X 66MHz
P2P
PCI6520
Bus B
PCI-X 66/100 MHz
PCI 33/66 MHz
PMC 1PMC 2
VME Bus
I2C BusUSB 2PMC 1 Jn4 IOCOM2 - COM510/100sATA 2
SODIMM - Up to
1GB DDR Memory
I2C
Device
16C554
sATA 0
2
I
Bus
Quart
GD31244
C Bus
Timers/Regs
sATA
User
128KB
CPLD
Decode
Distribution
sATA 1
Planar
Connector
P2P0P1
Future Option
Flash
128MB
Clock
Reset
Control
Power
Supplies
RTC
DS1375
RTC
DS1621
TSI148
VME
XCVR
22501
VPD
8KB
38
MVME3100 Installation and Use (V3100A/IH1)
Page 51
Figure 4-2. MVME721 RTM Block Diagram
Rear Panel
Future Option
Chapter 4 Functional Description
PMC 1 Jn4 10
4390 0106
Processor
The MVME3100 supports the MPC8540 processor. The processor core frequency runs at 833
or 667 MHz. The MPC8540 has integrated 256KB L2 cache.
VPD
8K8
I2C Bus
PIM 10
PIM
U
S
sATA
B
P2
GigE 2
GigE
RJ45
10/100
Serial Port 4
10/100
RJ45
Serial Port 3
Serial Port 2
Serial Port 1
Serial
RJ45
USB 2
Future Option
Serial
RJ45
sATA 3
P0
Serial
RJ45
Serial
RJ45
System Memory
The MPC8540 provides one standard DDR SDRAM SODIMM socket. This socket supports
standard single or dual bank, unbuffered, SSTL-2 DDR-I, JESD8-9B compliant, SODIMM
module with ECC. The MPC8540 DDR memory interface supports up to 166 MHz (333 MHz
data rate) operation.
Local Bus Interface
The MVME3100 uses the MPC8540 local bus controller (LBC) for access to on-board Flash and
I/O registers. The LBC has programmable timing modes to support devices of different access
times, as well as device widths of 8, 16, and 32 bits.
The MVME3100 uses the LBC in GPCM (general purpose chip select machine) mode to
interface to two physical banks of on-board Flash, an on-board quad UART (QUART), on-board
32-bit timers, and the System Control/Status registers. Refer to the MVME3100 Single-Board
Computer Programmer’s Reference Guide listed in Appendix B, Related Documentation, for the
LBC bank and chip select assignments.
MVME3100 Installation and Use (V3100A/IH1)
39
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Chapter 4 Functional Description
Flash Memory
The MVME3100 provides one physical bank of soldered-on Flash memory. The bank is
composed of two physical Flash devices configured to operate in 16-bit mode to form a 32-bit
Flash bank. The default configuration for the MVME3100-1263 is 128MB using two 512Mb
devices, and for the MVME3100-1152 it is 64MB using two 256Mb devices.
Refer to the MVME3100 Single-Board Computer Programmer’s Reference Guide listed in
Appendix B, Related Documentation, for more information.
Control and Timers Logic
The MVME3100 control and timers logic resides on the local bus. This logic provides the
following functions on the board:
■Local bus address latch
■Chip selects for Flash banks and QUART
■System Control and Status registers
■Four 32-bit tick timers
■Real-time clock (RTC) 1 MHz reference clock
Refer to the MVME3100 Single-Board Computer Programmer’s Reference Guide listed in
Appendix B, Related Documentation, for more information.
I2C Serial Interface and Devices
The MVME3100 provides the following on-board I2C serial devices connected to the MPC8540
I2C controller interface:
■8KB serial EEPROM for VPD
■Two 64KB serial EEPROMs for user configuration data storage
■256 byte serial EEPROM on SODIMM for SPD
■Maxim DS1375 RTC
■Maxim DS1621 temperature sensor
■8KB serial EEPROM on RTM VPD
The Maxim DS1375 RTC implemented on the MVME3100 provides an alarm interrupt routed
to the MPC8540 programmable interrupt controller (PIC). A Maxim DS32KHz temperature
controlled crystal oscillator provides the RTC reference. A battery backup circuit for the RTC is
provided on board.
40
The Maxim DS1621 digital temperature sensor provides a measure of the temperature of the
board.
MVME3100 Installation and Use (V3100A/IH1)
Page 53
The I2C interface is also routed to the on-board SODIMM socket. This allows the serial
presence detect (SPD) in the serial EEPROM, which is located on the memory module, to be
read and used to configure the memory controller accordingly. Similarly, the I2C interface is
routed to the P2 connector for access to the serial EEPROM located on the RTM. The device
address for the RTM serial EERPOM is user-selectable using configuration switches on the
RTM.
Refer to the MVME3100 Single-Board Computer Programmer’s Reference Guide in Appendix
B, Related Documentation, for more information.
Ethernet Interfaces
The MVME3100 provides one 10/100 and two 10/100/1000 Mb/s full duplex Ethernet interfaces
using the MPC8540 Fast Ethernet Controller (FEC) and two Triple Speed Ethernet Controllers
(TSEC). A Broadcom BCM5461S PHY is used for each TSEC interface, and each TSEC
interface and PHY is configured to operate in GMII mode. One Gigabit Ethernet interface is
routed to a front-panel RJ-45 connector with integrated LEDs for speed and activity indication.
The other Gigabit Ethernet interface is routed to P2 for rear I/O.
A Broadcom BCM5221 PHY is used for the FEC interface. The Fast Ethernet interface is routed
to P2 for rear I/O. Isolation transformers are provided on-board for each interface. The assigned
PHY addresses for the MPC8540 MII management (MIIM) interface can be found in the
MVME3100 Single-Board Computer Programmer’s Reference Guide, listed in Appendix B,
Related Documentation.
Chapter 4 Functional Description
Each Ethernet interface is assigned an Ethernet Station Address. The address is unique for
each device. The Ethernet Station Addresses are displayed on labels attached to the PMC
front-panel keep-out area.
Asynchronous Serial Ports
The MVME3100 board contains one front-access asynchronous serial port interface using
serial port 0 from the MPC8540 dual UART (DUART) device. This serial port is routed to the
RJ-45 front-panel connector.
This board also contains one quad UART (QUART) device connected to the MPC8540 device
controller bus to provide additional asynchronous serial ports. The QUART provides four
asynchronous serial ports,
SP1 – SP4, which are routed to the P2 connector. Refer to the ST16C554D Datasheet listed in
Appendix B, Related Documentation, for additional details and/or programming information.
MVME3100 Installation and Use (V3100A/IH1)
41
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Chapter 4 Functional Description
PCI/PCI-X Interfaces and Devices
The MVME3100 provides three separate PCI/PCI-X bus segments. Bus segment A operates in
66 MHz PCI or PCI-X mode and is connected to the MPC8540, the TSi148 VME controller, the
serial ATA (sATA) controller, and two PCI-X-to-PCI-X bridges. Bus segment B is bridged
between bus A and the two PMC sites and operates in 33/66 MHz PCI or 66/100 MHz PCI-X
mode depending on the slowest speed PMC installed. Bus segment C is bridged between bus
A, the USB controller, and the PMCspan connector. Bus C operates at 33 MHz PCI mode.
MPC8540 PCI-X Interface
The MPC8540 PCI-X controller operates in PCI or PCI-X, host bridge mode depending on the
state of the Bus A mode switch. The mode cannot be changed by software. Refer to the
MPC8540 Reference Manual listed in Appendix B, Related Documentation, for additional
details and/or programming information.
TSi148 VME Controller
The VMEbus interface for the MVME3100 is provided by the TSi148 ASIC. The TSi148 provides
the required VME, VME extensions, and 2eSST functions. Transceivers are used to buffer the
VME signals between the TSi148 and the VME backplane. Refer to the TSi148 User’s Manual
listed in Appendix B, Related Documentation, for additional details and/or programming
information.
Serial ATA Host Controller
The sATA host controller uses the Intel GD31244 PCI-X to sATA controller. This device provides
four sATA channels at 1.5Gb/s and is compliant with the Serial ATA: High speed serialized AT Attachment Specification, Revision 1.0e. It also supports the native command queuing feature
of sATA II.
The MVME3100 uses two of the four sATA channels. Channel 0 is routed to a sATA connector
mounted on the front panel for an external drive connection. Channel 1 is routed to a planar
sATA connector for an "inside the chassis" drive connection. Colocated with the planar
connector is a sATA power connector. At power-up, the controller is configured to operate in
either legacy (Native PCI IDE) mode or Direct Port Access (DPA) mode, controlled by the sATA
mode switch. The mode cannot be changed by software.
The MVME3100 provides two LEDs to indicate sATA channel activity. The function of the LEDs
depends on the operating mode of the 31244 (legacy or DPA mode).
Refer to the 31244 PCI-X to Serial ATA Controller Datasheet and 31244 PCI-X to Serial ATA
Controller Specification Update listed in Appendix B, Related Documentation, for additional
details and/or programming information
42
MVME3100 Installation and Use (V3100A/IH1)
Page 55
PCI-X-to-PCI-X Bridges
The MVME3100 uses two PLX PCI6520 PCI-X-to-PCI-X bridges to isolate the primary PCI bus,
bus A. These bridges isolate bus A from bus B with the PMC sites and from bus C with the USB
controller and PMCspan interface. The PCI6520 is a 64-bit, 133 MHz, PCI-X r1.0b compliant
device. It operates asynchronously between 33 MHz and 133 MHz on either primary or
secondary port. Refer to the PCI6520CB Data Book listed in Appendix B, Related
Documentation, for additional details and/or programming information.
PCI Mezzanine Card Slots
The MVME3100 provides two PMC sites that support standard PMCs or PrPMCs. Both PMC
sites are located on PCI bus B and operate at the same speed and mode as determined by the
slowest PMC module. The board routing supports a maximum of 100 MHz PCI-X operation on
each site. Signaling voltage (Vio) for the two PMC sites is dependent on keying pin installation
options and can be configured for 5V or 3.3V. Both sites must be configured for the same Vio voltage or the Vio voltage will be disabled. Each PMC site has enough 3.3V and 5V power
allocated to support a 25 watt (max) PMC or PrPMC from either supply.
PMC slot 1 supports:
Chapter 4 Functional Description
Mezzanine Type:PMC = PCI Mezzanine Card
Mezzanine Size:S1B = Single width and standard depth
(75mm x 150mm) with front panel
PMC Connectors: J11, J12, J13, and J14 (32/64-bit PCI with front and
rear I/O)
Signaling Voltage: VIO = +3.3V (+5V tolerant) or +5V, selected by keying
pin
PMC slot 2 supports:
Mezzanine Type:PMC = PCI Mezzanine Card
Mezzanine Size:S1B = Single width and standard depth
(75mm x 150mm) with front panel
PMC Connectors: J21, J22, and J23 (32/64-bit PCI with front I/O)
Signalling Voltage: VIO = +3.3V (+5V tolerant) or +5V, selected by keying
pin
Note You cannot use 3.3V and 5V PMCs together; the voltage keying pin on slots 1 and 2 must
be identical. When in 5V mode, the bus runs at 33 MHz.
In addition, the PMC connectors are located such that a double-width PMC may be installed in
place of the two single-width PMCs.
MVME3100 Installation and Use (V3100A/IH1)
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Chapter 4 Functional Description
In this case, the MVME3100 supports:
Mezzanine Type:PMC = PCI Mezzanine Card
Mezzanine Size:Double width and standard depth
PMC Connectors: J11, J12, J13, J14, J21, J22, and J23
Signaling Voltage:VIO = +3.3V (+5V tolerant) or +5V, selected by keying
Note On PMC site 1, the user I/O – J14 signals will only support the low-current, high-speed
signals and are not to be used for any current bearing power supply usage. The maximum
current rating of each pin/signal is 100 mA.
USB
The USB 2.0 host controller provides USB ports with integrated transceivers for connectivity
with any USB-compliant device or hub. USB channel 1 is routed to a single USB connector
located at the front panel. DC power to the front panel USB port is supplied via a USB power
switch, which provides soft-start, current limiting, over-current detection, and power enable for
port 1. Refer to the µPD720101 USB 2.0 Host Controller Datasheet listed in Appendix B,
Related Documentation, for additional details.
(150mm x 150mm) with front panel
(32/64-bit PCI with front and rear I/O) on J14 only
pin
PMC Expansion
The MVM3E3100 provides additional PMC module capability through the use of a connector on
bus C that is compatible with the PMCspan boards. Up to four additional PMC modules may be
added by using existing PMCspan boards. Refer to the PMCspan PMC Adapter Carrier Board Installation and Use manual listed in Appendix B, Related Documentation, for additional details.
General-Purpose Timers
There are a total of eight independent, 32-bit timers. Four timers are integrated into the
MPC8540 and four timers are in the PLD. The four MPC8540 timers are clocked by the RTC
input, which is driven by a 1 MHz clock. The clock source for the four timers in the PLD is 25
MHz. Refer to the MPC8540 Reference Manual listed in Appendix B, Related Documentation,
for additional details and/or programming information.
Real-time Clock Battery
There is an on-board Renata SMT battery holder on the MVME3100. This SMTU2430-1 holder
allows for quick and easy replacement of a 3V button cell lithium battery (CR2430), which
provides back-up power to the on-board DS1375 RTC. A battery switching circuit provides
automatic switching between the 3.3V and battery voltages. The battery provides backup power
to the RTC for a minimum of one year at nominal temperature.
44
MVME3100 Installation and Use (V3100A/IH1)
Page 57
Reset Control Logic
The sources of reset on the MVME3100 are the following:
■Power-u p
■Reset switch
■Watchdog timer
■System Control register bit
■VMEbus reset
A board-level hard reset generates a reset for the entire board including the MPC8540, local
PCI/PCI-X buses, Ethernet PHYs, serial ports, Flash devices, and PLD(s). If the MVME3100 is
configured as the VME system controller, the VME bus and local TSi148 reset input are also
reset.
Debug Support
The MVME3100 provides a boundary scan header for boundary scan test access and device
programming. This board also provides a separate standard COP header for MPC8540 COP
emulation.
Chapter 4 Functional Description
MVME3100 Installation and Use (V3100A/IH1)
45
Page 58
5Pin Assignments
Introduction
This chapter provides pin assignments for various connectors and headers on the MMVE3100
single-board computer and the MVME721 transition module.
The following headers are described in this chapter:
■Boundary Scan Header (J24)
■Processor COP Header (J25)
MVME3100 Installation and Use (V3100A/IH1)
47
Page 59
Chapter 5 Pin Assignments
Connectors
PMC Expansion Connector (J4)
One 114-pin Mictor connector with a center row of power and ground pins is used to provide
PCI expansion capability. The pin assignments for this connector are as follows:
There is one 10/100 and two 10/100/1000Mb/s full duplex Ethernet interfaces using the
MPC8540 Fast Ethernet Controller (FEC) and two Triple Speed Ethernet Controllers (TSEC).
One Gigabit Ethernet interface is routed to a front-panel RJ-45 connector with integrated LEDs
for speed and activity indication. The other Gigabit Ethernet interface and the 10/100 interface
are routed to P2 for rear I/O. The pin assignments for these connectors are as follows:
Serial Port Connectors (COM1/J41A, COM2–COM5/J2A-D)
There is one front access asynchronous serial port interface (SP0) that is routed to the RJ-45
front-panel connector. There are four asynchronous serial port interfaces, SP1 – SP4, which
are routed to the P2 connector. The pin assignments for these connectors are as follows:
Table 5-10. COM Port Connector Pin Assignments
PinSignal
1No connect
2RTS
3GND
4TX
58
5RX
6GND
7CTS
8No connect
MVME3100 Installation and Use (V3100A/IH1)
Page 70
VMEbus P1 Connector
The VME P1 connector is a 160-pin DIN. The P1 connector provides power and VME signals
for 24-bit address and 16-bit data. The pin assignments for the P1 connector is as follows:
Table 5-11. VMEbus P1 Connector Pin Assignments
ROW ZROW AROW BROW CROW D
1Reserved D00BBSY*D08+5V1
2GNDD01BCLR*D09GND2
3Reserved D02ACFAIL*D10Reserved3
4GNDD03BG0IN*D11Reserved4
5ReservedD04BG0OUT*D12Reserved5
6GNDD05BG1IN*D13Reserved6
7Reserved D06BG1OUT*D14Reserved7
8GNDD07BG2IN*D15Reserved8
9ReservedGNDBG2OUT*GNDGAP_L9
Chapter 5 Pin Assignments
10GNDSYSCLKBG3IN*SYSFAIL*GA0_L10
11ReservedGNDBG3OUT*BERR*GA1_L11
12GNDDS1*BR0*SYSRESET*Reserved12
13ReservedDS0*BR1*LWORD*GA2_L13
14GNDWRITE*BR2*AM5Reserved14
15ReservedGNDBR3*A23GA3_L15
16GNDDTACK*AM0A22Reserved16
17ReservedGNDAM1A21GA4_L17
18GNDAS*AM2A20Reserved18
19ReservedGNDAM3A19Reserved19
20GNDIACK*GNDA18Reserved20
21ReservedIACKIN*SERAA17Reserved21
22GNDIACKOUT*SERBA16Reserved22
23ReservedAM4GNDA15Reserved23
24GNDA07IRQ7*A14Reserved24
25ReservedA06IRQ6*A13Reserved25
26GNDA05IRQ5*A12Reserved26
27ReservedA04IRQ4*A11Reserved27
28GNDA03IRQ3*A10Reserved28
29ReservedA02IRQ2*A09Reserved29
30GNDA01IRQ1*A08Reserved30
31Reserved-12V+5VSTDBY+12VGND31
32GND+5V+5V+5V+5V32
MVME3100 Installation and Use (V3100A/IH1)
59
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Chapter 5 Pin Assignments
VMEbus P2 Connector
The VME P2 connector is a 160-pin DIN. Row B of the P2 connector provides power to the
MVME3100 and to the upper eight VMEbus address lines and additional 16 VMEbus data lines.
The pin assignments for the P2 connector are the same for both the MVME3100 and
MVME721, and are as follows:
PMC Host I/O connector J10 routes only power and ground from VME P2. There are no Host
I/O signals on this connector. The MVME3100 routes PMC I/O from J14 of PMC Slot 1 to VME
P2 rows A and C. The MVME721 routes these signals (pin-for-pin) from VME P2 to PMC I/O
Module connector J14. See Table 5-13 and Ta b l e 5 - 6 for the pin assignments.
There is one 2mm pitch header installed as a planar header on the MVME3100 board to provide
power to a serial ATA (sATA) drive mounted on the board or somewhere within the chassis. The
pin assignments for this header are as follows:
Table 5-14. Planar sATA Power Connector (J30) Pin
Assignments
PinSignal
1+5V
2+5V
3GND
4GND
USB Connector (J27)
There is one USB Type A connector located on the MVME3100 front panel. The pin
assignments are as follows:
Table 5-15. USB Connector (J27) Pin Assignments
PinSignal
1USB_VBUS (+5.0V)
2USB_DATA-
3USB_DATA+
4GND
62
MVME3100 Installation and Use (V3100A/IH1)
Page 74
sATA Connectors (J28 and J29)
The MVME3100 has two sATA connectors. J28 is an internal type sATA connector located on
the planar and is intended to connect to a drive located on the board or somewhere inside the
chassis. J29 is an external type sATA connected located on the front panel and is intended to
connect to an external sATA drive. The pin assignment for these connectors is as follows:
Table 5-16. sATA Connectors (J28 and J29) Pin Assignments
PinSignal
1GND
2SATA_TX+
3SATA_TX-
4GND
5SATA_RX-
6SATA_RX+
7GND
Chapter 5 Pin Assignments
Headers
Boundary Scan Header (J24)
The 14-pin boundary scan header provides an interface for programming the on-board PLDs
and for boundary scan testing/debug purposes. The pin assignments for this header are as
follows:
PMCspan PMC Adapter Carrier Board Installation
and Use
To obtain the most up-to-date product information in PDF or HTML format, visit
http://www.motorola.com/computer/literature.
Motorola Publication
Number
V3100A/PG
PMCSPANA/IH
MVME3100 Installation and Use (V3100A/IH1)
67
Page 79
Appendix B Related Documentation
Manufacturers’ Documents
For additional information, refer to the following table for manufacturers’ data sheets or user’s
manuals. As an additional help, a source for the listed document is provided. Please note that,
while these sources have been verified, the information is subject to change without notice.
Table B-2. Manufacturers’ Documents
Document Title and SourcePublication Number
MPC8540 Integrated Processor Hardware Specifications
Freescale Semiconductor Technical Call Center
Telephone: +1 800 521 6274
Web Site: www.freescale.com
Intel 31244 PCI-X to Serial ATA Controller Datasheet and Specification
Update
Intel Corporation
Web Site: www.intel.com/design/storage/serialata/docs/gd31244.htm
S29GLxxxN MirrorBit™ Flash Family
S29GL512N, S29GL256N, S29GL128N
AMD, Inc.
Web Site: www.amd.com/us-en/FlashMemory
MPC8540RM
80A3020_MA001_02
BCM5421
BCM5221
27359505.pdf
27379405.pdf
27631 Revision A
Amendment 3 May 13,
2004
68
μPD720101 USB 2.0 Host Controller Datasheet
NEC Electronics
Web Site: www.necel.com/usb/en/document/index.html
PCI6520CB Data Book
PLX Technology, Inc.
870 Maude Avenue
Sunnyvale, CA 94085
Web Site: www.plxtech.com
MVME3100 Installation and Use (V3100A/IH1)
S16265EJ3V0DS00
April 2003
Page 80
Appendix B Related Documentation
Table B-2. Manufacturers’ Documents (continued)
Document Title and SourcePublication Number
EXAR ST16C554/554D, ST68C554 Quad UART with 16-Byte FIFOs
EXAR Corporation
48720 Kato Road
Fremont, CA 94538
Web Site: www.exar.com
2-Wire Serial EEPROM
Atmel Corporation
San Jose, CA
Web Site: www.atmel.com/atmel/support
Maxim DS1621 Digital Thermometer and Thermostat
Maxim Integrated Products
Web Site: www.maxim-ic.com
Maxim DS1375 Serial Real-Time Clock
Maxim Integrated Products
Web Site: www.maxim-ic.com
TSOP Type I Shielded Metal Cover SMT
Yamaichi Electronics USA
Web Site: www.yeu.com
ST16C554/554D
Rev. 3.1.0
AT24C512
DS1621
Rev: 121203
MVME3100 Installation and Use (V3100A/IH1)
69
Page 81
Appendix B Related Documentation
Related Specifications
For additional information, refer to the following table for related specifications. For your
convenience, a source for the listed document is also provided. It is important to note that in
many cases, the information is preliminary and the revision levels of the documents are subject
to change without notice.
Table B-3. Related Specifications
Document Title and SourcePublication Number
VITA http://www.vita.com
VME64 SpecificationANSI/VITA 1-1994
VME64 ExtensionsANSI/VITA 1.1-1997
2eSST Source Synchronous TransferVITA 2.0-2003
PCI Special Interest Group (PCI SIG) www.pcisig.com
Peripheral Component Interconnect (PCI) Local Bus Specification,
Revision 2.0, 2.1, 2.2
PCI-X Addendum to the PCI Local Bus SpecificationRev 1.0b
IEEE http://standards.ieee.org/catalog
IEEE - Common Mezzanine Card Specification (CMC) Institute of
Electrical and Electronics Engineers, Inc.
IEEE - PCI Mezzanine Card Specification (PMC)
Institute of Electrical and Electronics Engineers, Inc.
USB http://www.usb.org/developers/docs
Universal Serial Bus SpecificationRevision 2.0
PCI Local Bus
Specification
P1386 Draft 2.0
P1386.1 Draft 2.0
April 27, 2000
70
MVME3100 Installation and Use (V3100A/IH1)
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