Motorola MTY10N100E Datasheet
1
Motorola TMOS Power MOSFET Transistor Device Data
N–Channel Enhancement–Mode Silicon Gate
This high voltage MOSFET uses an advanced t ermination
scheme to provide enhanced voltage–blocking capability without
degrading performance over time. In addition, this advanced TMOS
E–FET is designed to withstand high energy in the avalanche and
commutation modes. Designed for high voltage and high speed
switching applications in power supplies, converters and PWM
motor controls, these devices are particularly well suited for bridge
circuits where diode speed and commutating safe operating areas
are critical and offer additional safety margin against unexpected
voltage transients.
• Robust High Voltage Termination
• Avalanche Energy Specified
• Diode is Characterized for Use in Bridge Circuits
• I
DSS
and V
DS(on)
Specified at Elevated Temperature
MAXIMUM RATINGS
(TC = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain–Source Voltage V
DSS
1000 Vdc
Drain–Gate Voltage (RGS = 1.0 MΩ) V
DGR
1000 Vdc
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
V
GS
V
GSM
±20
±40
Vdc
Vpk
Drain Current — Continuous @ TC = 25°C
Drain Current — Single Pulse (tp ≤ 10 µs)
I
D
I
DM
10
30
Amps
Total Power Dissipation
Derate above 25°C
P
D
250
2.0
Watts
W/°C
Operating and Storage Temperature Range TJ, T
stg
–55 to 150 °C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc, Peak IL = 10 Apk, L = 10 mH, RG = 25 Ω )
E
AS
500 mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
R
θJC
R
θJA
0.5
30
°C/W
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
L
260 °C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics— are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc.
TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
Order this document
by MTY10N100E/D
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1995
TMOS POWER FET
10 AMPERES
1000 VOLTS
R
DS(on)
= 1.3 OHM
CASE 340G–02, STYLE 1
TO–264
Motorola Preferred Device
D
S
G
MTY10N100E
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS
(TJ = 25°C unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0, ID = 0.25 mA)
(VGS = 0, ID = 3.0 mA)
Temperature Coefficient (Positive)
V
(BR)DSS
1000
1000
—
—
—
1.254
—
—
—
Vdc
V/°C
Zero Gate Voltage Drain Current
(VDS = 800 Vdc, VGS = 0 Vdc)
(VDS = 1000 Vdc, VGS = 0 Vdc)
(VDS = 1000 Vdc, VGS = 0 Vdc, TJ = 125°C)
I
DSS
—
—
—
—
—
—
5.0
10
100
µAdc
Gate–Body Leakage Current (VGS = ±20 Vdc, VDS = 0) I
GSS
— — ±100 nAdc
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
Threshold Temperature Coefficient (Negative)
V
GS(th)
2.0
—
3.0
7.0
4.0
—
Vdc
mV/°C
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 5.0 Adc) R
DS(on)
— 1.10 1.3 Ohm
Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 10 Adc)
(ID = 5.0 Adc, TJ = 125°C)
V
DS(on)
—
—
11
—
15
15.3
Vdc
Forward Transconductance (VDS ≥ 8.0 Vdc, ID = 5.0 Adc) g
FS
8.0 10 — mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
C
iss
— 3500 5600 pF
Output Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
C
oss
— 264 530
Reverse Transfer Capacitance
f = 1.0 MHz)
C
rss
— 52 90
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
t
d(on)
— 29 60 ns
Rise Time
t
r
— 57 120
Turn–Off Delay Time
VGS = 10 Vdc,
RG = 9.1 Ω)
t
d(off)
— 118 240
Fall Time
G
= 9.1 Ω)
t
f
— 70 140
Q
T
— 100 120 nC
(See Figure 8)
DS
= 400 Vdc, ID = 10 Adc,
Q
1
— 18.4 —
(VDS = 400 Vdc, ID = 10 Adc,
VGS = 10 Vdc)
Q
2
— 33 —
Q
3
— 36.7 —
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
(IS = 10 Adc, VGS = 0 Vdc)
(IS = 10 Adc, VGS = 0 Vdc, TJ = 125°C)
V
SD
—
—
0.885
0.8
1.1
—
Vdc
t
rr
— 885 —
(See Figure 14)
S
= 10 Adc, VGS = 0 Vdc,
t
a
— 220 —
(IS = 10 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
t
b
— 667 —
Reverse Recovery Stored Charge Q
RR
— 8.0 — µC
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25″ from package to center of die)
L
D
— 3.5
4.5
—
nH
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
L
S
— 7.5 — nH
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
Gate Charge
Reverse Recovery Time
(VDD = 500 Vdc, ID = 10 Adc,
(V
(I
ns
MTY10N100E
3
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
, DRAIN–TO–SOURCE RESISTANCE
(NORMALIZED)
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (OHMS)
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (OHMS)
100000
10000
1000
100
10
1
0 100 200 300 400 500 600 700 800 900 1000
100°C
25°C
2.8
2.4
2
1.6
1.2
0.8
0.4
0
–50 –25 0 25 50 75 100 125 150
VGS = 10 V
ID = 10 A
1.56
1.48
1.4
1.32
1.24
1.16
1.08
1.00
0 2 4 6 8 10 12 14 16 18 20
ID, DRAIN CURRENT (AMPS)
15 V
2.4
2
1.6
1.2
0.8
0
0 4 8 12 16 20
25°C
0.4
18141062
20
18
16
14
12
10
8
6
4
2
0
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 1. On–Region Characteristics
I
D
, DRAIN CURRENT (AMPS)
I
D
, DRAIN CURRENT (AMPS)
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
ID, DRAIN CURRENT (AMPS)
Figure 3. On–Resistance versus Drain Current
and Temperature
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On–Resistance Variation with
Temperature
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 6. Drain–To–Source Leakage
Current versus Voltage
I
DSS
, LEAKAGE (nA)
20
18
16
14
12
10
8
6
4
2
0
2 2.4 2.8 3.2 3.6 4 4.4 4.8 5.2 5.6 6
TJ = 25°C
VGS = 10 V
VDS ≥ 10 V
VGS = 10 V
TJ = 100°C
–55°C
TJ = 25°C
VGS = 10 V
VGS = 0 V
TJ = 125°C
6 V
5 V
4 V
100°C
25°C
TJ = 55°C
DS(on)
R
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