Motorola MTW10N100E Datasheet

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SEMICONDUCTOR TECHNICAL DATA

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Motorola Preferred Device

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N–Channel Enhancement–Mode Silicon Gate

This high voltage MOSFET uses an advanced termination
scheme to provide enhanced voltage–blocking capability without
degrading performance over time. In addition, this advanced TMOS
E–FET is designed to withstand high energy in the avalanche and
commutation modes. The new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transient.

• Robust High Voltage Termination

• Avalanche Energy Specified

• Source–to–Drain Diode Recovery Time Comparable to a

Discrete Fast Recovery Diode

• Diode is Characterized for Use in Bridge Circuits

• I

DSS

and V

Specified at Elevated Temperature

DS(on)

G

• Isolated Mounting Hole Reduces Mounting Hardware

MAXIMUM RATINGS

Drain–Source Voltage V
Drain–Gate Voltage (RGS = 1.0 MΩ) V
Gate–Source Voltage — Continuous

Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)

Drain Current — Continuous

Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)

Total Power Dissipation

Derate above 25°C
Operating and Storage Temperature Range TJ, T
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C

(VDD = 100 Vdc, VGS = 10 Vdc, IL = 10 Apk, L = 10 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case

Thermal Resistance — Junction to Ambient

Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T

Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.

E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.

(TC = 25°C unless otherwise noted)

Rating Symbol Value Unit



D

S

DSS

DGR

V

GS

V

GSM

I

D

I

D

I

DM
P

D

stg

E

AS

R

θJC

R

θJA

L

TMOS POWER FET

10 AMPERES

1000 VOL TS

R

CASE 340K–01, Style 1

–55 to 150 °C

= 1.3 OHM

DS(on)

TO–247AE

1000 Vdc
1000 Vdc

± 20
± 40

10

6.2
30

250

2.0

500 mJ

0.50
40

260 °C

Vdc
Vpk

Adc

Apk

Watts

W/°C

°C/W

Preferred devices are Motorola recommended choices for future use and best overall value.

REV 3

Motorola TMOS Power MOSFET Transistor Device Data

 Motorola, Inc. 1996

1

MTW10N100E

)

f = 1.0 MHz)

V

G

)

V

GS

Vdc)

(

S

,

GS

,

ELECTRICAL CHARACTERISTICS

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Drain–Source Breakdown Voltage

(VGS = 0 Vdc, ID = 250 µAdc)
T emperature Coef ficient (Positive)

Zero Gate Voltage Drain Current

(VDS = 1000 Vdc, VGS = 0 Vdc)
(VDS = 1000 Vdc, VGS = 0 Vdc, TJ = 125°C)

Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) I

ON CHARACTERISTICS (1)

Gate Threshold Voltage

(VDS = VGS, ID = 250 µAdc)

T emperature Coef ficient (Negative)
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 5.0 Adc) R
Drain–Source On–Voltage (VGS = 10 Vdc)

(ID = 10 Adc)

(ID = 5.0 Adc, TJ = 125°C)
Forward Transconductance (VDS = 15 Vdc, ID = 5.0 Adc) g

DYNAMIC CHARACTERISTICS

Input Capacitance
Output Capacitance
Reverse Transfer Capacitance

SWITCHING CHARACTERISTICS (2)

Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge

(See Figure 8)

SOURCE–DRAIN DIODE CHARACTERISTICS

Forward On–Voltage (1)

Reverse Recovery Time

(See Figure 14)

Reverse Recovery Stored Charge Q

INTERNAL PACKAGE INDUCTANCE

Internal Drain Inductance

(Measured from the drain lead 0.25″ from package to center of die)
Internal Source Inductance

(Measured from the source lead 0.25″ from package to source bond pad)

(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.

(TJ = 25°C unless otherwise noted)

(VDS = 25 Vdc, VGS = 0 Vdc,

(VDD = 500 Vdc, ID = 10 Adc,

(VDS = 400 Vdc, ID = 10 Adc,

(IS = 10 Adc, VGS = 0 Vdc, TJ = 125°C)

f = 1.0 MHz

= 10 Vdc,

GS

RG = 9.1 Ω)

= 10

=

(IS = 10 Adc, VGS = 0 Vdc)

(IS = 10 Adc, VGS = 0 Vdc,

dIS/dt = 100 A/µs)

V

(BR)DSS

I

DSS

GSS

V

GS(th)

DS(on)

V

DS(on)

FS

C

iss

C

oss

C

rss

t

d(on)

t

r

t

d(off)

t

f

Q

Q
Q
Q

V

SD

t

rr

t

a

t

b

RR

L

D

L

S

1000

—

—
—

— — 100 nAdc

2.0
—

— 1.10 1.3 Ohm

—
—

8.0 10 — mhos

— 3500 5600 pF
— 264 530
— 52 90

— 29 60 ns
— 57 120
— 118 240
— 70 140

T

1
2
3

— 100 120 nC

— 18.4 —
— 33 —
— 36.7 —

—
—

— 885 —
— 220 —
— 667 —
— 8.0 — µC

— 4.5 — nH

— 13 — nH

—

1,254

—
—

3.0

7.0

11

—

0.885

0.8

—
—

10

100

4.0
—

15

15.3

1.1
—

Vdc

mV/°C

µAdc

Vdc

mV/°C

Vdc

Vdc

ns

2

Motorola TMOS Power MOSFET Transistor Device Data

TYPICAL ELECTRICAL CHARACTERISTICS

MTW10N100E

20

TJ = 25°C

18
16
14
12
10

8
6

, DRAIN CURRENT (AMPS)

D

I

4
2

0

2 8 18 26

0 6 12 14 22 30

VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)

VGS = 10 V

Figure 1. On–Region Characteristics

2.4

2.0

1.6

1.2

0.8

0.4

, DRAIN–TO–SOURCE RESIST ANCE (OHMS)

VGS = 10 V

T

= 100°C

J

25°C

–55°C

6 V

5 V

4 V

20

VDS ≥ 10 V

18
16
14
12
10

8
6

, DRAIN CURRENT (AMPS)

D

I

4
2
0

282416 20410

2.0 2.8 3.6 4.4 5.22.4 3.2 4.0 4.8
VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)

25°C

100°C

TJ = –55°C

5.6 6.0

Figure 2. Transfer Characteristics

1.56
TJ = 25°C

1.48

1.40

1.32

1.24

1.16

1.08

, DRAIN–TO–SOURCE RESIST ANCE (OHMS)

VGS = 10 V

15 V

0

DS(on)

R

26 1410

0 4 12 16

81820

ID, DRAIN CURRENT (AMPS)

Figure 3. On–Resistance versus Drain Current

and T emperature

2.8
VGS = 10 V
ID = 5 A

2.4

2.0

1.6

1.2

(NORMALIZED)

0.8

, DRAIN–TO–SOURCE RESIST ANCE

0.4

DS(on)

R

0

–50

–25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. On–Resistance Variation with

Temperature

1.00

DS(on)

04 1621418

R

610812 20
ID, DRAIN CURRENT (AMPS)

Figure 4. On–Resistance versus Drain Current

and Gate Voltage

100000

10000

, LEAKAGE (nA)

DSS

I

V

= 0 V

GS

1000

100

10

1

0 300 700

200 500 1000900

VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)

TJ = 125°C

100°C

25°C

400 600 800100

Figure 6. Drain–T o–Source Leakage

Current versus Voltage

Motorola TMOS Power MOSFET Transistor Device Data

3