Motorola MTE125N20E Datasheet
1
Motorola TMOS Power MOSFET Transistor Device Data
N–Channel Enhancement–Mode Silicon Gate
This a dvanced h igh voltage TMOS E–FET is designed to
withstand high energy in the avalanche mode and switch efficiently.
This new high energy device also offers a drain–to–source diode
with fast recovery time. Designed for high voltage, high s peed
switching applications such a s power supplies, P WM motor
controls and other inductive loads, the avalanche energy capability
is specified to eliminate the guesswork in designs where inductive
loads are switched and offer additional s afety margin against
unexpected voltage transients.
• 2500 V RMS Isolated Isotop Package
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• Very Low Internal Parasitic Inductance
• I
DSS
and V
DS(on)
Specified at Elevated Temperature
• U.L. Recognized, File #E69369
MAXIMUM RATINGS
(TC = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain–Source Voltage V
DSS
200 Vdc
Drain–Gate Voltage (RGS = 1.0 MΩ) V
DGR
200 Vdc
Gate–Source Voltage — Continuous V
GS
± 20 Vdc
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
I
D
I
D
I
DM
125
79
500
Adc
Total Power Dissipation
Derate above 25°C
P
D
460
3.70
Watts
W/°C
Operating and Storage Temperature Range TJ, T
stg
–40 to 150 °C
Single Pulse Drain–to–Source Avalanche Energy
(VDD = 50 Vdc, VGS = 10 Vdc, IL = 125 Apk, L = 0.05mH, RG = 25 Ω)
E
AS
400
mJ
RMS Isolation Voltage V
ISO
2500 Vac
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
R
θJC
R
θJA
0.28
62.5
°C/W
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
L
260 °C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
ISOTOP is a trademark of SGS–THOMSON Microelectronics.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 1
Order this document
by MTE125N20E/D
SEMICONDUCTOR TECHNICAL DATA
TMOS POWER FET
125 AMPERES
200 VOLTS
R
DS(on)
= 0.015 OHM
Motorola Preferred Device
D
S
G
SOT–227B
1
2
3
4
1. Source
2. Gate
3. Drain
4. Source 2
Motorola, Inc. 1995
MTE125N20E
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
Temperature Coefficient (Positive)
V
(BR)DSS
200
—
215
250
—
—
Vdc
mV/°C
Zero Gate Voltage Drain Current
(VDS = 200 Vdc, VGS = 0 Vdc)
(VDS = 200 Vdc, VGS = 0 Vdc, TJ = 125°C)
I
DSS
—
—
—
—
10
100
µAdc
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) I
GSS
— — 200 nAdc
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
Threshold Temperature Coefficient (Negative)
V
GS(th)
2.0
—
3.0
—
4.0
—
Vdc
mV/°C
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 62.5 Adc) R
DS(on)
— 12 15 mOhm
Drain–Source On–Voltage (VGS = Vdc)
(ID = 125 Adc)
(ID = 62.5 Adc, TJ = 125°C)
V
DS(on)
—
—
—
—
2.1
1.9
Vdc
Forward Transconductance (VDS = 15 Vdc, ID = 62.5 Adc) g
FS
50 80 — mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
C
iss
— 14400 — pF
Output Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
C
oss
— 3600 —
Reverse Transfer Capacitance
f = 1.0 MHz)
C
rss
— 920 —
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
t
d(on)
— 72 — ns
Rise Time
t
r
— 574 —
Turn–Off Delay Time
VGS = 10 Vdc,
RG = 4.7 Ω)
t
d(off)
— 327 —
Fall Time
G
= 4.7 Ω)
t
f
— 376 —
Q
T
— 510 — nC
DS
= 160 Vdc, ID = 125 Adc,
Q
1
— 100 —
(VDS = 160 Vdc, ID = 125 Adc,
VGS =10 Vdc)
Q
2
— 245 —
Q
3
— 158 —
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
(IS = 125 Adc, VGS = 0 Vdc)
(IS = 125 Adc, VGS = 0 Vdc, TJ = 125°C)
V
SD
—
—
1.00
1.00
1.5
—
Vdc
t
rr
— 310 —
S
= 125 Adc, VGS = 0 Vdc,
t
a
— 220 —
(IS = 125 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
t
b
— 90 —
Reverse Recovery Stored Charge Q
RR
— 9.2 — µC
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25″ from package to center of die)
L
D
—
—
3.5
5.0
—
—
nH
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
L
S
— 5.0 — nH
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
Gate Charge
Reverse Recovery Time
(VDD = 250 Vdc, ID = 125 Adc,
(V
(I
ns
MTE125N20E
3
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE
(NORMALIZED)
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (OHMS)
0
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 1. On–Region Characteristics
I
D
, DRAIN CURRENT (AMPS)
I
D
, DRAIN CURRENT (AMPS)
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
ID, DRAIN CURRENT (AMPS)
Figure 3. On–Resistance versus Drain Current
and Temperature
ID, DRAIN CURRENT (AMPS)
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On–Resistance Variation with
Temperature
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 6. Drain–To–Source Leakage Current
versus Voltage
TJ = 25°C
VGS = 10 V
VGS = 10 V
ID = 62.5 A
7 V
6 V
–50 0 50 100 150
210
140
70
0
6321
160
80
0
7643
120
12080400 160 200
0 50 150100 200
5 V
4 V
125
9 V
8 V
40
5
VDS ≥ 10 V
100°C
25°C
TJ = –55°C
0.028
0.024
0.02
0.016
0.012
0.008
0.004
0 40 80 120 160 200
TJ = 100°C
25°C
–55°C
0.02
0.018
0.016
0.014
0.012
VGS = 10 V
TJ = 25°C
VGS = 10 V
15 V
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (OHMS)
–25 25 75
2.2
1.8
1
0.6
0.2
I
DSS
, LEAKAGE (nA)
100000
10000
1000
100
10
1
VGS = 0 V
TJ = 125°C
100°C
25°C
54
1.4
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