Motorola MTD8N06E Datasheet
SEMICONDUCTOR TECHNICAL DATA
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by MTD8N06E/D
N–Channel Enhancement–Mode Silicon Gate
TMOS POWER FET
8.0 AMPERES
60 VOLTS
This advanced TMOS E–FET is designed to withstand high
energy in the avalanche and commutation modes. The new energy
R
DS(on)
= 0.12 OHM
efficient design also offers a drain–to–source diode with a fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
D
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I
DSS
and V
Specified at Elevated Temperature
DS(on)
• Surface Mount Package Available in 16 mm, 13–inch/2500
Unit Tape & Reel, Add T4 Suffix to Part Number
MAXIMUM RATINGS
Drain–Source Voltage V
Drain–Gate Voltage (RGS = 1.0 MΩ) V
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
Drain Current — Continuous
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C, when mounted to minimum recommended pad size
Operating and Storage Temperature Range TJ, T
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, IL = 8.0 Apk, L = 3.0 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case
Maximum Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
(TC = 25°C unless otherwise noted)
Rating
— Continuous @ 100°C
— Single Pulse (tp ≤ 10 µs)
— Junction to Ambient
— Junction to Ambient, when mounted to minimum recommended pad size
G
S
Symbol Value Unit
V
CASE 369A–13, Style 2
DSS
DGR
V
GS
GSM
I
D
I
D
I
DM
P
D
–55 to 150 °C
stg
E
AS
R
θJC
R
θJA
R
θJA
L
DPAK
60 Vdc
60 Vdc
±20
±30
8.0
6.4
24
40
0.32
1.75
96 mJ
3.13
100
71.4
260 °C
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C/W
REV 2
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1997
1
MTD8N06E
)
f = 1.0 MHz)
V
G
)
(
DS
,
D
,
(
S
,
GS
,
ELECTRICAL CHARACTERISTICS
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
T emperature Coef ficient (Positive)
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 125°C)
Gate–Body Leakage Current (VGS = ±20 Vdc, VDS = 0) I
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
T emperature Coef ficient (Negative)
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 4.0 Adc) R
Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 8.0 Adc)
(ID = 4.0 Adc, TJ = 125°C)
Forward Transconductance (VDS = 10 Vdc, ID = 4.0 Adc) g
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
(See Figure 8)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
Reverse Recovery Time
(See Figure 14)
Reverse Recovery Stored Charge Q
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25″ from package to center of die)
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(T
= 25°C unless otherwise noted)
J
Characteristic
(VDS = 25 Vdc, VGS = 0 Vdc,
(IS = 8.0 Adc, VGS = 0 Vdc, TJ = 125°C)
f = 1.0 MHz
(VDD = 30 Vdc, ID = 8.0 Adc,
(VDS = 48 Vdc, ID = 8.0 Adc,
(IS = 8.0 Adc, VGS = 0 Vdc)
(IS = 8.0 Adc, VGS = 0 Vdc,
= 10 Vdc,
GS
RG = 9.1 Ω)
VGS = 10 Vdc)
dIS/dt = 100 A/µs)
Symbol Min Typ Max Unit
V
(BR)DSS
I
DSS
GSS
V
GS(th)
DS(on)
V
DS(on)
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
T
Q
1
Q
2
Q
3
V
SD
t
rr
t
a
t
b
RR
L
D
L
S
60
—
—
—
— — 100 nAdc
2.0
—
— 0.087 0.12 Ohm
—
—
3.0 4.8 — mhos
— 424 570 pF
— 180 250
— 45 90
— 8.0 20 ns
— 31 60
— 21 40
— 25 50
— 13.9 20 nC
— 2.6 —
— 6.6 —
— 6.1 —
—
—
— 58.7 —
— 44 —
— 14.7 —
— 0.142 — µC
— 4.5 — nH
— 7.5 — nH
—
63
—
—
3.0
5.0
0.7
—
1.0
0.85
—
—
10
100
4.0
—
1.2
1.0
2.0
—
mV/°C
mV/°C
Vdc
µAdc
Vdc
Vdc
Vdc
ns
2
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
MTD8N06E
16
12
8
, DRAIN CURRENT (AMPS)
4
D
I
0
01 2 3 4
VGS = 10 V
9 V
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
7 V
8 V
TJ = 25°C VDS ≥ 10 V
6 V
5 V
4 V
Figure 1. On–Region Characteristics
0.14
VGS = 10 V
0.12
0.1
TJ = 100°C
25°C
16
12
8
, DRAIN CURRENT (AMPS)
4
D
I
0
234 56 8
VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)
TJ = –55°C
25°C
100°C
7
Figure 2. Transfer Characteristics
0.092
0.088
0.084
TJ = 25°C
V
= 10 V
GS
0.08
–55°C
0.06
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0.04
DS(on)
R
02 6 10 16
48 14
ID, DRAIN CURRENT (AMPS)
12
Figure 3. On–Resistance versus Drain Current
and T emperature
1.6
VGS = 10 V
ID = 4 A
1.4
1.2
1
(NORMALIZED)
, DRAIN–TO–SOURCE RESIST ANCE
0.8
DS(on)
R
0.6
–50 –25 0 5025 75 100 125 150
TJ, JUNCTION TEMPERATURE (
°
C)
0.08
15 V
0.076
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0.072
DS(on)
R
02 6 10 1416
4812
ID, DRAIN CURRENT (AMPS)
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
10000
1000
100
, LEAKAGE (nA)
DSS
I
VGS = 0 V
TJ = 125°C
10
25°C
1
0204060
10 30 50
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
Figure 5. On–Resistance Variation with
Temperature
Motorola TMOS Power MOSFET Transistor Device Data
Figure 6. Drain–T o–Source Leakage
Current versus Voltage
3
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