MOTOROLA MMSF4205 Technical data

S4205



查询MMSF4205/D供应商

SEMICONDUCTOR TECHNICAL DATA

Medium Power Surface Mount Products

  
  

Order this document

by MMSF4205/D



Motorola Preferred Device

MiniMOS devices are an advanced series of power MOSFETs
which utilize Motorola’s High Cell Density HDTMOS process. These
miniature surface mount MOSFETs feature ultra low R

DS(on)

and true
logic level performance. They are capable of withstanding high energy in
the avalanche and commutation modes and the drain–to–s ource diode
has a very low reverse recovery time. MiniMOS devices are designed for
use in low voltage, high speed switching applications where power
efficiency is important. Typical applications are dc–dc converters, and
power management in portable and battery powered products such as



computers, printers, cellular and cordless phones. They can also be
used for low voltage motor controls in mass storage products such as
disk drives and tape drives. The avalanche energy is specified to
eliminate the guesswork in designs where induc tive loads are switched
and offer additional safety margin against unexpected voltage transients.

• Ultra Low R

Provides Higher Efficiency and Extends Battery Life

DS(on)

• Logic Level Gate Drive — Can Be Driven by Logic ICs

• Miniature SO–8 Surface Mount Package — Saves Board Space

• Diode Is Characterized for Use In Bridge Circuits

• Diode Exhibits High Speed, With Soft Recovery

• I

• Mounting Information for SO–8 Package Provided

• Avalanche Energy Specified

MAXIMUM RATINGS

Negative sign for P–Channel devices omitted for clarity

(1) Repetitive rating; pulse width limited by maximum junction temperature.

Specified at Elevated Temperature

DSS

G

(TJ = 25°C unless otherwise noted)

Rating

Drain–to–Source Voltage V
Drain–to–Gate Voltage (RGS = 1.0 MΩ) V
Gate–to–Source Voltage — Continuous V
1 inch SQ.

FR–4 or G–10 PCB

10 seconds

Minimum
FR–4 or G–10 PCB

10 seconds

Operating and Storage Temperature Range TJ, T
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C

(VDD = 20 Vdc, VGS = 4.5 Vdc, Peak IL = 5.0 Apk, L = 40 mH, RG = 25 W)

Thermal Resistance — Junction to Ambient
Total Power Dissipation @ TA = 25°C
Linear Derating Factor
Drain Current @ TA = 25°C
Continuous @ TA = 70°C
Pulsed Drain Current

Thermal Resistance — Junction to Ambient
Total Power Dissipation @ TA = 25°C
Linear Derating Factor
Drain Current @ TA = 25°C
Continuous @ TA = 70°C
Pulsed Drain Current

(1)

(1)

D

SOURCE
SOURCE
SOURCE

S

Symbol Max Unit

DSS

DGR

R

THJA

P

I
I

I

DM

R

THJA

P

I
I

I

DM

E

DEVICE MARKING ORDERING INFORMATION

Device Reel Size Tape Width Quantity

MMSF4205R2 13″ 12 mm embossed tape 2500 units

HDTMOS and MiniMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.

Preferred devices are Motorola recommended choices for future use and best overall value.
This document contains information on a new product. Specifications and information herein are subject to change without notice.

SINGLE TMOS

POWER MOSFET

10 AMPERES

20 VOLTS

R

CASE 751–06, Style 12

GATE

GS

D

D
D

D

D
D

stg

AS

= 14 m

DS(on)

SO–8

1

8

2

7

3

6

4

5

TOP VIEW

20 V
20 V

± 12 V

50

2.5
20
10

8.0
50

80

1.6

12.5

8.8

6.4
44

– 55 to 150 °C

500

W

DRAIN
DRAIN
DRAIN
DRAIN

°C/W

Watts

mW/°C

A
A
A

°C/W

Watts

mW/°C

A
A
A

mJ

Motorola TMOS Power MOSFET Transistor Device Data

 Motorola, Inc. 1999

1

MMSF4205

)

f = 1.0 MHz)

V

4.5 Vd

G

)( )

(

DS

,

D

,

(

S

,

GS

,

ELECTRICAL CHARACTERISTICS

OFF CHARACTERISTICS

Drain–to–Source Breakdown Voltage

(VGS = 0 Vdc, ID = 250 µAdc)
T emperature Coef ficient (Positive)

Zero Gate Voltage Drain Current

(VDS = 20 Vdc, VGS = 0 Vdc)
(VDS = 20 Vdc, VGS = 0 Vdc, TJ = 70°C)

Gate–Body Leakage Current (VGS = ± 12 Vdc, VDS = 0) I

ON CHARACTERISTICS

Gate Threshold Voltage

(VDS = VGS, ID = 250 µAdc)
Threshold Temperature Coefficient (Negative)

Static Drain–to–Source On–Resistance

(VGS = 4.5 Vdc, ID = 10 Adc)
(VGS = 2.5 Vdc, ID = 8.8 Adc)

Forward Transconductance (VDS = 10 Vdc, ID = 10 Adc) g

DYNAMIC CHARACTERISTICS

Input Capacitance
Output Capacitance
Transfer Capacitance

SWITCHING CHARACTERISTICS

Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge

SOURCE–DRAIN DIODE CHARACTERISTICS

Forward On–Voltage

Reverse Recovery Time

Reverse Recovery Stored Charge Q

(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) Reflects typical values.

(4) Repetitive rating; pulse width limited by maximum junction temperature.

(1)

(1)

Cpk =

(TC = 25°C unless otherwise noted)

Characteristic Symbol Min Typ Max Unit

(VDS = 16 Vdc, VGS = 0 Vdc,

(2)

(VDD = 10 Vdc, ID = 1.0 Adc,

(IS = 2.1 Adc, VGS = 0 Vdc) (1)

(IS = 2.1 Adc, VGS = 0 Vdc, TJ = 125°C)

Max limit – Typ

3 x SIGMA

f = 1.0 MHz

=

GS

RG = 6.0 Ω) (1)

(VDS = 10 Vdc, ID = 10 Adc,

VGS = 4.5 Vdc) (1)

(IS = 2.1 Adc, VGS = 0 Vdc,

dIS/dt = 100 A/µs) (1)

c,

V

(BR)DSS

I

DSS

GSS

V

GS(th)

R

DS(on)

FS

C

iss

C

oss

C

rss

t

d(on)

t

r

t

d(off)

t

f

Q
Q
Q
Q

V

SD

t

rr

t

a

t

b

RR

20
—

—
—

— — 100 nAdc

0.6
—

—
—

— 36 — Mhos

— 2600 3640 pF
— 1190 1670
— 720 1010

— 21 29
— 49 69
— 137 192
— 150 210

T
1
2
3

— 60 70
— 5.0 —
— 29 —
— 13 —

—
—

— 80 100
— 25 —
— 42 —
— 0.083 — µC

—

12.1

—
—

0.8

2.7

11
16

0.7

0.6

—
—

1.0

5.0

—
—

14
20

1.2
—

Vdc

mV/°C

µAdc

Vdc

mV/°C

mΩ

ns

nC

Vdc

ns

2

Motorola TMOS Power MOSFET Transistor Device Data

TYPICAL ELECTRICAL CHARACTERISTICS

MMSF4205

20

10 V

16

12

8

, DRAIN CURRENT (AMPS)

D

I

4

0

0 0.2 0.4 1.20.6 1.0

2.3 V

3.1 V

2.5 V

VDS, DRAIN–TO–SOURCE VOL TAGE (VOL TS)

Figure 1. On–Region Characteristics

0.020

0.016

0.012

4.5 V

0.8

2.1 V

VGS = 10 V thru 1.7 V

TJ = 25

°

C

1.9 V

1.7 V

1.4 1.6 2.0

1.8

ID = 8.8 A
TJ = 25

°

C

20

VDS ≥ 10 V

16

12

8

, DRAIN CURRENT (AMPS)

D

I

4

0

02

VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)

25°C

TJ = 100°C

1

–55°C

3

Figure 2. Transfer Characteristics

0.020
TJ = 25°C

0.016

0.012

VGS = 2.5 V

4.5 V

0.008

0.004

, DRAIN–TO–SOURCE RESIST ANCE (OHMS)

0

DS(on)

R

204 10

VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)

68

Figure 3. On–Resistance versus

Gate–T o–Source Voltage

2.0
VGS = 2.5 V

ID = 8.8 A

1.5

1.0

(NORMALIZED)

0.5

, DRAIN–TO–SOURCE RESIST ANCE

DS(on)

R

0

–50 –25 0 25 50 75 100 125 150

°

TJ, JUNCTION TEMPERATURE (

C)

0.008

0.004

, DRAIN–TO–SOURCE RESIST ANCE (OHMS)

0

DS(on)

048 16

R

ID, DRAIN CURRENT (AMPS)

12

Figure 4. On–Resistance versus Drain Current

and Gate Voltage

10000

VGS = 0 V

1000

100

10

, LEAKAGE (nA)

1

DSS

I

0.1

0.01
0

41216

VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)

TJ = 125°C

100°C

25°C

8

20

20

Figure 5. On–Resistance Variation with

T emperature

Motorola TMOS Power MOSFET Transistor Device Data

Figure 6. Drain–T o–Source Leakage

Current versus Voltage

3

MMSF4205

POWER MOSFET SWITCHING

Switching behavior is most easily modeled and predicted
by recognizing that the power MOSFET is charge controlled.
The lengths of various switching intervals (∆t) are deter­mined by how fast the FET input capacitance can be charged
by current from the generator.

The published capacitance data is difficult to use for calculat­ing rise and fall because drain–gate capacitance varies
greatly with applied voltage. Accordingly , gate charge data is
used. In most cases, a satisfactory estimate of average input
current (I

) can be made from a rudimentary analysis of

G(A V)

the drive circuit so that
t = Q/I

G(AV)

During the rise and fall time interval when switching a resis­tive load, VGS remains virtually constant at a level known as
the plateau voltage, V

. Therefore, rise and fall times may

SGP

be approximated by the following:
tr = Q2 x RG/(VGG – V
tf = Q2 x RG/V

GSP

GSP

)

where
VGG = the gate drive voltage, which varies from zero to V

GG

RG = the gate drive resistance
and Q2 and V

are read from the gate charge curve.

GSP

During the turn–on and turn–off delay times, gate current is
not constant. The simplest calculation uses appropriate val­ues from the capacitance curves in a standard equation for
voltage change in an RC network. The equations are:

t

d(on)

t

d(off)

= RG C
= RG C

In [VGG/(VGG – V

iss

In (VGG/V

iss

GSP

)]

GSP

)

The capacitance (C

) is read from the capacitance curve at

iss

a voltage corresponding to the off–state condition when cal­culating t
on–state when calculating t

and is read at a voltage corresponding to the

d(on)

d(off)

.

At high switching speeds, parasitic circuit elements com­plicate the analysis. The inductance of the MOSFET source
lead, inside the package and in the circuit wiring which is
common to both the drain and gate current paths, produces a
voltage at the source which reduces the gate drive current.
The voltage is determined by Ldi/dt, but since di/dt is a func­tion of drain current, the mathematical solution is complex.
The MOSFET output capacitance also complicates the
mathematics. And finally, MOSFETs have finite internal gate
resistance which effectively adds to the resistance of the
driving source, but the internal resistance is difficult to mea­sure and, consequently , is not specified.

The resistive switching time variation versus gate resis­tance (Figure 9) shows how typical switching performance is
affected by the parasitic circuit elements. If the parasitics
were not present, the slope of the curves would maintain a
value of unity regardless of the switching speed. The circuit
used to obtain the data is constructed to minimize common
inductance in the drain and gate circuit loops and is believed
readily achievable with board mounted components. Most
power electronic loads are inductive; the data in the figure is
taken with a resistive load, which approximates an optimally
snubbed inductive load. Power MOSFETs may be safely op­erated into an inductive load; however, snubbing reduces
switching losses.

12000

10000

8000

6000

4000

C, CAPACITANCE (pF)

2000

C

iss

C

rss

0

–10 0 5 10–5

VDS = 0 V VGS = 0 V

C

iss

C

C

rss

V

V

DS

GS

VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)

oss

Figure 7. Capacitance Variation

TJ = 25°C

15 20

4

Motorola TMOS Power MOSFET Transistor Device Data