Motorola MCM6206BBEJ25, MCM6206BBEJ25R, MCM6206BBEJ12R, MCM6206BBEJ15R, MCM6206BBEJ20 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Product Preview

32K x 8 Bit Fast Static RAM

The MCM6206BB is a 262,144 bit static random access memory organized as
32,768 words of 8 bits. Static design eliminates the need for external clocks or
timing strobes, while CMOS circuitry reduces power consumption and provides
for greater reliability .

This device meets JEDEC standards for functionality and pinout, and is avail­able in plastic small–outline J–leaded packages.

• Single 5 V ± 10% Power Supply

• Fully Static — No Clock or Timing Strobes Necessary

• Fast Access Times: 12/15/20/25 ns

• Equal Address and Chip Enable Access Times

• Output Enable (G

Eliminate Bus Contention Problems

• Low Power Operation: 125 – 140 mA Maximum AC

• Fully TTL Compatible — Three State Output

A
A
A
A
A
A
A
A
A

DQ

DQ

) Feature for Increased System Flexibility and to

BLOCK DIAGRAM

ROW

DECODER

INPUT

DATA

CONTROL

.

.

.

MEMORY MATRIX

COLUMN I/O

COLUMN DECODER

V

CC

V

SS

Order this document

by MCM6206BB/D

MCM6206BB

J PACKAGE

300 MIL SOJ

CASE

810B–03

PIN ASSIGNMENT

A

1
2

A

3

A

4

A

5

A

6

A

7

A

8

A

9

A

10

A

11

DQ

12

DQ

13

DQ

14

V

SS

PIN NAMES

A Address Input. . . . . . . . . . . . . . . . . . . .

DQ Data Input/Data Output. . . . . . . . . .

W
G
E
V

CC

V

SS

28

V
27
26
25
24
23
22
21
20

E
19

18
17
16
15

Write Enable. . . . . . . . . . . . . . . . . . . .

Output Enable. . . . . . . . . . . . . . . . . . .

Power Supply (+ 5 V). . . . . . . . . . .

Chip Enable. . . . . . . . . . . . . . . . . . . . . .

CC

W
A
A
A
A

G
A

DQ
DQ
DQ
DQ
DQ

Ground. . . . . . . . . . . . . . . . . . . . . . .

E

CIRCUIT

W

CONTROL

G

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.

6/4/97

 Motorola, Inc. 1997

MOTOROLA FAST SRAM

AAAAAA

MCM6206BB

1

TRUTH TABLE (X = Don’t Care)

G W Mode VCC Current Output Cycle

E

H X X Not Selected I

L H H Output Disabled I
L L H Read I
L X L Write I

SB1

, I

CCA
CCA
CCA

SB2

High–Z –
High–Z –

D

out

High–Z Write Cycle

Read Cycle

ABSOLUTE MAXIMUM RATINGS

Rating Symbol Value Unit

Power Supply Voltage V
Voltage Relative to VSS For Any Pin

Except V
Output Current I
Power Dissipation P
Temperature Under Bias T
Ambient Temperature T
Storage Temperature—Plastic T

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are

CC

exceeded. Functional operation should be restricted to RECOMMENDED OPER­ATING CONDITIONS. Exposure to higher than recommended voltages for ex­tended periods of time could affect device reliability.

CC

Vin, V

out

bias

stg

out

D

A

– 0.5 to + 7.0 V

– 0.5 to VCC + 0.5 V

± 20 mA

1.0 W

– 10 to + 85 °C

0 to + 70 °C

– 55 to + 125 °C

This device contains circuitry to protect the
inputs against damage due to high static volt­ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi­mum rated voltages to this high–impedance
circuit.

This CMOS memory circuit has been de­signed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear
feet per minute is maintained.

DC OPERA TING CONDITIONS AND CHARACTERISTICS

(VCC = 5.0 V ±10%, TA = 0 to 70°C, Unless Otherwise Noted)

RECOMMENDED OPERATING CONDITIONS

Parameter Symbol Min Typ Max Unit

Supply Voltage (Operating Voltage Range) V
Input High Voltage V
Input Low Voltage V

*VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width ≤ 20 ns)

**VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width ≤ 20 ns)

DC CHARACTERISTICS

Parameter Symbol Min Max Unit

Input Leakage Current (All Inputs, Vin = 0 to VCC) I
Output Leakage Current (E = VIH or G = VIH, V
Output High Voltage (IOH = – 4.0 mA) V
Output Low Voltage (IOL = 8.0 mA) V

= 0 to VCC) I

out

POWER SUPPLY CURRENTS

Parameter Symbol –12 –15 –20 –25 Unit

AC Active Supply Current (I
AC Standby Current (E = VIH, VCC = Max, f = f
CMOS Standby Current (VCC = Max, f = 0 MHz, E ≥ VCC – 0.2 V

Vin ≤ VSS + 0.2 V, or ≥ VCC – 0.2 V)

out = 0 mA, VCC

= Max, f = f

max)

) I

max

CC

IH

IL

4.5 5.0 5.5 V

2.2 —

– 0.5*

lkg(I)

lkg(O)

OH

OL

CCA

I

SB1

I

SB2

— 0.8 V

— ± 1 µA
— ± 1 µA

2.4 — V
— 0.4 V

140 135 130 125 mA

40 35 35 30 mA
10 10 10 10 mA

VCC + 0.3**

V

CAPACITANCE (f = 1 MHz, dV = 3 V, T

Address Input Capacitance C
Control Pin Input Capacitance (E, G, W) C
I/O Capacitance C

= 25°C, Periodically sampled rather than 100% tested)

A

Characteristic

MCM6206BB
2

Symbol Max Unit

in
in

I/O

6 pF
8 pF
8 pF

MOTOROLA FAST SRAM

AC OPERA TING CONDITIONS AND CHARACTERISTICS

(VCC = 5.0 V ± 10%, TA = 0 to + 70°C, Unless Otherwise Noted)

Input Timing Measurement Reference Level 1.5 V. . . . . . . . . . . . . . .

Input Pulse Levels 0 to 3.0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input Rise/Fall Time 5 ns. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

READ CYCLE (See Note 1)

–12 –15 –20 –25

Parameter Symbol Min Max Min Max Min Max Min Max Unit Notes

Read Cycle Time t
Address Access Time t
Enable Access Time t
Output Enable Access Time t
Output Hold from Address Change t
Enable Low to Output Active t
Enable High to Output High–Z t
Output Enable Low to Output Active t
Output Enable High to Output High–Z t
Power Up Time t
Power Down Time t

NOTES:

1. W

is high for read cycle.

2. All timings are referenced from the last valid address to the first transitioning address.

3. Addresses valid prior to or coincident with E

4. At any given voltage and temperature, t
device and from device to device.

5. Transition is measured ±500 mV from steady–state voltage.

6. This parameter is sampled and not 100% tested.

7. Device is continuously selected (E

AVAV
AVQV
ELQV
GLQV
AXQX
ELQX
EHQZ
GLQX

GHQZ
ELICCH
EHICCL

EHQZ

= VIL, G = VIL).

12 — 15 — 20 — 25 — ns 2
— 12 — 15 — 20 — 25 ns
— 12 — 15 — 20 — 25 ns 3
— 6 — 8 — 10 — 12 ns

3 — 3 — 3 — 3 — ns 4,5,6
4 — 4 — 4 — 4 — ns 4,5,6

— 7 — 8 — 9 — 10 ns 4,5,6

0 — 0 — 0 — 0 — ns 4,5,6

— 6 — 7 — 8 — 10 ns 4,5,6

0 — 0 — 0 — 0 — ns

— 12 — 15 — 20 — 25 ns

going low.

(max) is less than t

Output Timing Measurement Reference Level 1.5 V. . . . . . . . . . . . .

Output Load Figure 1 Unless Otherwise Noted. . . . . . . . . . . . . . . . . .

(min), and t

ELQX

(max) is less than t

GHQZ

(min), both for a given

GLQX

OUTPUT

MOTOROLA FAST SRAM

Z0 = 50

Ω

50

Ω

VL = 1.5 V

Figure 1. AC Test Loads

TIMING LIMITS

The table of timing values shows either a
minimum or a maximum limit for each param­eter. Input requirements are specified from
the external system point of view. Thus, ad­dress setup time is shown as a minimum
since the system must supply at least that
much time. On the other hand, responses
from the memory are specified from the de­vice point of view. Thus, the access time is
shown as a maximum since the device never
provides data later than that time.

MCM6206BB

3