SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
High–Performance Silicon–Gate CMOS
The MC74HC42 is identical in pinout to the LS42. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
The HC42 decodes a BCD Address to one–of–ten active low outputs. For
Address inputs with a hexadecimal equivalent greater than 9, all outputs,
Y0–Y9, remain high (inactive).
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 104 FETs or 26 Equivalent Gates
LOGIC DIAGRAM
PIN 16 = V
CC
PIN 8 = GND
BCD
ADDRESS
INPUTS
ACTIVE LOW
OUTPUTS
A0
A1
A2
A3
(LSB)
(MSB)
15
14
13
12
11
10
9
7
6
5
4
3
2
1
Y9
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
A3
A2
A1
A0
V
CC
Y7
Y8
Y9
Y3
Y2
Y1
Y0
GND
Y6
Y5
Y4
D SUFFIX
SOIC PACKAGE
CASE 751B–05
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ORDERING INFORMATION
MC74HCXXN
MC74HCXXD
Plastic
SOIC
1
16
1
16
MC74HC42
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
2
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air Plastic DIP†
SOIC Package†
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time VCC = 2.0 V
(Figure 1) VCC = 4.5 V
VCC = 6.0 V
ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Minimum High–Level Input
Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
Maximum Low–Level Input
Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
Vin = VIH or V
IL
|I
out
| v 20 µA
Vin = VIH or VIL|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
Vin = VIH or V
IL
|I
out
| v 20 µA
Vin = VIH or VIL|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
Maximum Input Leakage Current
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
I
out
= 0 µA
µA
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
V
OH
V
OL
Minimum High–Level Output
Voltage
Maximum Low–Level Output
Voltage
V
V