SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
High–Performance Silicon–Gate CMOS
The MC74HC4078 is similar to the CD4078B metal–gate CMOS device.
The device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 30 FETs or 7.5 Equivalent Gates
LOGIC DIAGRAM
A
B
C
D
E
F
G
H
12
11
10
9
5
4
3
2
1
13
Y
X
Y = A + B + C + D + E + F + G + H
X = A + B + C + D + E + F + G + H
PIN 14 = V
CC
PIN 7 = GND
PINS 6, 8 = NO CONNECTION
FUNCTION TABLE
PIN ASSIGNMENT
11
12
13
14
8
9
105
4
3
2
1
7
6
F
G
H
Y
V
CC
NC
E
C
B
A
X
GND
NC
D
NC = NO CONNECTION
Outputs
Inputs A through H Y X
All Inputs L H L
All Other Combinations L H
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
1
14
1
14
ORDERING INFORMATION
MC74HCXXXXN
MC74HCXXXXD
Plastic
SOIC
MC74HC4078
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
2
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air Plastic DIP†
SOIC Package†
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time VCC = 2.0 V
(Figure 1) VCC = 4.5 V
VCC = 6.0 V
ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Minimum High–Level Input
Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
Maximum Low–Level Input
Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
Minimum High–Level Output
Voltage
Vin = VIH or V
IL
|I
out
| v 20 µA
Vin = VIH or VIL|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
Maximum Low–Level Output
Voltage
Vin = VIH or V
IL
|I
out
| v 20 µA
Vin = VIH or VIL|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
Maximum Input Leakage Current
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
I
out
= 0 µA
µA
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.