Motorola MC74F168D, MC74F168N, MC74F169N, MC54F168J, MC54F169J Datasheet

4-82

FAST AND LS TTL DATA

4-STAGE SYNCHRONOUS
BIDIRECTIONAL COUNTERS

The MC54/74F168 and MC54/74F169 are fully synchronous 4-stage up/
down counters. The F168 is a BCD decade counter; the F169 is a modulo-16
binary counter. Both feature a preset capability for programmable operation,
carry lookahead for easy cascading, and a U/D

input to control the direction
of counting. All state changes, whether in counting or parallel loading, are initi­ated by the LOW-to-HIGH transition of the clock.

• Asynchronous Counting and Loading

• Built-In Lookahead Carry Capability

• Presettable for Programmable Operation

CONNECTION DIAGRAM (TOP VIEW)

1516 14 13 12 11 10

21 3 4 5 6 7

V

CC

9

8

TC

Q0Q1Q2Q3CET PE

U/D CP P0P1P2P3CEP GND

MODE SELECT TABLE

PE CEP CET U/D

Action on Rising

Clock Edge

L X X X

Load (Pn º Qn)
H L L H Count Up (Increment)
H L L L Count Down (Decrement)
H H X X No Change (Hold)
H X H X No Change (Hold)

H = HIGH Voltage Level; L = LOW Voltage Level; X = Don’t Care

0

15

14

13

812

5

1411

1510

7 6 12

13

31

MC54/74F168

COUNT DOWN
COUNT UP

COUNT DOWN
COUNT UP

MC54/74F169

2

4

5

9

8

310 2 4

11 10 9

6

7

STATE DIAGRAMS

MC54/74F168
MC54/74F169

4-STAGE SYNCHRONOUS

BIDIRECTIONAL COUNTERS

FAST SCHOTTKY TTL

J SUFFIX

CERAMIC

CASE 620-09

N SUFFIX

PLASTIC

CASE 648-08

16

1

16

1

ORDERING INFORMATION

MC54FXXXJ Ceramic
MC74FXXXN Plastic
MC74FXXXD SOIC

16

1

D SUFFIX

SOIC

CASE 751B-03

LOGIC SYMBOL

PE P0P1P2P

3

TC

U/D
CEP
CET
CP

Q0Q1Q2Q

3

3 4 5 69

10

2

1
7

14 13 12 11

15

VCC = Pin 16
GND = Pin 8

4-83

FAST AND LS TTL DATA

MC54/74F168 • MC54/74F169

NOTE:
These diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.

MC54/74F168

MC54/74F169

LD T

BT
BF

UP
DN

ENF

Q

CP

DETAIL A

DETAIL A DETAIL A

PE

CEP

CET

U/D

CP

P

0

P

1

P

2

P

3

T

LD

AT

AF

UP
DN

CP

Q

DETAIL A

ENF

Q

0

Q

1

Q

2

Q

3

J K

CP

Q Q

TC

LD T

BT
BF

UP
DN

ENF

Q

CP

DETAIL A

DETAIL A DETAIL A

PE

CEP

CET

U/D

CP

P

0

P

1

P

2

P

3

T

LD

AT
AF

UP
DN

CP

Q

DETAIL A

ENF

Q

0

Q

1

Q

2

Q

3

J K

CP

Q Q

TC

LOGIC DIAGRAMS