5-1
FACT DATA
The MC74AC256/74ACT256 dual addressable latch has four distinct modes
of operation which are selectable by controlling the Clear and Enable inputs
(see Function Table). In the addressable latch mode, data at the Data (D) inputs
is written into the addressed latches. The addressed latches will follow the Data
input with all unaddressed latches remaining in their previous states.
In the memory mode, all latches remain in their previous states and are
unaffected by the Data or Address inputs. To eliminate the possibility of entering
erroneous data in the latches, the enable should be held HIGH (inactive) while
the address lines are changing. In the dual 1-of-4 decoding or demultiplexing
mode (MR
= E = LOW), addressed outputs will follow the level of the D inputs
with all other outputs LOW. In the clear mode, all outputs are LOW and unaffected
by the Address and Data inputs.
• Combines Dual Demultiplexer and 8-Bit Latch
• Serial-to-Parallel Capability
• Output from Each Storage Bit Available
• Random (Addressable) Data Entry
• Easily Expandable
• Common Clear Input
• Useful as Dual 1-of-4 Active HIGH Decoder
1516 14 13 12 11 10
21 3 4 5 6 7
V
CC
9
8
MR E DbQ3bQ2bQ1bQ
0b
A0A1DaQ0aQ1aQ2aQ3aGND
DUAL 4-BIT
ADDRESSABLE
LATCH
N SUFFIX
CASE 648-08
PLASTIC
D SUFFIX
CASE 751B-05
PLASTIC
LOGIC SYMBOL
D
a
D
b
A
0
A
1
E
MR
Q0aQ1aQ2aQ3aQ0bQ1bQ2bQ
3b
查询MC74AC256供应商
MC74AC256 MC74ACT256
5-2
FACT DATA
MODE SELECT-FUNCTION TABLE
Operating
Inputs Outputs
Operating
Mode
MR E D A0A1Q
0
Q
1
Q
2
Q
3
Master Reset L H X X X L L L L
L L d L L Q = d L L L
Demultiplex (Active HIGH L L d H L L Q = d L L
Decoder when D = H) L L d L H L L Q = d L
L L d H H L L L Q = d
Store (Do Nothing) H H X X X q
0
q
1
q
2
q
3
H L d L L Q = d q
1
q
2
q
3
Addressable H L d H L q
0
Q = d q
2
q
3
Latch H L d L H q
0
q1Q = d q
3
H L d H H q
0
q
1
q
2
Q = d
H = HIGH Voltage Level Steady State
L = LOW Voltage Level Steady State
X = Immaterial
d = HIGH or LOW Data one setup time prior to the LOW-to-HIGH Enable transition
q = Lower case letters indicate the state of the referenced output established during the last cycle in
which it was addressed or cleared.
D
a
A
0
A
1
MR D
b
Q
1a
Q
2a
Q
3a
Q
0b
Q
1b
Q
2b
Q
3b
E
Q
0a
LOGIC DIAGRAM
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
MAXIMUM RATINGS*
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) –0.5 to +7.0 V
V
in
DC Input Voltage (Referenced to GND) –0.5 to VCC +0.5 V
V
out
DC Output Voltage (Referenced to GND) –0.5 to VCC +0.5 V
I
in
DC Input Current, per Pin ±20 mA
I
out
DC Output Sink/Source Current, per Pin ±50 mA
I
CC
DC VCC or GND Current per Output Pin ±50 mA
T
stg
Storage Temperature –65 to +150 °C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended
Operating Conditions.
MC74AC256 MC74ACT256
5-3
FACT DATA
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Typ Max Unit
′AC 2.0 5.0 6.0
VCCSupply Voltage
′ACT 4.5 5.0 5.5
V
Vin, V
out
DC Input Voltage, Output Voltage (Ref. to GND) 0 V
CC
V
VCC @ 3.0 V 150
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
VCC @ 4.5 V 40 ns/V
r
, t
f
′AC Devices except Schmitt Inputs
VCC @ 5.5 V 25
VCC @ 4.5 V 10
tr, t
f
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
VCC @ 5.5 V 8.0
ns/V
T
J
Junction Temperature (PDIP) 140 °C
T
A
Operating Ambient Temperature Range –40 25 85 °C
I
OH
Output Current — High –24 mA
I
OL
Output Current — Low 24 mA
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
DC CHARACTERISTICS
74AC 74AC
Symbol
Parameter
V
CC
(V)
TA = +25°C
TA =
–40°C to +85°C
Unit
Conditions
Typ Guaranteed Limits
V
IH
3.0 1.5 2.1 2.1 V
OUT
= 0.1 V
4.5 2.25 3.15 3.15 V or VCC – 0.1 V
5.5 2.75 3.85 3.85
V
IL
3.0 1.5 0.9 0.9 V
OUT
= 0.1 V
4.5 2.25 1.35 1.35 V or VCC – 0.1 V
5.5 2.75 1.65 1.65
V
OH
3.0 2.99 2.9 2.9 I
OUT
= –50 µA
Output Voltage
4.5 4.49 4.4 4.4 V
5.5 5.49 5.4 5.4
*VIN = VIL or V
IH
3.0 2.56 2.46
–12 mA
4.5 3.86 3.76
V
I
OH
–24 mA
5.5 4.86 4.76 –24 mA
V
OL
3.0 0.002 0.1 0.1 I
OUT
= 50 µA
4.5 0.001 0.1 0.1 V
5.5 0.001 0.1 0.1
*VIN = VIL or V
IH
3.0 0.36 0.44
12 mA
4.5 0.36 0.44
V
I
OL
24 mA
5.5 0.36 0.44 24 mA
I
IN
5.5
±0.1
±1.0
µA
VI = VCC, GND
I
OLD
5.5 75 mA V
OLD
= 1.65 V Max
I
OHD
Output Current
5.5 –75 mA V
OHD
= 3.85 V Min
I
CC
5.5
8.080µA
VIN = VCC or GND
* All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
tr, t
f
Input Rise and Fall Time (Note 2)
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Maximum Low Level
Output Voltage
Maximum Input
Leakage Current
†Minimum Dynamic
Maximum Quiescent
Supply Current
MC74AC256 MC74ACT256
5-4
FACT DATA
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)
74AC 74AC
Symbol
Parameter
VCC*
(V)
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Unit
Fig.
No.
Min Typ Max Min Max
Propagation Delay
3.3 2.0 9.0 14.5 1.5 17.0
t
PLH
Dn to Q
n
5.0 2.0 6.5 10.0 1.5 11.5
ns
3-5
Propagation Delay
3.3 2.0 9.0 13.5 1.5 16.0
t
PHL
Dn to Q
n
5.0 2.0 6.0 9.5 1.5 11.0
ns
3-5
Propagation Delay
3.3 2.0 10.5 15.0 1.5 17.5
t
PLH
E to Q
n
5.0 2.0 7.0 10.5 1.5 12.5
ns
3-6
Propagation Delay
3.3 2.0 8.0 12.5 1.5 15.0
t
PHL
E to Q
n
5.0 2.0 7.5 9.0 1.5 11.0
ns
3-6
Propagation Delay
3.3 2.0 12.0 19.0 1.5 22.5
t
PLH
Address to Q
n
5.0 2.0 8.0 13.0 1.5 15.5
ns
3-6
Propagation Delay
3.3 2.0 10.0 16.0 1.5 19.0
t
PHL
Address to Q
n
5.0 2.0 7.0 11.0 1.5 13.0
ns
3-6
Propagation Delay
3.3 2.0 8.0 12.0 1.5 13.5
t
PHL
MR to Q 5.0 2.0 6.0 9.0 1.5 10.0
ns
3-7
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
AC OPERATING REQUIREMENTS
74AC 74AC
Symbol
Parameter
VCC*
(V)
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Unit
Fig.
No.
Typ Guaranteed Minimum
Setup Time, HIGH or LOW 3.3 3.5 4.5
t
s
Dn to E 5.0 2.5 3.5
ns
3-9
Hold Time, HIGH or LOW 3.3 2.5 2.5
t
h
Dn to E 5.0 2.0 2.0
ns
3-9
Setup Time 3.3 7.0 9.0
t
s
Address to E 5.0 4.0 6.0
ns
3-6
Hold Time 3.3 2.0 2.0
t
h
Address to E 5.0 2.0 2.0
ns
3-6
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
MC74AC256 MC74ACT256
5-5
FACT DATA
DC CHARACTERISTICS
74ACT 74ACT
Symbol
Parameter
V
CC
(V)
TA = +25°C
TA =
–40°C to +85°C
Unit
Conditions
Typ Guaranteed Limits
V
IH
4.5 1.5 2.0 2.0
V
OUT
= 0.1 V
5.5 1.5 2.0 2.0
V
or VCC – 0.1 V
V
IL
4.5 1.5 0.8 0.8
V
OUT
= 0.1 V
5.5 1.5 0.8 0.8
V
or VCC – 0.1 V
V
OH
4.5 4.49 4.4 4.4
I
OUT
= –50 µA
5.5 5.49 5.4 5.4
V
*VIN = VIL or V
IH
4.5 3.86 3.76 V
–24 mA
5.5 4.86 4.76
I
OH
–24 mA
V
OL
4.5 0.001 0.1 0.1
I
OUT
= 50 µA
5.5 0.001 0.1 0.1
V
*VIN = VIL or V
IH
4.5 0.36 0.44 V
24 mA
5.5 0.36 0.44
I
OL
24 mA
I
IN
5.5
±0.1
±1.0
µA
VI = VCC, GND
∆I
CCT
Additional Max. ICC/Input 5.5 0.6 1.5 mA VI = VCC – 2.1 V
I
OLD
5.5 75 mA V
OLD
= 1.65 V Max
I
OHD
Output Current
5.5 –75 mA V
OHD
= 3.85 V Min
I
CC
5.5
8.080µA
VIN = VCC or GND
* All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
Maximum Low Level
Output Voltage
Maximum Input
Leakage Current
†Minimum Dynamic
Maximum Quiescent
Supply Current
MC74AC256 MC74ACT256
5-6
FACT DATA
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)
74ACT 74ACT
Symbol
Parameter
VCC*
(V)
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Unit
Fig.
No.
Min Typ Max Min Max
t
PLH
5.0
2.0
6.5
11.5
1.5
13.0ns3-5
t
PHL
5.0
2.0
7.0
11.0
1.5
12.5ns3-5
t
PLH
to Q
n
5.0
2.0
8.0
12.0
1.5
14.0ns3-6
t
PHL
to Q
n
5.0
2.0
6.5
10.5
1.5
12.5ns3-6
t
PLH
5.0
2.0
10.5
14.5
1.5
17.0ns3-6
t
PHL
5.0
2.0
9.0
12.5
1.5
14.5ns3-6
t
PHL
to Q
5.0
2.0
7.0
10.5
1.5
11.5ns3-7
* Voltage Range 5.0 V is 5.0 V ±0.5 V.
AC OPERATING REQUIREMENTS
74ACT 74ACT
Symbol
Parameter
VCC*
(V)
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Unit
Fig.
No.
Typ Guaranteed Minimum
t
s
5.0
3.5
4.5
ns
3-9
t
h
5.0
2.5
2.5
ns
3-9
t
s
5.0
5.5
6.5
ns
3-6
t
h
5.0
2.5
2.5
ns
3-6
* Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol Parameter
Value
Typ
Unit Test Conditions
C
IN
Input Capacitance 4.5 pF VCC = 5.0 V
C
PD
Power Dissipation Capacitance 30.0 pF VCC = 5.0 V
Propagation Delay
Dn to Q
n
Propagation Delay
Dn to Q
n
Propagation Delay
E
Propagation Delay
E
Propagation Delay
Address to Q
Propagation Delay
Address to Q
Propagation Delay
MR
n
n
Setup Time, HIGH or LOW
Dn to E
Hold Time, HIGH or LOW
Dn to E
Setup Time
Address to E
Hold Time
Address to E
MC74AC256 MC74ACT256
5-7
FACT DATA
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC DIP PACKAGE
CASE 738–03
ISSUE E
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
–A–
–B–
20
1
11
10
S
A
M
0.010 (0.25) B
S
T
D20X
M
B
M
0.010 (0.25)
P10X
J
F
G
18X
K
C
–T–
SEATING
PLANE
M
R
X 45
_
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 12.65 12.95 0.499 0.510
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
F 0.50 0.90 0.020 0.035
G 1.27 BSC 0.050 BSC
J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029
_ _
_ _
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
M
L
J
20 PL
M
B
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 25.66 27.171.010 1.070
B 6.10 6.600.240 0.260
C 3.81 4.570.150 0.180
D 0.39 0.550.015 0.022
G 2.54 BSC0.100 BSC
J 0.21 0.380.008 0.015
K 2.80 3.550.110 0.140
L 7.62 BSC0.300 BSC
M 0 15 0 15
N 0.51 1.010.020 0.040
_ __ _
E
1.27 1.770.050 0.070
1
11
10
20
–A–
SEATING
PLANE
K
N
FG
D
20 PL
–T–
M
A
M
0.25 (0.010) T
E
B
C
F
1.27 BSC0.050 BSC
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MC74AC256/D
*MC74AC256/D*
◊
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