Motorola MC54HCT08AJ, MC74HCT08AD Datasheet
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
% "%$ $ &$
!"$ "%$#
High–Performance Silicon–Gate CMOS
The MC54/74HCT08A may be used as a level converter for interfacing
TTL or NMOS outputs to high–speed CMOS inputs.
The HCT08A is identical in pinout to the LS08.
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS–Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 40 FETs or 10 Equivalent Gates
LOGIC DIAGRAM
3
Y1
1
A1
PIN 14 = V
CC
PIN 7 = GND
2
B1
Y4
Y = AB
6
Y2
4
A2
5
B2
8
Y3
9
A3
10
B3
11
12
A4
13
B4
FUNCTION TABLE
PIN ASSIGNMENT
11
12
13
14
8
9
105
4
3
2
1
7
6
B3
Y4
A4
B4
V
CC
Y3
A3
A2
Y1
B1
A1
GND
Y2
B2
A
L
L
H
H
Inputs Output
B
L
H
L
H
Y
L
L
L
H
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ORDERING INFORMATION
MC54HCTXXAJ
MC74HCTXXAN
MC74HCTXXAD
Ceramic
Plastic
SOIC
1
14
1
14
J SUFFIX
CERAMIC PACKAGE
CASE 632–08
1
14
MC54/74HCT08A
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
V
in
DC Input Voltage (Referenced to GND)
– 1.5 to VCC + 1.5
V
V
out
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
I
in
DC Input Current, per Pin
± 20
mA
I
out
DC Output Current, per Pin
± 25
mA
I
CC
DC Supply Current, VCC and GND Pins
± 50
mA
P
D
Power Dissipation in Still Air,Plastic or Ceramic DIP†
SOIC Package†
750
500
mW
T
stg
Storage Temperature
– 65 to + 150
_
C
T
L
Lead Temperature, 1 mm from case for 10 Seconds
(SOIC or Plastic DIP)
(Ceramic DIP)
260
300
_
C
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
Ceramic DIP: – 10 mW/_C from 100_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
4.5
5.5
V
Vin, V
out
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
A
Operating Temperature, All Package Types
– 55
+ 125
_
C
tr, t
f
Input Rise and Fall Time (Figure 1)
0
500
ns
DC CHARACTERISTICS FOR THE MC54/74HCT08A (Voltages Referenced to GND)
Guaranteed Limit
V
– 55 to
25_C
v
85_C
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
v
125_C
Symbol
Parameter
Test Conditions
V
CC
Volts
Min
Max
Min
ÎÎÎ
ÎÎÎ
ÎÎÎ
Max
ÎÎ
ÎÎ
ÎÎ
Min
Max
Unit
V
IH
Minimum High–Level Input
Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
4.5
5.5
2.00
2.00
2.00
2.00
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
2.00
2.00
V
V
IL
Maximum Low–Level Input
Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
4.5
5.5
0.80
0.80
ÎÎÎ
ÎÎÎ
ÎÎÎ
0.80
0.80
ÎÎ
ÎÎ
ÎÎ
0.80
0.80
V
V
OH
Minimum High–Level
Output Voltage
Vin = VIH or V
IL
|I
out
| v 20 µA
4.5
5.5
4.40
5.40
4.40
5.40
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
4.40
5.40
V
Vin = VIH or V
IL
|I
out
| v 4.0 mA
4.5
3.98
3.84
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
3.70
V
OL
Maximum Low–Level
Output Voltage
Vin = VIH or V
IL
|I
out
| v 20 µA
4.5
5.5
0.10
0.10
ÎÎÎ
ÎÎÎ
ÎÎÎ
0.10
0.10
ÎÎ
ÎÎ
ÎÎ
0.10
0.10
V
Vin = VIH or V
IL
|I
out
| v 4.0 mA
4.5
0.26
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
0.33
ÎÎ
ÎÎ
ÎÎ
ÎÎ
0.40
I
in
Maximum Input Leakage
Current
Vin = VCC or GND
5.5
±0.10
ÎÎÎ
ÎÎÎ
ÎÎÎ
±1.00
ÎÎ
ÎÎ
ÎÎ
±1.00
µA
I
CC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
|I
out
| = 0 µA
5.5
1
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
10
ÎÎ
ÎÎ
ÎÎ
ÎÎ
40
µA
∆I
CC
Additional Quiescent
Supply Current
Vin = 2.4 V, Any One Input
Vin = VCC or GND,
≥–55_C
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
25_ to 125_C
Other Inputs
l
out
= 0 mA
5.5
2.9
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
2.4
mA
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
Loading...