Motorola MC54HC4538AJ Datasheet
SEMICONDUCTOR TECHNICAL DATA
3–1
REV 6
Motorola, Inc. 1995
10/95
!
! "
The MC54/74HC4538A is identical in pinout to the MC14538B. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
This dual monostable multivibrator may be triggered by either the positive
or the negative edge of an input pulse, and produces a precision output
pulse over a wide range of pulse widths. Because the device has conditioned
trigger inputs, there are no trigger–input rise and fall time restrictions. The
output pulse width is determined by the external timing components, Rx and
Cx. The device has a reset function which forces the Q output low and the Q
output high, regardless of the state of the output pulse circuitry.
• Unlimited Rise and Fall Times Allowed on the Trigger Inputs
• Output Pulse is Independent of the Trigger Pulse Width
• ± 10% Guaranteed Pulse Width Variation from Part to Part (Using the
Same Test Jig)
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 3.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 145 FETs or 36 Equivalent Gates
LOGIC DIAGRAM
PIN 16 = V
CC
PIN 8 = GND
RX AND CX ARE EXTERNAL COMPONENTS
PIN 1 AND PIN 15 MUST BE HARD WIRED TO GND
CX1 RX1
V
CC
Q1
RESET 1
B1
A1
TRIGGER
INPUTS
Q1
1 2
4
5
3
6
7
CX2 RX2
V
CC
Q2
RESET 2
B2
A2
TRIGGER
INPUTS
Q2
15 14
12
11
13
10
9
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
A2
RESET 2
CX2/RX2
GND
V
CC
Q2
Q2
B2
A1
RESET 1
CX1/RX1
GND
GND
Q1
Q1
B1
FUNCTION TABLE
Inputs Outputs
Reset A B Q Q
H H
H L
H X L Not Triggered
H H X Not Triggered
H L,H, H Not Triggered
H L L,H, Not Triggered
L X X L H
X X Not Triggered
D SUFFIX
SOIC PACKAGE
CASE 751B–05
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ORDERING INFORMATION
MC54HCXXXXAJ
MC74HCXXXXAN
MC74HCXXXXAD
Ceramic
Plastic
SOIC
1
16
1
16
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
1
16
MC54/74HC4538A
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
3–2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
V
in
DC Input Voltage (Referenced to GND)
– 1.5 to VCC + 1.5
V
V
out
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
I
in
DC Input Current, per Pin A, B, Reset
Cx, R
x
± 20
± 30
mA
I
out
DC Output Current, per Pin
± 25
mA
I
CC
DC Supply Current, VCC and GND Pins
± 50
mA
P
D
Power Dissipation in Still Air,Plastic or Ceramic DIP†
SOIC Package†
750
500
mW
T
stg
Storage Temperature
– 65 to + 150
_
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
(Ceramic DIP)
260
300
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
Ceramic DIP: – 10 mW/_C from 100_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
3.0**
6.0
V
Vin, V
out
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
A
Operating Temperature, All Package Types
– 55
+ 125
_
C
Input Rise and Fall Time VCC = 2.0 V
(Figure 7) VCC = 4.5 V
VCC = 6.0 V
0
0
0
1000
500
400
ns
A or B (Figure 5)
—
No Limit
R
x
External Timing Resistor VCC < 4.5 V
VCC ≥ 4.5 V
1.0
2.0
*
*
kΩ
C
x
External Timing Capacitor
0
*
µF
*The maximum allowable values of Rx and Cx are a function of the leakage of capacitor Cx, the leakage of the HC4538A, and leakage due to
board layout and surface resistance. For most applications, Cx/Rx should be limited to a maximum value of 10 µF/1.0 MΩ. V alues of Cx > 1.0 µF
may cause a problem during power down (see Power Down Considerations). Susceptibility to externally induced noise signals may occur for
Rx > 1.0 MΩ.
**The HC4538A will function at 2.0 V but for optimum pulse width stability, VCC should be above 3.0 V.
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
tr, t
f
MC54/74HC4538A
High–Speed CMOS Logic Data
DL129 — Rev 6
3–3 MOTOROLA
DC CHARACTERISTICS FOR THE MC54/74HC4538A
Guaranteed Limits
V
– 55 to
25_C
v
85_C
v
125_C
Symbol
Parameter
Test Conditions
V
CC
Volts
Min
Max
Min
Max
Min
Max
Unit
V
IH
Minimum High–Level
Input Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
V
IL
Maximum Low–Level
Input Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
2.0
4.5
6.0
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
V
Vin = VIH or V
IL
|I
out
| v 20 µA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
Vin = VIH or V
IL
|I
out
| v –4.0 mA
|I
out
| v –5.2 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.7
5.2
Vin = VIH or V
IL
|I
out
| v 20 µA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
Vin = VIH or V
IL
|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.4
0.4
I
in
Maximum Input
Leakage Current
(A, B, Reset)
Vin = VCC or GND
6.0
± 0.1
± 1.0
± 1.0
µA
I
in
Maximum Input
Leakage Current
(Rx, Cx)
Vin = VCC or GND
6.0
± 50
± 500
± 500
nA
I
CC
Maximum Quiescent
Supply Current
(per package)
Standby State
Vin = VCC or GND
Q1 and Q2 = Low
I
out
= 0 µA
6.0
130
220
350
µA
25_C
– 45_C to
85_C
– 55_C to
125_C
Active State
I
out
= 0 µA
Pins 2 and 14 = 0.5 V
CC
400
600
800
µA
V
V
Minimum High–Level
OH
Output Voltage
Maximum Low–Level
OL
Output Voltage
V
V
I
CC
Maximum Supply Current
(per package)
Vin = VCC or GND
Q1 and Q2 = High
6.0
MC54/74HC4538A
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
3–4
AC CHARACTERISTICS FOR THE MC54/74HC4538A (C
L
= 50 pF, Input tr = tf = 6.0 ns)
Guaranteed Limits
– 55 to
25_C
v
85_C
v
125_C
Symbol
Parameter
V
CC
Volts
Min
Max
Min
Max
Min
Max
Unit
t
PLH
Maximum Propagation Delay
Input A or B to Q
(Figures 6 and 8)
2.0
4.5
6.0
175
35
30
220
44
37
265
53
45
ns
t
PHL
Maximum Propagation Delay
Input A or B to NQ
(Figures 6 and 8)
2.0
4.5
6.0
195
39
33
245
49
42
295
59
50
ns
t
PHL
Maximum Propagation Delay
Reset to Q
(Figures 7 and 8)
2.0
4.5
6.0
175
35
30
220
44
37
265
53
45
ns
t
PLH
Maximum Propagation Delay
Reset to NQ
(Figures 7 and 8)
2.0
4.5
6.0
175
35
30
220
44
37
265
53
45
ns
t
TLH
t
THL
Maximum Output Transition Time, Any Output
(Figures 7 and 8)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
C
in
Maximum Input Capacitance (A. B, Reset)
(Cx, Rx)
—
10
25
10
25
10
25
pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–
Speed CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V
150
*Used to determine the no–load dynamic power consumption: PD = CPD V
CC
2
f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
TIMING CHARACTERISTICS FOR THE MC54/74HC4538A (Input t
r
= tf = 6.0 ns)
Guaranteed Limits
– 55 to
25_C
v
85_C
v
125_C
Symbol
Parameter
V
CC
Volts
Min
Max
Min
Max
Min
Max
Unit
t
rec
Minimum Recovery Time, Inactive to A or B
(Figure 7)
2.0
4.5
6.0
0
0
0
0
0
0
0
0
0
ns
t
w
Minimum Pulse Width, Input A or B
(Figure 6)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
ns
t
w
Minimum Pulse Width, Reset
(Figure 7)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
ns
Maximum Input Rise and Fall Times, Reset
(Figure 7)
2.0
4.5
6.0
1000
500
400
1000
500
400
1000
500
400
A or B
(Figure 7)
2.0
4.5
6.0
No Limit
C
Power Dissipation Capacitance (Per Multivibrator)*
PD
tr, t
f
pF
ns
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