MOTOROLA MC33560DTB, MC33560DTBR2, MC33560DW, MC33560DWR2 Datasheet

MC33560
Power Management and Interface IC for Smartcard Readers and Couplers
100% Compatible with ISO 7816–3 Standard
Wide Battery Supply Voltage Range: 1.8V < V
Programmable V
Supply for 3V or 5V Card Operation
CC
Power Management for Very Low Quiescent Current in Stand By
Mode (30µA max)
Microprocessor Wake–up Signal Generated Upon Card Insertion
Self Contained DC/DC Converter to Generate V
of Passive Components
Controlled Power Up/Down Sequence for High Signal Integrity on
the Card I/O and Signal Lines
Programmable Card Clock Generator
Chip Select Capability for Parallel Coupler Operation
High ESD Protection on Card Pins (4kV, Human Body Model)
Fault Monitoring V
BATlow
, V
CClow
and I
CClim
All Card Outputs Current Limited and Short Circuit Protected
T ested Operating Temperature Range: –25°C to +85°C
Figure 1. Simplified Functional Block Diagram
VBAT
ILIM
PGND
PWRON
INT
RDYMOD
CS
L1
POWER
MANAGER
AND
PROGRAMMING
DC/DC
CONVERTER
< 6.6V
BAT
using a Minimum
CC
CARD
DETECTOR
DELAY
CRDDET CRDCON
24
DTB SUFFIX
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TSSOP–24
CASE 948H
24
PIN CONNECTIONS
124
PGND
PWRON
RDYMOD
INVOUT
ASYCLKIN
SYNCLK
CRDGND
2
INT
3 4
CS
5
RESET
6 7
IO CRDCON
8
9 10 11
CRDIO CRDRST
12
(Top View)
23 22 21 20 19 18 17 16 15 14 13
SO–24L DW SUFFIX CASE 751E
1
ILIM VBAT L1 C4 C8 CRDC8
CRDDET CRDC4 CRDCLK
CRDVCC
SYNCLK
ASYCLKIN
INVOUT
IO
RESET
C4 C8
Semiconductor Components Industries, LLC, 1999
October, 1999 – Rev. 0
CLOCK
GENERATOR
VBAT
LEVEL
TRANSLATOR
ORDERING INFORMATION
CRDVCC CRDIO
CRDRST CRDC4
CRDC8 CRDCLK CRDGND
1 Publication Order Number:
Device Package Shipping
MC33560DW MC33560DWR2 MC33560DTB MC33560DTBR2
SO–24WB 30 Units/Rail
SO–24WB 1000 Tape & Reel TSSOP–24 62 Units/Rail TSSOP–24 2500 Tape & Reel
MC33560/D
MC33560
MAXIMUM RATINGS (Note 1)
Rating
Battery Supply Voltage V Battery Supply Current I Power Supply Voltage V Power Supply Current I Digital Input Pins
(2, 4, 5, 6, 7, 9, 10, 17, 18, 20, 21)
Digital Output Pins (3, 4, 8) V
Card Interface Pins (11, 13, 14, 15, 16, 19) V
Coil Driver Pin (22), ILIM (pin 24) Power Ground (pin 1)
ESD Capability: (Note 2) Standard Pins (2, 3, 4, 5, 6, 7, 8, 9, 10, 17, 18,
20, 21, 22, 23, 24)
Card Interface Pins (11, 13, 14, 15, 16, 19) SO–24WB Package:
Power Dissipation @ TA = 85 °C Thermal Resistance Junction to Air
TSSOP–24 Package:
Power Dissipation @ TA = 85 °C
Thermal Resistance Junction to Air Operating Ambient Temperature Range T Operating Junction Temperature Range T Max. Junction Temperature (Note 3) T Storage Temperature Range T
Note 1: Maximum electrical ratings are those values beyond which damage to the device may. TA = 25°C Note 2: Human body model, R = 1500W, C = 100pF Note 3: Maximum thermal rating beyond which damage to the device may occur This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, input and output voltages should be constrained to the ranges indicated in the recommended operating conditions.
Symbol Value Unit
BAT
BAT
CC
V
I
OUT
I
OUT
Card
I
Card
V
ESD
P
R
θJAs
P
R
θJAt
Jmax
CC
IN
IN
I
L
Ds
Dt
A
stg
– 0.5 to VBAT + 0.5 but < 7
– 0.5 to VBAT + 0.5 but < 7
– 0.5 to VCC + 0.5
J
7 V
± 200 mA
6 V
± 150 mA
± 5
±10
± 25
± 200 ± 100
2
4
285 140
220 180
– 40 to + 85 °C
– 40 to + 125 °C
150 °C
– 65 to + 150 °C
V
mA
V
mA
V
mA mA
kV
kV
mW
°C/W
mW
°C/W
ELECTRICAL CHARACTERISTICS These specifications are written in the same style as common for standard
integrated circuits. The convention considers current flowing into the pin (sink current) as positive and current flowing out of the pin (source current) as negative. (Conditions: V 85°C, L1 =47µH, R
BATTERY POWER SUPPLY SECTION
Supply Voltage Range
normal operating range extended operating range (Note 4) MC33560 Stand By Quiescent Current
PWRON = GND, CRDCON = GND, ASYCLKIN = GND, V
all other logic inputs and outputs open
DC Operating Current
–ICC = 10mA ; VCC =5V ,V V
undervoltage detection:
BAT
Upper Threshold
Lower Threshold
Hysteresis
Note 4: See figures 2 and 3.
=0W, CRDVCC capacitor=10µF, unless otherwise noted.)
LIM
Characteristic
= 6V
BAT
= 4V, VCC = 5V nom, PWRON = V
BAT
= 6V,
BAT
, operating mode, –ICC = 10mA, –25°C ≤ TA
BAT
Symbol Min Typ Max Unit
V
BAT
I
oBAT
I
BATop
2.2
1.8
6.0
6.6 30
12.5 mA
1.6
1.4
0.2
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2
V
m
s
V
MC33560
VCC = 5V NOMINAL POWER SUPPLY SECTION
Characteristic
Output Voltage 2.2V v V
Card VCC Undervoltage Detection:
Upper Threshold Lower Threshold Switching Hysteresis
Peak Output Current VCC = 4V, internally limited
Current limit time–out VCC = 4V t Start–up Current VCC = 2V; 0°C to +85°C
Low Side Switch Saturation Voltage IL = 50mA, pin 22 V Rectifier on Saturation Voltage IL = 50mA, pin 22 to pin 13 V Converter Switching Frequency TA = 25 °C f Shut Down Current
(Card access deactivated)
VCC = 3V NOMINAL POWER SUPPLY SECTION (V
Characteristic
Output Voltage 2.2V v V
Card VCC Undervoltage Detection:
Upper Threshold Lower Threshold Switching Hysteresis
Start–up Current Shut Down Current
(Card access deactivated)
APPLICATION INTERFACE DC SECTION (V
Characteristic
Input High Threshold Voltage
(increasing)
Input Low Threshold Voltage
(decreasing)
Switching Hysteresis pins 2, 4, 5, 6, 10, 17 V Threshold Voltage pin 9
Pull–down resistance VIN = V Pull–up resistance VIN = 0.5V, pin 3, 4, 5 R Output High Voltage IOH = –2.5µA, pin 3, pin 4 for CS = H
Output Low Voltage IOL = 1.0 mA, pins 7, 20, 21
Input Leakage Current VIN = 2.5V, CS = H, pins 9, 17, 18,
1mA v –ICC v 10mA
2.5V v V 1mA v –ICC v 50mA
(RDYMOD output) (see table 4)
VCC = 2V PWRON = GND, VCC = 2V
pins 2, 4, 5, 6, 10, 17 V
pins 2, 5, 6, 10 pin 17 pin 4
pin18
IOH = –50µA, pins 7, 20,21 IOH = –0.2mA, pin 8 pin 4 ( in output mode)
IOL = 0.2mA, pins 3, 4, 8
20, 21
Test Conditions Symbol
v 6V
1mA v –ICC v 25mA
3.0V v V 1mA v –ICC v 60mA
(RDYMOD output) (see table 4)
(RDYMOD = L)
PWRON = GND, VCC = 2V I
BAT
v 6V
BAT
–40°C to 0°C
= 2.5V, –ICC = 5mA)
BAT
Test Conditions Symbol
v 6V
BAT
v 6V
BAT
= 5V)
BAT
Test Conditions Symbol
–1V, pin 2, 6, 7, 10 R
BAT
Guaranteed Limits
Min Typ Max
V
CC
V
T5H
V
T5L
V
HYS5
–I
CClim
d
–I
CCst
sat22
Fsat22
sw
SD
V
CC
V
T3H
V
T3L
V
HYS3
–I
CCst
I
SD
IH
V
IL
HYST V
TH
down
up
V
OH
V
OL
+/–Ileak 2.0
4.75
4.60
4.2
120
80 mA
80 50
80 mA
Min Typ Max
2.75
2.60
2.4 80
50 50
Min Typ Max
0.55*V
BAT
0.3*V
BAT
0.2*V
BAT
0.3*V
BAT
0.06*V
BAT
0.5*V
BAT
0.4*V
BAT
120 240 500 120 240 500
V
–1 V
BAT
5.0
5.0
VCC–0.14 V
4.5
180
160 ms
100 160 mV 400 520 mV 120 kHz
Guaranteed Limits
3.0
3.0
VCC–0.1
2.7
110
Guaranteed Limits
0.65*V
0.45*V
0.40*V
0.5*V
0.3*V
0.6*V
0.6*V
5.25
5.40
3.25
3.40
0.4 V
BAT
BAT BAT
BAT BAT BAT
BAT
Unit
V
mV
mA
Unit
V
V V
mV
mA
Unit
V
V
V V
k
W
k
W
m
A
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MC33560
CARD INTERFACE DC SECTION (V
Characteristic
Output High Voltage IOH = –20µA, pin 11, 16, 19
Output Low Voltage IOL = 1mA, pins 11, 16, 19
I/O Pull–up resistance, operating
mode, CS
Card pins security voltage (Card access deactivated)
Note 5: the transistors T1 on lines IO, C4 and C8 (see figure 24) have a max Rdson of 250W.
DIGITAL DYNAMIC SECTION (V
Input Clock Frequency pin 9, duty cycle = 50% f Card Clock Frequency pin 15 f Card Clock Duty Cycle (Note 7) pin 15, 50% to 50% VCC ,
Card Clock Rise and Fall Time pin15, 10% 90% V I/O Data Transfer Frequency pin [7, 11], [21, 16], [20, 19] (Note 8) f I/O Duty Cycle pin [7, 11], [21, 16], [20, 19] (Note 8)
I/O Rise and Fall Time pin [7, 11], [21, 16], [20, 19] (Note 8)
I/O Transfer Time pin [7, 11], [21, 16], [20, 19] (Note 8)
Card Signal Sequence Interval pin 11, 14, 15, 16, 19,
Card Detection Filter Time: Card insertion Card extraction
Internal Reset Delay RES, VCC power up/down t Ready Delay Time pin 4 t PWRON low Pulse Width CS = L, pin 2 t
Note 6: Pin loading=30pF, except INVOUT=15pF Note 7: As the clock buffer is optimized for low power consumption and hence not symmetrical, clock signal duty cycle is guaranteed for divide by 2 and divide by 4 ratio. Note 8: In either direction
DIGITAL DYNAMIC SECTION (V
Data Setup Time
RDYMOD, PWRON, RESET, IO
Data Hold Time
RDYMOD, PWRON, RESET, IO
CS low Pulse Width pin 5 t
=L, PWRON =H
Characteristic Test Conditions Symbol Min Typ Max Unit
Characteristic Test Conditions Symbol Min Typ Max Unit
= 5V)
BAT
Test Conditions Symbol
Min Typ Max
V
IOL = 0.2mA, pins 14, 15
IOL = 0.2mA, pins 14, 15 VOL = 0.5V , pin 11, 16, 19 18
PWRON = GND, lin=10mA, pin 11,
14, 15, 16, 19
= 5V, normal operating mode, Note 6)
BAT
fio = 16MHz
CC
50% to 50% V
10% 90% V
50% to 50% VCC , L H, H L
VCC power up/down
= 5V, programming mode, Note 6)
BAT
pin 2, 4, 6, 7 t
pin 2, 4, 6, 7 t
CC
CC
OH
V
OL
V
security
asyclk
crdclk
r
clk
t
rclk
r
t
rio
t
t
dseq
t
fltin
t
fltout
dres drdy
won
smod
hmod
wcs
VCC –0.9 V
45 55 %
, t
fclk io io
, t
fio
tr
45 55 %
50 50
2.0
1.0
1.0
2.0
Guaranteed Limits
Guaranteed Limits
1.0 MHz
0.2 1.0
20
Guaranteed Limits
Unit
0.4 V
2.0 V
20 MHz 20 MHz
10 ns
150 ns
100 ns
150 150
2.0
k
W
m
s
m
s
m
s
m
s
m
s
m
s
m
s
m
s
m
s
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MC33560
IBATop
(
A)
I
(
A)
IBATop
M
(
A)
Figure 2. Maximum Battery and Card Supply
Current vs. V
200 180 160 140 120
m
100
80 60 40 20
0
1.5
2.5 3.5 7.5
ICC MAX
(V
CC
=5V)
BAT
IBATop MAX
4.5 5.5 6.5
VBAT (V)
Mode Sync
SYNCLK=4MHz
L1=47µH
Rlim=0
Figure 4. Battery Current vs. Input Clock Frequency
(ICC=0, V
14
VBAT=4V
12
L1=47µH
Rlim=0
10
ICC=0
m
8 6 4 2 0
2.0 4.0 6.0 8.0 10
0
Frequency (MHz)
BAT
=4V)
Async
Sync
Async/2
Async/4
12 14 16
Figure 3. Maximum Battery and Card Supply
200 180 160 140 120 100
I (mA)
Current vs. V
IBATop MAX
80 60 40 20
0
1.5
2.5 3.5 7.5
(VCC=3V)
BAT
ICC MAX
4.5 5.5 6.5
VBAT (V)
Mode Sync
SYNCLK=4MHz
L1=47µH
Rlim=0
Figure 5. Battery Current vs. Input Clock Frequency
(I
14 12 10
8 6
IBATop (mA)
4 2 0
=0, V
CC
VBAT=2.5V
L1=47µH
Rlim=0
ICC=0
2.0 4.0 6.0 8.0 10
0
Frequency (MHz)
BAT
=2.5V)
Async
Sync
Async/2 Async/4
12 14 16
Figure 6. Maximum Battery Current vs. R
(VCC=5V, V
250
200
L1=100µH
m
150
ax
100
50
L1=22µH
0
0
L1=47µH
12
Rlim (ohms)
=4V)
BAT
Mode Sync
SYNCLK=4MHz
VBAT=4V
34
LIM
5
Figure 7. Maximum Battery Current vs. R
250
200
150
100
IBATop Max (mA)
50
L1=22µH
0
0
(VCC=3V, V
L1=100µH
L1=47µH
12
Rlim (ohms)
BAT
=2.5V)
LIM
Mode Sync
SYNCLK=4MHz
VBAT=2.5V
34
5
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MC33560
Figure 8. Maximum Card Supply Current
vs. R
120 120
L1=100µH
100
80
60
ICC Max (mA)
40
20
L1=22µH
0
0
12
(VCC =5V, V
LIM
L1=47µH
Rlim (ohms)
=4V)
BAT
Mode Sync
SYNCLK=4MHz
VBAT=4V
34
5
Figure 10. Low Side Switch Saturation Voltage
(I
=50mA) vs. Temperature
L
0.08
0.07
0.06
0.05
0.04
0.03
0.02
Low Side Switch Saturation Voltage (V)
0.01
0.00 –25
–5 15 9535 55 75
TA, Ambient Temperature (°C)
100
80
60
ICC Max (mA)
40
20
L1=22µH
0
0
0.35
0.30
0.25
0.20
0.15
0.10
Rectifier On Saturation Voltage (V)
0.05
0.00 –25
Figure 9. Maximum Card Supply Current
vs. R
L1=100µH
12
(VCC =3V, V
LIM
L1=47µH
Rlim (ohms)
=2.5V)
BAT
Mode Sync
SYNCLK=4MHz
VBAT=2.5V
34
Figure 11. Rectifier On Saturation Voltage
(I
=50mA) vs. Temperature
L
–5 15 9535 55 75
TA, Ambient Temperature (°C)
5
Figure 12. Card Detection (insertion) filter time
vs. T emperature
115 110 105
µ
100
95 90 85
tfltin, Filter Time ( s)
80 75
70
–5 15 9535 55 75–25 –5 15 9535 55 75–25
TA, Ambient Temperature (°C) TA, Ambient Temperature (°C)
115 110
105
µ
100
95 90 85
tfltout, Filter Time ( s)
80 75
70
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Figure 13. Card Detection (extraction) filter time
vs. T emperature
MC33560
Figure 14. Pull Down Resistance vs. T emperature
350 330
W
310 290 270 250 230 210
Pull Down Resistance (k )
190 170 150
–25
–5 15 7535 55
TA, Ambient Temperature (°C)
Figure 15. Transition from 5V to 3V Card Supply Figure 16. Transition from 3V to 5V Card Supply
95
Figure 17. Overcurrent Shutoff (t
=160ms)
d
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Figure 18. Undervoltage Shutoff (V
T5L
=4.6 V)
CS
PWRON
INT
RDYMOD
VBAT
240 k
240 k
VBAT
240 k
VBAT
240 k
VBATOK
MC33560
Figure 19. Functional Block Diagram
VBAT
VBAT
VBATOK
CS
PWRON
CS
CARD
CRDVCC
POWER
MANAGEMENT
LOGIC AND
PROGRAMMING
FAUL T
S
Q
LOGIC
R
CRDCON CRDDET
DELAY
t
50 mS
PROGRAM
CARDENABLE
RESET
SYNCLK
ASYCLKIN
C4
C8
CARD PINS
SEQUENCER
SEQ2 SEQ3 SEQ4
SEQ1
VBAT
IO
240 k
SEQ1
CARDENABLE
VBATOK
VBAT
SEQ3
CARDENABLE
VBATOK
VBAT
SEQ3
CARDENABLE
VBATOK
DATA
LATCH
240 k
CARDENABLE
240 k
FAULT ON/OFF 3V/5V
VBAT
DC/DC CONVERTER
BIDIRECTIONAL
I/O
BIDIRECTIONAL
I/O
BIDIRECTIONAL
I/O
CLOCK
GENERATOR
AND
PROGRAMMING
VBAT
LEVEL
SHIFT
SEQ4
CRDVCC
CRDVCC
CRDVCC
CRDVCC
VBAT
LEVEL
SHIFT
CRDVCC
CRDVCC
ILIM L1 CRDVCC
CRDIO
CRDC4
CRDC8
CRDRST
CRDCLK
SEQ2
INVOUT
PROGRAM
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