MOTOROLA MC33363P, MC33363DWR2 Datasheet

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The MC33363 is a monolithic high voltage switching regulator that is specifically designed to operate from a rectified 240 Vac line source. This integrated circuit features an on–chip 700 V/1.0 A SenseFET power switch, 450 V active off–line startup FET, duty cycle controlled oscillator, current limiting comparator with a programmable threshold and leading edge blanking, latching pulse width modulator for double pulse suppression, high gain error amplifier, and a trimmed internal bandgap reference. Protective features include cycle–by–cycle current limiting, input undervoltage lockout with hysteresis, output overvoltage protection, and thermal shutdown. This device is available in a 16–lead dual–in–line and wide body surface mount packages.

• On–Chip 700 V, 1.0 A SenseFET Power Switch

• Rectified 240 V ac Line Source Operation

• On–Chip 450 V Active Off–Line Startup FET

• Latching PWM for Double Pulse Suppression

• Cycle–By–Cycle Current Limiting

• Input Undervoltage Lockout with Hysteresis

• Output Overvoltage Protection Comparator

• Trimmed Internal Bandgap Reference

• Internal Thermal Shutdown

Simplified Application

HIGH VOLTAGE

OFF–LINE

SWITCHING REGULATOR

SEMICONDUCTOR

TECHNICAL DATA

16

1

DW SUFFIX

PLASTIC PACKAGE

CASE 751N

(SOP–16L)

16

1

P SUFFIX

PLASTIC PACKAGE

CASE 648E

(DIP–16)

AC Input

Startup Input

Regulator

Output

8

6

R

T

C

7

T

Mirror

Reg

Osc

PWM

Thermal

Gnd 4, 5, 12, 13

This device contains 221 active transistors.

Startup

PWM Latch

S

Q

R

I

pk

Driver

EA

MOTOROLA ANALOG IC DEVICE DATA

LEB

1

UVLO

OVP

V

CC 3

Overvoltage Protection Input

11 16

Power Switch Drain

Compensation 9

10

Voltage Feedback Input

DC Output

PIN CONNECTIONS

Startup Input

V

CC

Gnd

R

T

C

T

Regulator Output

116

3 4 5 6 7 8

(Top View)

Power Switch Drain

13

Gnd

12

Overvoltage

11

Protection Input Voltage Feedback

10

Input Compensation

9

ORDERING INFORMATION

Operating

Device

MC33363DW MC33363P DIP–16

 Motorola, Inc. 1998 Rev 3

Temperature Range

TJ = –25° to +125°C

Package

SOP–16L

1

MAXIMUM RATINGS

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Rating Symbol Value Unit

Power Switch (Pin 16)

Drain Voltage

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Drain Current

Startup Input Voltage (Pin 1, Note 1)

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Pin 3 = Gnd Pin 3 ≤ 1000 µF to ground

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Power Supply Voltage (Pin 3) Input Voltage Range

Voltage Feedback Input (Pin 10)

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Compensation (Pin 9) Overvoltage Protection Input (Pin 11)

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RT (Pin 6)

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CT (Pin 7)

Thermal Characteristics

P Suffix, Dual–In–Line Case 648E

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Thermal Resistance, Junction–to–Air Thermal Resistance, Junction–to–Case

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(Pins 4, 5, 12, 13)

DW Suffix, Surface Mount Case 751N

Thermal Resistance, Junction–to–Air

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Thermal Resistance, Junction–to–Case

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(Pins 4, 5, 12, 13)

Refer to Figures 15 and NO TAG for additional

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thermal information.

Operating Junction Temperature Storage Temperature

NOTE: ESD data available upon request.

MC33363

V

DS

ÁÁ

I

DS

V

in

ÁÁ

V

CC

V

IR

ÁÁ

R

θJA

R

ÁÁ

θJC

R

ÁÁ

θJA

R

θJC

ÁÁ

T

J

T

stg

700

ÁÁÁ

1.0

ÁÁÁ

400 500

ÁÁÁ

40

–1.0 to V

ÁÁÁ

reg

80 15

95 15

– 25 to +150 – 55 to +150

V

Á

A V

Á

V V

Á

°C/W

Á

°C °C

ELECTRICAL CHARACTERISTICS (V

= 20 V, RT = 10 k, CT = 390 pF, C

CC

= 1.0 µF, for typical values TJ = 25°C,

Pin 8

for min/max values TJ is the operating junction temperature range that applies (Note 2), unless otherwise noted.)

Characteristic

Symbol Min Typ Max Unit

REGULAT OR (Pin 8)

Output Voltage (IO = 0 mA, TJ = 25°C)

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Line Regulation (VCC = 20 V to 40 V)

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Load Regulation (IO = 0 mA to 10 mA)

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Total Output Variation over Line, Load, and Temperature

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OSCILLAT OR (Pin 7)

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Frequency

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CT = 390 pF

TJ = 25°C (VCC = 20 V)

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TJ = T

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CT = 2.0 nF

TJ = 25°C (VCC = 20 V)

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TJ = T

low

to T

(VCC = 20 V to 40 V)

high

(VCC = 20 V to 40 V)

high

Frequency Change with Voltage (VCC = 20 V to 40 V)

V

reg

ÁÁÁ

Reg

line

ÁÁÁ

Reg

load

ÁÁÁ

V

reg

ÁÁÁ

f

OSC

ÁÁÁ

∆f

/∆V

OSC

5.5

ÁÁ

–

ÁÁ

–

ÁÁ

5.3

ÁÁ

260

ÁÁ

255

ÁÁ

60

ÁÁ

59

–

6.5

ÁÁ

30

ÁÁ

44

ÁÁ

–

ÁÁ

285

ÁÁ

–

ÁÁ

67.5

ÁÁ

–

0.1

7.5

ÁÁ

500

ÁÁ

200

ÁÁ

8.0

ÁÁ

310

ÁÁ

315

ÁÁ

75

ÁÁ

76

2.0

ERROR AMPLIFIER (Pins 9, 10)

Voltage Feedback Input Threshold Line Regulation (VCC = 20 V to 40 V, TJ = 25°C) Input Bias Current (VFB = 2.6 V) Open Loop Voltage Gain (TJ = 25°C) Gain Bandwidth Product (f = 100 kHz, TJ = 25°C)

NOTES: 1. Maximum power dissipation limits must be observed.

2.Tested junction temperature range for the MC33363: T

= –25°CT

low

2

high

= +125°C

V

Reg

A GBW

FB

line

I

IB

VOL

2.52 – – – –

2.6

0.6 20

82

1.0

2.68

5.0

500

– –

MOTOROLA ANALOG IC DEVICE DATA

V

ÁÁ

mV

ÁÁ

mV

ÁÁ

V

ÁÁ

kHz

ÁÁ

kHz

V

mV

nA dB

MHz

MC33363

Á

ÁÁÁ

Á

ÁÁÁ ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ÁÁÁ

Á

ELECTRICAL CHARACTERISTICS (continued) (V

= 20 V, RT = 10 k, CT = 390 pF, C

CC

= 1.0 µF, for typical values TJ = 25°C,

Pin 8

for min/max values TJ is the operating junction temperature range that applies (Note 2), unless otherwise noted.)

Characteristic UnitMaxTypMinSymbol

ERROR AMPLIFIER (Pins 9, 10)

Output Voltage Swing

High State (I

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Low State (I

= 100 µA, VFB < 2.0 V)

Source

= 100 µA, V

Sink

> 3.0 V)

FB

V

OH

ÁÁÁ

V

OL

4.0

ÁÁ

–

5.3

ÁÁ

0.2

–

ÁÁ

0.35

V

ÁÁ

OVERVOLTAGE DETECTION (Pin 11)

Input Threshold Voltage Input Bias Current (Vin = 2.6 V)

V

th

I

IB

2.47 –

2.6

100

2.73 500

V

nA

PWM COMPARATOR (Pins 7, 9)

Duty Cycle

Maximum (VFB = 0 V)

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Minimum (VFB = 2.7 V)

DC

(max)

ÁÁÁ

DC

(min)

48

ÁÁ

–

50

ÁÁ

0

52

ÁÁ

0

%

ÁÁ

POWER SWITCH (Pin 16)

Drain–Source On–State Resistance (ID = 200 mA)

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TJ = 25°C TJ = T

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Drain–Source Off–State Leakage Current (VDS = 700 V)

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Rise Time

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Fall Time

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OVERCURRENT COMPARATOR (Pin 16)

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Current Limit Threshold (RT = 10 k)

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low

to T

high

R

DS(on)

ÁÁÁ

I

D(off)

ÁÁÁ

t

r

ÁÁÁ

t

f

ÁÁÁ

I

lim

ÁÁÁ

ÁÁ

– –

ÁÁ

–

ÁÁ

–

ÁÁ

–

ÁÁ

0.5

ÁÁ

14

–

ÁÁ

0.2

ÁÁ

50

ÁÁ

50

ÁÁ

0.72

ÁÁ

17 32

ÁÁ

50

ÁÁ

–

ÁÁ

–

ÁÁ

0.9

ÁÁ

Ω

ÁÁ

µA

ÁÁ

ns

ÁÁ

ns

ÁÁ

A

ÁÁ

STARTUP CONTROL (Pin 1)

Peak Startup Current (Vin = 400 V)

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VCC = 0 V VCC = (V

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th(on)

– 0.2 V)

Off–State Leakage Current (Vin = 50 V, VCC = 20 V)

I

start

ÁÁÁ

I

D(off)

ÁÁ

– –

ÁÁ

–

ÁÁ

20

6.0

ÁÁ

40

ÁÁ

– –

ÁÁ

200

mA

ÁÁ

µA

UNDERVOLTAGE LOCKOUT (Pin 3)

Startup Threshold (VCC Increasing) Minimum Operating Voltage After Turn–On

V

th(on)

V

CC(min)

11

7.5

15.2

9.5

18

11.5

V V

TOTAL DEVICE (Pin 3)

Power Supply Current

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Startup (V Operating

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= 10 V, Pin 1 Open)

CC

I

CC

ÁÁÁ

ÁÁ

– –

ÁÁ

0.25

3.2

ÁÁ

0.5

5.0

ÁÁ

mA

ÁÁ

Figure 1. Oscillator Frequency

versus Timing Resistor

1.0 M

CT = 100 pF

500 k

CT = 200 pF

CT = 500 pF

200 k

CT = 1.0 nF

100 k

CT = 2.0 nF

50 k

, OSCILLAT OR FREQUENCY (Hz)

CT = 5.0 nF

20 k

OSC

f

CT = 10 nF

10 k

7.0

10 15 20 30 50 7.0 10 15 20 30 40 70

RT, TIMING RESISTOR (kΩ)

MOTOROLA ANALOG IC DEVICE DATA

VCC = 20 V

°

C

TA = 25

Figure 2. Power Switch Peak Drain Current

versus Timing Resistor

1.0

0.8

0.6

0.4

0.2

Inductor supply voltage and inductance value are adjusted so that Ipk turn–off is achieved at 5.0

, POWER SWITCH PEAK DRAIN CURRENT (A)

0.1

70 50

PK

I

RT, TIMING RESISTOR (kΩ)

µ

s.

VCC = 20 V CT = 1.0 TA = 25

µ

F

°

C

3

MC33363

, OSCILLAT OR

dscg

/I

chg

I

0.8

0.5

0.3

0.2

0.15

0.1

CHARGE/DISCHARGE CURRENT (mA)

0.08

100

Figure 3. Oscillator Charge/Discharge

Current versus Timing Resistor

7.0

10 15 20 30 70 2.0 3.0 5.0 7.0 10

RT, TIMING RESISTOR (kΩ)

Figure 5. Error Amp Open Loop Gain and

Phase versus Frequency

80

Gain

60

Phase

40

VCC = 20 V

°

C

TA = 25

50

VCC = 20 V VO = 1.0 to 4.0 V RL = 5.0 M CL = 2.0 pF TA = 25

Ω

°

C

0

30

60

90

70

60

50

40

, MAXIMUM OUTPUT DUTY CYCLE (%)

max

D

30

1.0

0

–1.0

– 2.0

Figure 4. Maximum Output Duty Cycle

versus Timing Resistor Ratio

RD/RT Ratio Discharge Resistor Pin 6 to Gnd

TIMING RESISTOR RA TIO

VCC = 20 V CT = 2.0 nF TA = 25

RC/RT Ratio Charge Resistor Pin 6 to V

Figure 6. Error Amp Output Saturation

V oltage versus Load Current

Source Saturation

(Load to Ground)

V

ref

reg

°

C

20

, OPEN LOOP VOL TAGE GAIN (dB)

0

VOL

A

–20

10

Figure 7. Error Amplifier Small Signal

1.80 V

1.75 V

1.70 V

, OUTPUT SA TURATION VOLTAGE (V) V

sat

2.0

1.0

Sink Saturation

(Load to V

0

IO, OUTPUT LOAD CURRENT (mA)

ref

)

Gnd

VCC = 20 V

°

C

TA = 25

120

, EXCESS PHASE (DEGREES)

θ

150

100 1.0 k 10 k 100 k 1.0 M 10 M 0.2 0.4 0.6 0.8 1.0

f, FREQUENCY (Hz)

180

Figure 8. Error Amplifier Large Signal

Transient Response

1.0 µs/DIV

VCC = 20 V AV = –1.0 CL = 10 pF

°

C

TA = 25

3.00 V

1.75 V

20 mV/DIV

0.50 V

Transient Response

1.0 µs/DIV

VCC = 20 V AV = –1.0 CL = 10 pF

°

C

TA = 25

0.5 V/DIV

4

MOTOROLA ANALOG IC DEVICE DATA