Motorola MC14585BD, MC14585BCL, MC14585BCP Datasheet
MOTOROLA CMOS LOGIC DATA
1
MC14585B
The MC14585B 4–Bit Magnitude Comparator is constructed with complementary MOS (CMOS) enhancement mode devices. The circuit has eight
comparing inputs (A3, B3, A2, B2, A1, B1, A0, B0), three cascading inputs
(A < B, A = B, and A > B), and three outputs (A < B, A = B, and A > B). This
device compares two 4–bit words (A and B) and determines whether they
are “less than”, “equal to”, or “greater than” by a high level on the appropriate
output. For words greater than 4–bits, units can be cascaded by connecting
outputs (A > B), (A < B), and (A = B) to the corresponding inputs of the next
significant comparator. Inputs (A < B), (A = B), and (A > B) on the least
significant (first) comparator are connected to a low, a high, and a low,
respectively.
Applications i nclude logic in C PU’s, c orrection and/or detection of
instrumentation conditions, comparator in testers, converters, and controls.
• Diode Protection on All Inputs
• Expandable
• Applicable to Binary or 8421–BCD Code
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load over the Rated Temperature Range
• Can be Cascaded – See Fig. 3
MAXIMUM RATINGS* (Voltages Referenced to V
SS
)
Symbol
Parameter Value Unit
V
DD
DC Supply Voltage – 0.5 to + 18.0 V
Vin, V
out
Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V
Iin, I
out
Input or Output Current (DC or Transient),
per Pin
± 10 mA
P
D
Power Dissipation, per Package† 500 mW
T
stg
Storage Temperature – 65 to + 150
_
C
T
L
Lead Temperature (8–Second Soldering) 260
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
TRUTH TABLE (x = Don’t Care)
Inputs
Comparing Cascading
Outputs
A3, B3 A2, B2 A1, B1 A0, B0 A < B A = B A > B A < B A = B A > B
A3 > B3 x x x x x x 0 0 1
A3 = B3 A2 > B2 x x x x x 0 0 1
A3 = B3 A2 = B2 A1 > B1 x x x x 0 0 1
A3 = B3 A2 = B2 A1 = B1 A0 > B0 x x x 0 0 1
A3 = B3 A2 = B2 A1 = B1 A0 = B0 0 0 x 0 0 1
A3 = B3 A2 = B2 A1 = B1 A0 = B0 0 1 x 0 1 0
A3 = B3 A2 = B2 A1 = B1 A0 = B0 1 0 x 1 0 0
A3 = B3 A2 = B2 A1 = B1 A0 = B0 1 1 x 1 1 0
A3 = B3 A2 = B2 A1 = B1 A0 < B0 x x x 1 0 0
A3 = B3 A2 = B2 A1 < B1 x x x x 1 0 0
A3 = B3 A2 < B2 x x x x x 1 0 0
A3 < B3 x x x x x x 1 0 0
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1995
REV 3
1/94
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP Plastic
MC14XXXBCL Ceramic
MC14XXXBD SOIC
TA = – 55° to 125°C for all packages.
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
BLOCK DIAGRAM
14
15
1
2
9
7
11
10
5
6
4
13
3
12
VDD = PIN 16
VSS = PIN 8
(A > B)
in
(A = B)
in
(A < B)
in
A0
B0
A1
B1
A2
B2
A3
B3
(A > B)
out
(A = B)
out
(A < B)
out
MOTOROLA CMOS LOGIC DATAMC14585B
2
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
SS
)
V
– 55_C 25_C 125_C
Characteristic
Symbol
V
DD
Vdc
Min Max Min Typ # Max Min Max
Unit
Output Voltage “0” Level
Vin = VDD or 0
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
“1” Level
Vin = 0 or V
DD
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Input Voltage “0” Level
(VO = 4.5 or 0.5 Vdc)
(VO = 9.0 or 1.0 Vdc)
(VO = 13.5 or 1.5 Vdc)
V
IL
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
Vdc
“1” Level
(VO = 0.5 or 4.5 Vdc)
(VO = 1.0 or 9.0 Vdc)
(VO = 1.5 or 13.5 Vdc)
V
IH
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
Vdc
Output Drive Current
(VOH = 2.5 Vdc) Source
(VOH = 4.6 Vdc)
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)
I
OH
5.0
5.0
10
15
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
mAdc
(VOL = 0.4 Vdc) Sink
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)
I
OL
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
Input Current I
in
15 — ±0.1 — ±0.00001 ±0.1 — ±1.0 µAdc
Input Capacitance
(Vin = 0)
C
in
— — — — 5.0 7.5 — — pF
Quiescent Current
(Per Package)
I
DD
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
µAdc
Total Supply Current**†
(Dynamic plus Quiescent,
Per Package)
(CL = 50 pF on all outputs, all
buffers switching)
I
T
5.0
10
15
IT = (0.6 µA/kHz) f + I
DD
IT = (1.2 µA/kHz) f + I
DD
IT = (1.8 µA/kHz) f + I
DD
µAdc
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25_C.
†To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + (CL – 50) Vfk
where: IT is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.001.
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
(A
t
B)
out
(A
u
B)
out
B3
A3
V
DD
B1
A0
B0
(A
u
B)
in
(A = B)
out
A2
B2
V
SS
A1
(A = B)
in
(A
t
B)
in
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