MOTOROLA MC141800A Technical data

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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

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LCD Segment / Common Driver

CMOS

MC141800A is a CMOS LCD Driver which consists of 193 high voltage
LCD driving signals to drive 128 Segment and 65 Common display. It has
6800-series parallel, IIC serial interface and Serial Peripheral interface (SPI)
capability for operating with general MCU. Besides the general LCD driver
features, it has on chip LCD Smart Bias Divider circuit such that minimize
external component required in applications.

MC141800AT: TAB (Tape Automated Bonding)

MCC141800AZ: Gold Bump Die

• Single Supply Operation, 2.4 V - 3.5 V

• Maximum 16.5V LCD Driving Output Voltage

• Low Current Stand-by Mode (<1uA)

• On Chip Internal DC/DC Converter / External Power Supply

• Smart Bias Divider

• 4X / 5X DC-DC Converter

• 8 bit 6800-series Parallel Interface, 1 MHz IIC Serial Interface and

Serial Peripheral Interface (SPI)

• On chip Oscillator

• Graphic Mode Operation

• On Chip 128 x 65 Display Data RAM

• Master Clear RAM

• Low Power Icon Mode (128 icons, <25uA)

• Display Masks for Implementation of Blinking Effect

• 1 to 65 Selectable Multiplex Ratio

• 1:7 / 1:9 Bias Ratio

• Re-mapping of Row and Column Drivers

• 16 level Internal Contrast Control

• External Contrast Control

• Built-in Temperature Compensation Circuit

• Selectable Display Waveform: Type B or Type C Waveform

• 2V Icon Mode Display On

MC141800A

MC141800AT

TAB

MCC141800AZ
Gold bump die

ORDERING INFORMATION

MC141800AT 70 mm TAB
MCC141800AZ Gold Bump Die

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.

REV O
2/97

MC141800AMOTOROLA

3–277

Com0 to

Com64

Block Diagram

Seg0~Seg127

OSC1

OSC2

Display

Timing

Generator

HV Buffer Cell Level Shifter

65 Bit
Latch

128 Bit Latch

GDDRAM

65 x 128Bits

Command Decoder

Level

Selector

LCD Driving

Voltage Generator

4x and 5x
DC/DC Converter,
Voltage Regulator,

Smart Bias Divider,

Contrast Control,

Temperature

Compensation

VLL6

VLL2
VCC

VR
VF

C1P
C3P

C1N
C3N

AVDD
AVSS

DVSS
DVDD

MC141800A

3–278

RES

D/

CCE S/P

Parallel / Serial InterfaceCommand Interface

R/

W

CLK

D0~D7

MOTOROLA

COM31

DUMMY

236

COM30

COM29

235

234

COM28

COM27

233

232

COM2

COM1

207

206

COM0

COM64B

205

204

SEG127

SEG126

SEG125

203

202

201

SEG124

SEG123

200

199

SEG66

SEG65

142

141

SEG64

SEG63

140

139

SEG62

SEG61

138

137

SEG2

SEG1

SEG0

COM32

7877767574

COM33

COM34

73

COM61

COM62

464544

COM63

COM64A
43

DUMMY

1234567891011121314151617181920212223242526272829303132333435363738394041

P

C

W

D6

DUMMY

S/

DVDD

RES

D5

SPI

D/

R/

D7/IIC/

D2/A2

D3/Din

D4/Dout

D1/A1

D0/SDA

CEVFVR

CLK

C1P

C1N

C2P

C2N

C3P

C3N

NC

NC

VLL2

VLL3

NCNCNC

NC

VLL4

VLL5

VLL6

OSC1

DVSS

MC141800AT PIN ASSIGNMENT

(COPPER VIEW)

ENCAPSULANT

NC

NC

VCC

AVSS

42

OSC2

AVDD

COPPER

DUMMY

DIE

Mirror Design TAB

POLYIMIDE

MC141800AMOTOROLA

3–279

Die Pad Layout for MC141800A

SEG0
SEG1
SEG2

SEG126
SEG127

COM32

COM33...........COM53

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MC141800A

M

COM54

COM55
COM56
.
.
COM63
COM64A

DVSS
DVSS
DVSS
DVSS
DVSS
DVSS

AVDD
OSC2
AVSS
VCC
VCC
DVSS
DVSS
OSC1
DVSS
VLL6
VLL6
VLL5
VLL5
VLL4
VLL4
VLL3
VLL3
VLL2
VLL2
C3N
C3P
C2N
C2P
C1N
C1P
VR
VF
AVSS
AVSS
AVDD
AVDD

DVSS
DVSS
DVDD
DVDD
CE
CLK
CLK
D0
D0
D1
D2
D3
D4
D5
D6
D7
R/W
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS

D/C
RES
S/P
DVDD

COM31
.
.
.
.
.
COM22

Input Pad, 65 x 65 (um)

Gold Bump Size :

Output Pad, 42 x 100 (um)

MC141800A

3–280

...........

COM0

COM64B

COM20

COM21

MOTOROLA

MAXIMUM RATINGS* (Voltages Referenced to V

, TA=25˚C)

SS

Symbol Parameter Value Unit

AV

,DV

DD

V

CC

V

in

I Current Drain Per Pin Excluding VDD and V

T

A

T

stg

Supply Voltage -0.3 to +4.0 V

DD

VSS-0.3 to VSS+16.5 V

Input Voltage VSS-0.3 to VDD+0.3 V

SS

25 mA
Operating Temperature -30 to +85 ˚C
Storage Temperature Range -65 to +150 ˚C

This device contains circuitry to protect the inputs
against damage due to high static voltages or elec­tric fields; however, it is advised that normal precau­tions to be taken to avoid application of any voltage
higher than maximum rated voltages to this high
impedance circuit. For proper operation it is recom­mended that V

and V

in

range VSS < or = (Vin or V

be constrained to the

out

) < or = VDD. Reliability

out

of operation is enhanced if unused input are con­nected to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left
open. This device may be light sensitive. Caution
should be taken to avoid exposure of this device to

* Maximum Ratings are those values beyond which damage to the device may occur. Functional

operation should be restricted to the limits in the Electrical Characteristics tables or Pin Descrip-

any light source during normal operation. This

device is not radiation protected.
tion section.
VSS = AVSS = DVSS (DVSS = VSS of Digital circuit, AVSS = VSS of Analogue Circuit)
VDD = AVDD = DVDD (DVDD = VDD of Digital circuit, AVDD = VDD of Analogue Circuit)

ELECTRICAL CHARACTERISTICS (Voltage Referenced to VSS, VDD=2.4 to 3.5V, TA=25˚C)

Symbol Parameter Test Condition Min Typ Max Unit

DV
AV

Logic Circuit Supply Voltage Range

DD

Voltage Generator Circuit Supply Voltage Range

DD

I

Access Mode Supply Current Drain

AC

(AVDD + DVDD Pins)

I

Display Mode Supply Current Drain

DP

(AVDD + DVDD Pins)

(Absolute value referenced to VSS) 2.4

2.4

VDD=3.0V, Internal DC/DC Converter On, 5X DC/DC
Converter Enabled, R/W accessing, T

=1MHz,

cyc

Osc. Freq.=50KHz, Display On.

VDD=3.0V, Internal DC/DC Converter On, 5X Con­verter Enabled, R/W Halt, Osc. Freq.=50KHz, Dis­play On.

3.0

-

-

-

500

300

3.5

3.5

TBD

TBD

V
V

µA

µA

I

SB

I

ICON

V

CC

V

LCD

V

ICON

V

OH1

V

OL1

V

R1

V

R2

Standby Mode Supply Current Drain

VDD=3.0V, Display off, Oscillator Disabled, R/W halt.

-

TBD

1

µA

(AVDD + DVDD Pins)

Icon Mode Supply Current Drain

(AVDD + DVDD Pins)

LCD Driving Internal DC/DC Converter Output

(VCC Pin)

LCD Driving Voltage Input (VCC Pin)

VDD=3.0V, Internal Oscillator, Oscillator Enabled,
Display On, Icon On, R/W halt, Freq.=50KHz.

Display On, DC/DC Converter Enabled, Osc. Freq.=
50KHz, Internal Regulator Enabled, Divider Enabled.

Internal DC/DC Converter Disabled.

-

7

7

TBD

15

15

25

16.5

16.5VV

µA

Low Power Icon mode Voltage -2-V
Output High Voltage

I

out

=100µA

0.9*V

DD

-

V

DD

V

(D0-D7, OSC2)

Output Low Voltage

I

out

=100µA

0

-

0.1*V

DD

V

(D0-D7, OSC2)

LCD Driving Voltage Source (VR Pin)

Internal Regulator Enabled (VR voltage depends on

0

-

VCC-0.5

V

Int/Ext Contrast Control)

LCD Driving Voltage Source (VR Pin)

Internal Regulator Disable.

-

Floating

-

V

MC141800AMOTOROLA

3–281

ELECTRICAL CHARACTERISTICS (Voltage Referenced to VSS, VDD=2.4 to 3.5V, TA=25˚C)

Symbol Parameter Test Condition Min Typ Max Unit

V

Input high voltage

IH1

(RES, OSC2, CLK, CE, D0-D7,R/W, D/C, S/P,

OSC1)

V

Input Low voltage

IL1

(RES, OSC2, CLK, CE, D0-D7, R/W, D/C, S/P,
OSC1)

V

LCD Display Voltage Output

LL6

V

LL5

V

LL4

V

LL3

V

LL2

V

LL6

V

LL5

V

LL4

V

LL3

V

LL2

V

LL6

V

LL5

V

LL4

V

LL3

V

LL2

I

OH

(V

, V

LL6

LCD Display Voltage Output

(V

, V

LL6

LCD Display Voltage Input

(V

, V

LL6

Output High Current Source

(D0-D7, OSC2)

LL5

LL5

LL5

, V

, V

, V

LL4

LL4

LL4

, V

, V

, V

LL3

LL3

LL3

, V

, V

, V

LL2

LL2

LL2

Pins)

Pins)

Pins)

Smart Bias Divider Enabled, 1:9 bias ratio

Smart Bias Divider Enabled, 1:7 bias ratio

External Voltage Generator, Smart Bias Divider Dis­able

V

out=VDD

-0.4V

0.8*V

50

DD

0

-

-

-

-

-

-

-

-

-

-

7
0
0
0
0

-

-

V
8/9*V
7/9*V
2/9*V
1/9*V

V
6/7*V
5/7*V
2/7*V
1/7*V

-

-

-

-

-

-

V

DD

0.2*V

DD

R

R

-

-

R

-

R

-

R

-

R

-

-

R

-

R

-

R

-

R

V

CC

V

LL6

V

LL5

V

LL4

V

LL3

-

V

V

V
V
V
V
V

V
V
V
V
V

V
V
V
V
V

µA

I

Output Low Current Drain

OL

(D0-D7, OSC2)

I

Output Tri-state Current Drain Source

OZ

(D0-D7, OSC2)

IIL/IIHInput Current

(RES, OSC2, CLK, D0-D7, R/W, D/C, S/P,

OSC1)

C

Input Capacitance

IN

(OSC1, OSC2, all logic pins)

V

Internal Contrast Control

CN

(VR Output Voltage)

Temperature Coefficient Compensation
PTC0
PTC1
PTC2
PTC3

Flat Temperature Coefficient
Temperature Coefficient 1*
Temperature Coefficient 2*
Temperature Coefficient 3*

* The formula for the temperature coefficient is:

TC(%)=

VR at 50˚C - VR at 0˚C

50˚C - 0˚C

X

VR at 25˚C

V

out

=0.4V

-

-1

-

-

-50

1

µA

µA

-1 - 1 µA

- 5 7.5 pF

Internal Regulator Enabled, Internal Contrast control

- ± 12 - %
Enabled. (16 Voltage Levels Controlled by Software.
Each level is typically 1.5% of the Internal Regulator
Output Voltage.)

(TC1=0, TC2=0, Internal Regulator Disabled.)
(TC1=0, TC2=1, Internal Regulator Enabled.)
(TC1=1, TC2=0, Internal Regulator Enabled.)
(TC1=1, TC2=1, Internal Regulator Enabled.)

1

X100%

-

-

-

-

0.0

-0.18

-0.22

-0.35

-

%

-

%

-

%

-

%

MC141800A

3–282

MOTOROLA

AC ELECTRICAL CHARACTERISTICS (TA=25˚C, Voltage referenced to VSS, AVDD=DVDD=3V)

Symbol Parameter Test Condition Min Typ Max Unit

F

F

Oscillation Frequency of Display timing generator 60Hz Frame Frequency

OSC

Either External Clock Input or Internal Oscillator
Enabled

Frame Frequency Graphic Display Mode, Normal Frequency Mode,

FRM

65 - 49 MUX

45 60 55 KHz

-

F

OSC

-

15 * MUX

Hz

OSC Internal Oscillation Frequency with different value

of feedback resistor

Graphic Display Mode, Half Frequency Mode,
65 - 49 MUX

Graphic Display Mode, Normal Frequency Mode,
48 - 33 MUX

Graphic Display Mode, Half Frequency Mode,
48 - 33 MUX

Graphic Display Mode, Normal Frequency Mode,
32 - 2 MUX

Graphic Display Mode, Half Frequency Mode,
32 -2 MUX

6-Phase Low Power Icon Mode, Normal Frequency
Mode

6-Phase Low Power Icon Mode, Half Frequency
Mode

4-Phase Low Power Icon Mode, Normal Frequency
Mode

4-Phase Low Power Icon Mode, Half Frequency
Mode

Internal Oscillator Enabled, VDD within operation
range

-

F

OSC

-

30 * MUX

-

F

OSC

-

23 * MUX

F

-

-

OSC

46 * MUX

F

OSC

-

-

30 * MUX

F

-

-

OSC

60 * MUX

F

OSC

-

-

960

-

F

OSC

-

1920

-

F

OSC

-

1024

-

F

OSC

-

2048

See Figure 1 for the relationship

Hz

Hz

Hz

Hz

Hz

Hz

Hz

Hz

Hz

Oscillation
Frequency
(Hz)

280k

260k

90k

70k

50k

30k

10k

100k 500k 1.0M 1.5M 2.0M

Resistor Value between OSC1 and OSC2 (Ω)

Figure 1. Internal Oscillator Frequency Relationship with External Resistor Value

MC141800AMOTOROLA

3–283

TABLE 3. Parallel Timing Characteristics (TA=-30 to 85˚C, DVDD=2.4 to 3.5V, VSS=0V)

Symbol Parameter Min Typ Max Unit

t

cycle

t

t

DSW

t

DHW

t

DSR

t

DHR

t

ACC

PW
PW

t

AS

AH

EL
EH

t

R

t

F

Clock Cycle Time 1000 - - ns
Address Setup Time 90 - - ns
Address Hold Time 60 - - ns
Write Data Setup Time 210 - - ns
Write Data Hold Time 75 - - ns
Read Data Setup Time 250 - - ns
Read Data Hold Time 75 - - ns
Access Time - - 250 ns
Enable Low Pulse Width 390 - - ns
Enable High Pulse Width 390 - - ns
Rise Time - - 45 ns
Fall Time - - 45 ns

R/W

D/

C

CE

CLK

D0-D7

(Write data to driver)

D0-D7

(Read data from driver)

t

AS

t

cycle

t

AH

PW

PW

t

R

EH

t

F

t

DHW

Valid Data

t

DSW

t

ACC

t

DSR

t

DHR

Valid Data

Figure 2. Parallel 6800-series Interface Timing Characteristics

EL

MC141800A

3–284

MOTOROLA

TABLE 4. IIC Serial Timing Characteristics (TA=-30 to 85˚C, DVDD=2.4 to 3.5V, VSS=0V)

100kHz 400kHz 1MHz

Symbol Parameter

t

cycle

t

HSTART

t
t

t

SSTART

Clock Cycle Time 10 - - 2.5 - - 1 - - µs
Start condition Hold Time 4.0 - - 0.6 - - 0.3 - - µs
Data Hold Time 500 - - 300 - - 150 - - ns

HD

Data Setup Time 250 - - 100 - - 50 - - ns

SD

Start condition Setup Time (Only relevant for a
repeated Start condition)

t

SSTOP

t

IDLE

Stop condition Setup Time 4.0 - - 0.6 - - 0.3 - - µs

t

Rise Time for data and clock pin - - 1000 - - 300 - - 150 ns

R

t

Fall Time for data and clock pin - - 300 - - 300 - - 150 ns

F

Idle Time before a new transmission can start 4.7 - - 1.3 - - 0.6 - - µs

Min Typ Max Min Typ Max Min Typ Max

4.7 - - 0.6 - - 0.3 - - µs

Unit

SDA

CLK

t

HSTART

t

cycle

()(

)

t

HD

t

F

t

t

R

SD

t

SSTART

()(

)

t

IDLE

t

SSTOP

Figure 3. IIC Serial Interface Timing Characteristics

MC141800AMOTOROLA

3–285

P

STOP

CONDITION

P

STOP

CONDITION

ACK

)

)

(

)

(

(

)

(

)

(

)

(

)

(

)

(

)

(

)

(

)

(

)

(

9

ACK

)

(

)

(

)

(

)

(

)

(

)

(

1 - 8

DATA

)

(

)

(

)

(

)

(

)

(

)

(

ACK

CR/W
D/

(A0)

9

1 - 8

ACK

ACK

DATA

ACK

CR/W
D/

(A0)

SDA

(From controller)

SDA

(From Driver)

A1

A2

Figure 4. IIC Serial Interface Input Protocol (Write Data to Driver)

ADDRESS

23456789

1

S

START

CONDITION

CLK

SDA

SDA

(From controller)

(From Driver)

A1

A2

ADDRESS

Figure 5. IIC Serial Interface Output Protocol (Read Data from Driver)

23456789

1

S

START

CONDITION

CLK

MC141800A

3–286

MOTOROLA