MOTOROLA MC14174BCP, MC14174BD, MC14174BDR2, MC14174BF, MC14174BFEL Datasheet

MC14174B

Hex Type D Flip-Flop

The MC14174B hex type D flip–flop is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Data on the D inputs which meets the setup time requirements is transferred to the Q outputs on the positive edge of the clock pulse. All six flip–flops share common clock and reset inputs. The reset is active low, and independent of the clock.

• Static Operation

• All Inputs and Outputs Buffered

• Diode Protection on All Inputs

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving T wo Low–Power TTL Loads or One Low–Power

Schottky TTL Load over the Rated T emperature Range

• Functional Equivalent to TTL 74174

MAXIMUM RATINGS (Voltages Referenced to V

Symbol

Vin, V

Iin, I

stg

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, V to the range V

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V

DC Supply Voltage Range –0.5 to +18.0 V Input or Output Voltage Range

out

Input or Output Current

out

Power Dissipation,

Ambient Temperature Range –55 to +125 °C

Storage Temperature Range –65 to +150 °C Lead Temperature

or VDD). Unused outputs must be left open.

Parameter Value Unit

(DC or Transient)

(DC or Transient) per Pin

per Package (Note 3.)

(8–Second Soldering)

v (Vin or V

) v VDD.

out

) (Note 2.)

–0.5 to VDD + 0.5 V

±10 mA

500 mW

260 °C

and V

should be constrained

out

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MARKING

DIAGRAMS

PDIP–16

P SUFFIX

CASE 648

SOIC–16

D SUFFIX

CASE 751B

SOEIAJ–16

F SUFFIX

CASE 966

A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week

MC14174BCP

AWLYYWW

14174B

AWLYWW

MC14174B

AWLYWW

ORDERING INFORMATION

Device Package Shipping

MC14174BCP PDIP–16 2000/Box MC14174BD SOIC–16 48/Rail MC14174BDR2 SOIC–16 2500/Tape & Reel MC14174BF SOEIAJ–16 See Note 1. MC14174BFEL SOEIAJ–16 See Note 1.

1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.

 Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev . 3

1 Publication Order Number:

MC14174B/D

MC14174B

PIN ASSIGNMENT

1 2

Q0 D0

4 Q1 D2

6 Q2

BLOCK DIAGRAM

CLOCK RESET

1 3

16 15 14 13 125 11 10

Q5 D5 D4 Q4 D3 Q3 C

= PIN 16

= PIN 8

TRUTH TABLE

(Positive Logic)

Inputs Output

Clock Data Reset

010 111 X1Q

XX00

X = Don’t Care

No Change

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MC14174B

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

Characteristic

Output Voltage “0” Level

= VDD or 0

ОООООООО

“1” Level

= 0 or V

ОООООООО

Input Voltage “0” Level

ОООООООО

Output Drive Current

ОООООООО

= 4.5 or 0.5 Vdc) = 9.0 or 1.0 Vdc) = 13.5 or 1.5 Vdc)

“1” Level = 0.5 or 4.5 Vdc) = 1.0 or 9.0 Vdc) = 1.5 or 13.5 Vdc)

= 2.5 Vdc) Source = 4.6 Vdc) = 9.5 Vdc) = 13.5 Vdc)

(VOL = 0.4 Vdc) Sink (V

= 0.5 Vdc)

ОООООООО

= 1.5 Vdc)

Input Current Input Capacitance

ОООООООО

= 0)

Quiescent Current

(Per Package)

ОООООООО

Total Supply Current

ОООООООО

(Dynamic plus Quiescent, Per Package)

ОООООООО

= 50 pF on all outputs, all

ОООООООО

buffers switching)

(5.) (6.)

Symbol

ÎÎ

Vdc

5.0 10

5.0

5.0 10

15 15

—

5.0 10

5.0

10 15

Min

— —

—

4.95

9.95

14.95

— —

—

3.5

7.0

– 3.0

– 0.64

– 1.6

– 4.2

0.64

1.6

4.2 — —

— —

—

ООООООООООООООО

– 55_C

)

Max

0.05

0.05 —

—

1.5

3.0

4.0

— —

—

— —

—

— —

—

± 0.1

—

5.0 10

25_C

Min

ÎÎ

4.95

9.95

ÎÎ

14.95

ÎÎ

3.5

7.0

ÎÎ

– 2.4

– 0.51

ÎÎ

– 1.3

ÎÎ

– 3.4

0.51

1.3

ÎÎ

3.4

ÎÎ

— — —

— —

— — —

Typ

0 0

5.0 10

2.25

4.50

6.75

2.75

5.50

8.25

– 4.2

– 0.88

– 2.25

– 8.8

0.88

2.25

8.8

±0.00001

5.0

0.005

0.010

0.015

IT = (1.1 µA/kHz) f + I IT = (2.3 µA/kHz) f + I IT = (3.7 µA/kHz) f + I

(4.)

Max

0.05

ÎÎ

0.05 —

—

ÎÎ

—

ÎÎ

1.5

3.0

ÎÎ

4.0

ÎÎ

— —

ÎÎ

—

ÎÎ

— —

ÎÎ

—

ÎÎ

— —

—

ÎÎ

—

± 0.1

7.5

ÎÎ

5.0 10

ÎÎ

DD DD DD

Min

— —

—

4.95

9.95

14.95

— —

—

3.5

7.0

– 1.7

– 0.36

– 0.9

– 2.4

0.36

0.9

2.4 — —

— —

—

125_C

Max

0.05

± 1.0

4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

5. The formulas given are for the typical characteristics only at 25_C.

6. To calculate total supply current at loads other than 50 pF: I

) = IT(50 pF) + (CL – 50) Vfk

T(CL

where: I

is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.003.

— — —

1.5

3.0

4.0

— — —

— — — —

— — —

—

150 300 600

Unit

Vdc

mAdc

µAdc

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