Motorola MC14067BDW, MC14067BCL, MC14067BCP Datasheet
MOTOROLA CMOS LOGIC DATA
1
MC14067B MC14097B
Analog
Multiplexers/Demultiplexers
The MC14067 and MC14097 multiplexers/demultiplexers are digitally
controlled analog switches f eaturing low ON r esistance and very low
leakage current. These devices can be used in either digital or analog
applications.
The MC14067 is a 16–channel multiplexer/demultiplexer with an inhibit
and four binary control inputs A, B, C, and D. These control inputs select
1–of–16 channels by turning O N the appropriate analog switch (see
MC14067 truth table.)
The MC14097 is a differential 8–channel multiplexer/demultiplexer with an
inhibit and three binary control inputs A, B, and C. These control inputs
select 1 of 8 pairs of channels by turning ON the appropriate analog switches
(see MC14097 truth table).
• Low OFF Leakage Current
• Matched Channel Resistance
• Low Quiescent Power Consumption
• Low Crosstalk Between Channels
• Wide Operating Voltage Range: 3 to 18 V
• Low Noise
• Pin for Pin Replacement for CD4067B and CD4097B
MC14067B
16–Channel Analog
Multiplexer/Demultiplexer
MC14097B
Dual 8–Channel Analog
Multiplexer/Demultiplexer
CONTROLS
SWITCHES
IN/OUT
COMMON
OUT/IN
16
17
18
19
21
22
23
2
3
4
5
6
7
9
13
8
14
11
10
15
20
1
INHIBIT
A
B
C
D
X0
X1
X2
X3
X4
X5
X6
X7
X8
X9
X10
X11
X12
X13
X14
X15
X
CONTROLS
SWITCHES
IN/OUT
COMMONS
OUT/IN
1
17
15
16
18
19
21
22
23
2
3
4
5
6
7
9
8
14
11
10
1320INHIBIT
A
B
C
X0
X1
X2
X3
X4
X5
X6
X7
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
Y
VDD = PIN 24
VSS = PIN 12
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1995
REV 3
1/94
MC14067B
MC14097B
L SUFFIX
CERAMIC
CASE 623
ORDERING INFORMATION
MC14XXXBCP Plastic
MC14XXXBCL Ceramic
MC14XXXBDW SOIC
TA = – 55° to 125°C for all packages.
P SUFFIX
PLASTIC
CASE 709
DW SUFFIX
SOIC
CASE 751E
MOTOROLA CMOS LOGIC DATAMC14067B MC14097B
2
MAXIMUM RATINGS* (Voltages Referenced to V
SS
)
Symbol
Parameter
Value
Unit
V
DD
DC Supply Voltage
– 0.5 to + 18.0
V
Vin, V
out
Input or Output Voltage (DC or Transient)
– 0.5 to VDD + 0.5
V
I
in
Input Current (DC or Transient),
per Control Pin
± 10
mA
I
sw
Switch Through Current
± 25
mA
P
D
Power Dissipation, per Package†
500
mW
T
stg
Storage Temperature
– 65 to + 150
_
C
T
L
Lead Temperature (8–Second Soldering)
260
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
MC14067 TRUTH TABLE
Control Inputs
Selected
A B C D Inh
Selected
Channel
X X X X 1 None
0 0 0 0 0 X0
1 0 0 0 0 X1
0 1 0 0 0 X2
1 1 0 0 0 X3
0 0 1 0 0 X4
1 0 1 0 0 X5
0 1 1 0 0 X6
1 1 1 0 0 X7
0 0 0 1 0 X8
1 0 0 1 0 X9
0 1 0 1 0 X10
1 1 0 1 0 X11
0 0 1 1 0 X12
1 0 1 1 0 X13
0 1 1 1 0 X14
1 1 1 1 0 X15
MC14097 TRUTH TABLE
Control Inputs
Selected
A B C Inh
Selected
Channels
X X X 1 None
0 0 0 0 X0 Y0
1 0 0 0 X1 Y1
0 1 0 0 X2 Y2
1 1 0 0 X3 Y3
0 0 1 0 X4 Y4
1 0 1 0 X5 Y5
0 1 1 0 X6 Y6
1 1 1 0 X7 Y7
X = Don’t Care
MC14067 FUNCTIONAL DIAGRAM MC14097 FUNCTIONAL DIAGRAM
1–OF–16 DECODER
INHIBIT
A
B
C
D
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X3
X2
X1
X0
CONTROL
INPUTS
X
IN/OUT
X
OUT/IN
INHIBIT
A
B
C
CONTROL
INPUTS
1–OF–8 DECODER
X7
X6
X5
X4
X3
X2
X1
X0
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
X
OUT/IN
Y
OUT/IN
X
IN/OUT
Y
IN/OUT
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of
any voltage higher than maximum rated voltages to this high–impedance circuit. For proper
operation, Vin and V
out
should be constrained
to the range VSS v (Vin or V
out
) v VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either V
SS
or VDD). Unused outputs must be left open.
MOTOROLA CMOS LOGIC DATA
3
MC14067B MC14097B
ELECTRICAL CHARACTERISTICS
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
– 55°C
25_C
125_C
Characteristic
Symbol
VDDTest Conditions
ÎÎ
ÎÎ
ÎÎ
Min
Max
Min
Typ #
Max
Min
Max
Unit
SUPPLY REQUIREMENTS (Voltages Referenced to VSS)
Power Supply Voltage
Range
V
DD
—
3.0
18
3.0
—
18
3.0
18
V
Quiescent Current Per
Package
I
DD
5.0
10
15
Control Inputs: Vin
=
VSS or VDD,
Switch I/O: VSS v V
I/O
v
VDD, and
∆V
switch
v
500 mV**
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
µA
Total Supply Current
(Dynamic Plus
Quiescent,
Per Package
I
D(AV)
5.0
10
15
TA = 25_C only (The
channel component,
(Vin – V
out
)/Ron, is
not included.)
(0.07 µA/kHz) f + I
DD
Typical (0.20 µA/kHz) f + I
DD
(0.36 µA/kHz) f + I
DD
µA
CONTROL INPUTS — INHIBIT, A, B, C, D (Voltages Referenced to VSS)
Low–Level Input Voltage
V
IL
5.0
10
15
Ron = per spec,
I
off
= per spec
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
V
High–Level Input Voltage
V
IH
5.0
10
15
Ron = per spec,
I
off
= per spec
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
V
Input Leakage Current
I
in
15
Vin = 0 or V
DD
—
± 0.1
—
±0.00001
± 0.1
—
1.0
µA
Input Capacitance
C
in
—
—
—
—
5.0
7.5
—
—
pF
SWITCHES IN/OUT AND COMMONS OUT/IN — X, Y (Voltages Referenced to VSS)
Recommended Peak–to–
Peak Voltage Into or
Out of the Switch
V
I/O
—
Channel On or Off
0
V
DD
0
—
V
DD
0
V
DDVp–p
Recommended Static or
Dynamic Voltage
Across the Switch’*
(Figure 1)
∆V
switch
—
Channel On
0
600
0
—
600
0
300
mV
Output Offset Voltage
V
OO
—
Vin = 0 V, No Load
—
—
—
10
—
—
—
µV
ON Resistance
R
on
5.0
10
15
∆V
switch
v 500 mV**,
Vin = VIL or V
IH
(Control), and V
in
0 to VDD (Switch)
—
—
—
800
400
220
—
—
—
250
120
80
1050
500
280
—
—
—
1300
550
320
Ω
∆ON Resistance Between
Any Two Channels
in the Same Package
∆R
on
5.0
10
15
—
—
—
70
50
45
—
—
—
25
10
10
70
50
45
—
—
—
135
95
65
Ω
Off–Channel Leakage
Current (Figure 2)
I
off
15
Vin = VIL or V
IH
(Control) Channel to
Channel or Any One
Channel
—
± 100
—
± 0.05
± 100
—
±1000
nA
Capacitance, Switch I/O
C
I/O
—
Inhibit = V
DD
—
—
—
10
—
—
—
pF
Capacitance, Common O/I
C
O/I
—
Inhibit = V
DD
(MC14067B)
(MC14097B)
———
—
—
—
100
60
—
—
———
—
pF
Capacitance, Feedthrough
(Channel Off)
C
I/O
——Pins Not Adjacent
Pins Adjacent
—
—
—
0.47
—
—
—
pF
Data labeled “Typ” is not to be used for design purposes, but is intended as an indication of the IC’s potential performance.
**For voltage drops across the switch (∆V
switch
) > 600 mV ( > 300 mV at high temperature), excessive VDD current may be drawn; i.e.
the current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the
Maximum Ratings are exceeded. (See first page of this data sheet.)
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