MC13173
5
MOTOROLA ANALOG IC DEVICE DATA
Master VCO/PLL
The master VCO provides the reference frequency for the
FSK modulator and the LO frequency for the receiver
downconverter. With a 32.768 kHz input frequency to the
master VCO on Pin 1, the LO frequency for the receiver will
be at 12.075 MHz. The reference frequency for the FSK
modulator will be at approximately 1.1 MHz. The master VCO
and FSK modulator are not used when the transmitter is used
in A/V mode, and both are powered down.
Receiver Description
The single conversion receiver portion of the MC13173 is
low power and wideband, and incorporates a split IF. This
section includes a mixer, IF amplifier, limiting IF, quadrature
detector and data slicer.
Mixer
The mixer is a double balanced four quadrant multiplier. It
can be driven either differentially or single–ended by
connecting the unused input to the positive supply rail.
The buffered output is internally loaded for an output
impedance of 330 Ω for use with a standard ceramic filter.
IF Amplifier
The first IF amplifier section is composed of three
differential stages with the second and third stages
contributing to the RSSI. This section has internal DC
feedback and external input decoupling for improved
symmetry and stability. The total gain of the IF amplifier block
is approximately 40 dB. The fixed internal input impedance is
330 Ω for use with a 10.7 MHz ceramic filter . The output of the
IF amplifier is buffered and the impedance is 330 Ω .
Limiter
The limiter section is similar to the IF amplifier section,
except that four stages are used with the last three
contributing to the RSSI. This IF limiting amplifier section
drives the quadrature detector internally.
RSSI/Carrier Detect
The received signal strength indicator (RSSI) outputs a
current proportional to the log of the received signal
amplitude. The RSSI current output is derived by summing
the currents from the IF and limiting amplifier stages. An
external resistor sets the output voltage range.
The carrier detect threshold is set at approximately
1.2 Vdc. When the RSSI level exceeds that threshold, the
carrier detect output will go high. A large resistor may be
added externally between the comparator output and the
positive input for hysteresis.
Quadrature Detector
The demodulator is a conventional quadrature type with
an external LC tank driven through an internal 5 pF capacitor.
The output is buffered to give an output impedance of less
than 1.0 kΩ at an average DC level of around 1.1 V.
Data Slicer
The data slicer is designed to square up the data signal. It
is self centering at about 1.1 V , and clips at about 0.75 V and
1.45 V . There is a short time constant for large peak–to–peak
voltage swings or when there is a change in DC level at the
detector output. The time constant is longer for small signals
or for continuous bits of the same polarity which drift close to
the threshold voltage.
Transmission Description
The MC13173 uses a dual modulus PLL to frequency shift
key (FSK) modulate the baseband digital input signal,
producing the necessary logic high and low frequencies for
transmission. The transmit frequency for a logic high is
1.427 MHz, and the frequency for a low is 1.317 MHz with a
32.768 kHz reference frequency.
FSK Modulator
In the communications mode, the FSK modulator uses the
reference frequency from the Master VCO to produce the two
frequencies required for a logic high and a logic low. In the
A/V mode, the FSK modulator is not used and is powered
down.
LED Driver Stage
A low pass filter following the FSK modulator removes the
undesired harmonic frequencies from the square–wave
output of the divider circuits in PLLs. The resulting sinusoidal
waveforms are fed into a unity gain difference amplifier,
which drives the base of an external transistor, modulating
the IR LED.
In A/V mode, the data is input directly into the inverting
input of the op amp, and the low pass filter is not used.