Motorola MC12179D Datasheet

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The MC12179 is a monolithic Bipolar synthesizer integrating the high frequency prescaler, phase/frequency detector , charge pump, and reference oscillator/buffer functions. When combined with an external loop filter and VCO, the MC12179 serves as a complete PLL subsystem. Motorola’s advanced MOSAIC V technology is utilized for low power operation at a

5.0 V supply voltage. The device is designed for operation up to 2.8 GHz for high frequency applications such as CATV down converters and satellite receiver tuners.

• 2.8 GHz Maximum Operating Frequency

• Low Power Supply Current of 3.5 mA Typical, Including I

and IP Currents

• Supply Voltage of 5.0 V Typical

• Integrated Divide by 256 Prescaler

• On–Chip Reference Oscillator/Buffer

– 2.0 to 11 MHz Operation When Driven From Reference Source – 5.0 to 11 MHz Operation When Used With a Crystal

• Digital Phase/Frequency Detector with Linear Transfer Function

• Balanced Charge Pump Output

• Space Efficient 8–Lead SOIC

• Operating Temperature Range of –40 to 85°C

For additional information on calculating the loop filter components, an

InterActiveApNote

Excel spreadsheet) and an Application Note is available. Please order DK306/D from the Motorola Literature Distribution Center.

MOSAIC V, Mfax and

 document containing software (based on a Microsoft

InterActiveApNote

are trademarks of Motorola, Inc.

500 – 2800 MHz

SINGLE CHANNEL

FREQUENCY SYNTHESIZER

SEMICONDUCTOR

TECHNICAL DATA

D SUFFIX

PLASTIC PACKAGE

CASE 751

(SO–8)

PIN CONNECTIONS

MAXIMUM RATINGS (Note 1)

Parameter Symbol Value Unit

Power Supply Voltage, Pin 2 V Power Supply Voltage, Pin 7 V Storage Temperature Range Tstg –65 to 150 °C

NOTES: 1.Maximum Ratings are those values beyond which damage to the device may

occur. Functional operation should be restricted to the Recommended Operating Conditions as identified in the Electrical Characteristics table.

2.ESD data available upon request.

–0.5 to 6.0 Vdc

VCC to 6.0 Vdc

Block Diagram

OSC

out

Crystal

Oscillator

Prescaler

256

Phase/Frequency

Detector

Charge

Pump

out

OSC

Gnd

(Top View)

OSC

out

GndPF

ORDERING INFORMATION

Operating

Device

MC12179D TA = –40° to +85°C SO–8

 Motorola, Inc. 1997 Rev 3

Temperature Range

Package

MC12179

ELECTRICAL CHARACTERISTICS (V

Characteristic

Supply Current for V Supply Current for V Operating Frequency fINmax

Operating Frequency Crystal Mode

Input Sensitivity F Input Sensitivity External Oscillator OSC Output Source Current

Output Sink Current

Output Leakage Current (PD

NOTES: 1.VCC and VP = 5.5 V; FIN = 2.56 GHz; F

2.AC coupling, FIN measured with a 1000 pF capacitor.

3.Assumes C1 and C2 (Figure 1) limited to ≤30 pF each including stray and parasitic capacitances.

4.AC coupling to OSCin.

5.Refer to Figure 15 and Figure 16 for typical performance curves over temperature and power supply voltage.

CC P

External Oscillator OSC

= 4.5 to 5.5 V; VP = VCC to 5.5 V; TA = –40 to 85°C, unless otherwise noted.)

Symbol Min Typ Max Unit Condition

fINmin

in in in

(PD

) I

out

(PD

) I

out

) I

out

= 10 MHz crystal; PD

OSC

P IN

– 3.1 5.6 mA Note 1 – 0.4 1.3 mA Note 1

2800

– 5

2 200 – 1000 mV 500 – 2200 mV

–2.8 –2.2 –1.6 mA VP = 4.5 V, V

1.6 2.2 2.8 mA VP = 4.5 V, V

– 0.5 15 nA VP = 5.0 V, V

open.

out

– –

–

500

11 11

MHz Note 2

MHz Note 3

P–P P–P

Note 4 Note 2 Note 4

= VP/2

PIN FUNCTION DESCRIPTION

Pin Symbol I/O Function

1 OSCin I Oscillator Input — An external parallel–resonant, fundamental crystal is connected between OSC

2 V

3 Gnd — Ground. 4 F 5 GndP — Ground — For charge pump circuitry. 6 PD

7 V

8 OSCout O Oscillator output, for use with an external crystal as shown in Figure 1.

out

and OSC shown in Figure 1, are required to set the proper crystal load capacitance and oscillator frequency. For an external reference oscillator, an external signal is AC–coupled to the OSCin pin with a 1000 pF coupling capacitor, with no connection to OSC value of 50 kΩ MUST be placed across the OSCin and OSC

— Positive Power Supply. Bypass capacitors should be placed as close as possible to the pin and be

connected directly to the ground plane.

Prescaler Input — The VCO signal is AC coupled into the F

O Single ended phase/frequency detector output (charge pump output). Three–state current

sink/source output for use as a loop error signal when combined with an external low pass filter. The phase/frequency detector is characterized by a linear transfer function.

— Positive power supply for charge pump. VP MUST be equal or greater than VCC. Bypass capacitors

should be placed as close as possible to the pin and be connected directly to the ground plane.

to form an internal reference oscillator (crystal mode). External capacitors C1 and C2, as

out

. In either mode, a resistor with a nominal

out

pins for proper operation.

out

pin.

PDout

MOTOROLA RF/IF DEVICE DATA

+5.0 V

NOTE: External 50 kΩ resistor across Pins 1 and 8 is necessary in either crystal or driven mode.

VCO

1000 pF

MC12179

Figure 1. MC12179 Expanded Block Diagram

OSC

Crystal

Oscillator

out

Prescaler

256

GND GNDP

Phase/Frequency

Detector

OSC

Charge

Pump

out

+5.0 V

To Loop Filter

PHASE CHARACTERISTICS

The phase comparator in the MC12179 is a high speed digital phase/frequency detector circuit. The circuit determines the “lead” or “lag” phase relationship and time difference between the leading edges of the VCO (fv) signal and the reference (fr) input. The detector can cover a range of ±2π radian of fv/fr phase difference. The operation of the charge pump output is shown in Figure 2.

fr lags fv in phase OR fv>fr in frequency

When the phase of fr lags that of fv or the frequency of fv is greater than fr, the Do output will sink current. The pulse width will be determined by the time difference between the two rising edges.

Figure 2. Phase/Frequency Detector and Charge Pump Waveforms

(OSCin)

(Fin

256)

fr leads fv in phase OR fv<fr in frequency

When the phase of fr leads that of fv or the frequency of f is less than fr, the Do output will source current. The pulse width will be determined by the time difference between the two rising edges.

fr = fv in phase and frequency

When the phase and frequency of fr and fv are equal, the charge pump will be in a quiet state, except for current spikes when signals are in phase. This situation indicates that the loop is in lock and the phase comparator will maintain the loop in its locked state.

out

Kp–Charge Pump Gain

MOTOROLA RF/IF DEVICE DATA

H = High voltage level; L = Low voltage level; Z = High impedance NOTES: Phase difference detection range:

|)|I

source

[

sink

∼ –2π

|2.2|)|–2.2|

to 2

1.1 mA

radian

Sourcing Current Pulse Z Sinking Current Pulse

MC12179

APPLICATIONS INFORMATION

The MC12179 is intended for applications where a fixed local oscillator is required to be synthesized. The prescaler on the MC12179 operates up to 2.8GHz which makes the part ideal for many satellite receiver applications as well as applications in the 2nd ISM (Industrial, Scientific, and Medical) band which covers the frequency range of 2400MHz to 2483MHz. The part is also intended for MMDS (Multi–channel Multi–point Distribution System) block downconverter applications. Below is a typical block diagram of the complete PLL.

Figure 3. T ypical Block Diagram of Complete PLL

External Ref

10.0 MHz

MC12179 PLL

/Freq

Charge

Det

256

Pump

Loop Filter

VCO

2560.00 MHz

As can be seen from the block diagram, with the addition of a VCO, a loop filter, and either an external oscillator or crystal, a complete PLL sub–system can be realized. Since most of the PLL function is integrated into the MC12179, the user’s primary focus is on the loop filter design and the crystal reference circuit. Figure 13 and Figure 14 illustrate typical VCO spectrum and phase noise characteristics. Figure 17 and Figure 18 illustrate the typical input impedance versus frequency for the prescaler input.

Crystal Oscillator Design

The MC12179 is used as a multiply–by–256 PLL circuit which transfers the high stability characteristic of a low frequency reference source to the high frequency VCO in the PLL loop. T o facilitate this, the device contains an input circuit which can be configured as a crystal oscillator or a buffer for accepting an external signal source.

In the external reference mode, the reference source is AC–coupled into the OSCin input pin. The input level signal should be between 500–2200 mVpp. When configured with an external reference, the device can operate with input frequencies down to 2MHz, thus allowing the circuit to control the VCO down to 512 MHz. To optimize the phase noise of the PLL when used in this mode, the input signal amplitude should be closer to the upper specification limit. This maximizes the slew rate of the input signal as it switches against the internal voltage reference.

In the crystal mode, an external parallel–resonant fundamental mode crystal is connected between the OSC and OSC

pins. This crystal must be between 5.0 MHz and

out

11 MHz. External capacitors, C1 and C2 as shown in Figure 1, are required to set the proper crystal load capacitance and oscillator frequency. The values of the capacitors are dependent on the crystal chosen and the input capacitance of the device and any stray board capacitance.

In either mode, a 50kΩ resistor must be connected between the OSCin and the OSC

pins for proper device

out

operation. The value of this resistor is not critical so a 47kΩ or 51kΩ ±10% resistor is acceptable.

Since the MC12179 is realized with an all–bipolar ECL style design, the internal oscillator circuitry is different from more traditional CMOS oscillator designs which realize the crystal oscillator with a modified inverter topology. These CMOS designs typically excite the crystal with a rail–to–rail signal which may overdrive the crystal resulting in damage or unstable operation. The MC12179 design does not exhibit these phenomena because the swing out of the OSC

out

pin is less than 600mV. This has the added advantage of minimizing EMI and switching noise which can be generated by rail–to–rail CMOS outputs. The OSC

output should not

out

be used to drive other circuitry.

The oscillator buffer in the MC12179 is a single stage, high speed, differential input/output amplifier; it may be considered to be a form of the Pierce oscillator. A simplified circuit diagram is seen in Figure 4.

Figure 4. Simplified Crystal Oscillator/Buffer Circuit

OSC

out

Bias

Source

OSC

To Phase/ Frequency Detector

OSCin drives the base of one input of an NPN transistor differential pair . The non–inverting input of the differential pair is internally biased. OSC

is the inverted input signal and is

out

buffered by an emitter follower with a 70 µA pull–down current and has a voltage swing of about 600 mVpp. Open loop output impedance is about 425Ω. The opposite side of the differential amplifier output is used internally to drive another buffer stage which drives the phase/frequency detector. With the 50 kΩ feedback resistor in place, OSC and OSC

are biased to approximately 1.1V below VCC.

out

The amplifier has a voltage gain of about 15 dB and a bandwidth in excess of 150 MHz. Adherence to good RF design and layout techniques, including power supply pin decoupling, is strongly recommended.

A typical crystal oscillator application is shown in Figure 1. The crystal and the feedback resistor are connected directly between OSCin and OSC

, while the loading capacitors, C1

out

and C2, are connected between OSCin and ground, and

OSC that as far as the crystal is concerned, the two loading

and ground respectively . It is important to understand

out

capacitors are in series (albeit through ground). So when the crystal specification defines a specific loading capacitance, this refers to the total external (to the crystal) capacitance seen across its two pins.

This capacitance consists of the capacitance contributed by the amplifier (IC and packaging), layout capacitance, and the series combination of the two loading capacitors. This is illustrated in the equation below:

MOTOROLA RF/IF DEVICE DATA

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