MOTOROLA MC10H176MR1, MC10H176M, MC10H176MEL, MC10H176ML1, MC10H176ML2 Datasheet
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SEMICONDUCTOR TECHNICAL DATA
2–113
REV 5
Motorola, Inc. 1996
3/93
The MC10H176 contains six master slave type D flip–flops with a common
clock. This MECL 10H part is a functional/pinout duplication of the standard
MECL 10K family part, with 100% improvement in clock frequency and
propagation delay and no increase in power–supply current.
• Propagation Delay, 1.7 ns Typical
• Power Dissipation, 460 mW Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic Symbol Rating Unit
Power Supply (VCC = 0) V
EE
–8.0 to 0 Vdc
Input Voltage (VCC = 0) V
I
0 to V
EE
Vdc
Output Current— Continuous
— Surge
I
out
50
100
mA
Operating Temperature Range T
A
0 to +75 °C
Storage Temperature Range— Plastic
— Ceramic
T
stg
–55 to +150
–55 to +165
°C
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0° 25° 75°
Characteristic Symbol Min Max Min Max Min Max Unit
Power Supply Current I
E
— 123 — 112 — 123 mA
Input Current High
Pins 5,6,7,10,11,12
Pin 9
I
inH
——425
670——
265
420——
265
420
µA
Input Current Low I
inL
0.5 — 0.5 — 0.3 — µA
High Output Voltage V
OH
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc
Low Output Voltage V
OL
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc
High Input Voltage V
IH
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc
Low Input Voltage V
IL
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc
AC PARAMETERS
Propagation Delay t
pd
0.9 2.1 0.9 2.2 1.0 2.4 ns
Set–up Time t
set
1.5 — 1.5 — 1.5 — ns
Hold Time t
hold
0.9 — 0.9 — 1.0 — ns
Rise Time t
r
0.5 1.8 0.5 1.9 0.5 2.0 ns
Fall Time t
f
0.5 1.8 0.5 1.9 0.5 2.0 ns
Toggle Frequency f
tog
250 — 250 — 250 — MHz
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test
table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a
printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are
terminated through a 50–ohm resistor to –2.0 volts.
CLOCKED TRUTH TABLE
DIP
PIN ASSIGNMENT
V
CC1
Q0
Q1
Q2
D0
D1
D2
V
EE
V
CC2
Q5
Q4
Q3
D5
D4
D3
CLOCK
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
* A clock H is a clock transition from
a low to a high state.
C
L
H *
H *
Q
X
L
H
Q
n+1
Q
n
L
H
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
MC10H176
MOTOROLA MECL Data
DL122 — Rev 6
2–114
APPLICATION INFORMATION
The MC10H176 contains six high–speed, master slave
type “D” flip–flops. Data is entered into the master when
the clock is low. Master–to–slave data transfer takes
place on the positive–going Clock transition. Thus,
outputs may change only on a positive–going Clock
transition. A change in the information present at the data
(D) input will not affect the output information any other
time due to the master–slave construction of this device.
V
CC1
= PIN 1
V
CC2
= PIN 16
VEE = PIN 8
2 5
CLOCK 9
Q0
3 Q1
4 Q2
13 Q3
14 Q4
15 Q5
D0
6D1
7D2
10D3
11D4
D5
LOGIC DIAGRAM
12
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