Motorola MC10H175FN, MC10H175L, MC10H175P Datasheet
SEMICONDUCTOR TECHNICAL DATA
The MC10H175 is a quint D type latch with common reset and clock lines.
This MECL 10KH part is a functional/pinout duplication of the standard MECL
10K family part, with 100% improvement in propagation delay and no increase
in power–supply current.
• Propagation Delay, 1.2 ns Typical
• Power Dissipation, 400 mW Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic Symbol Rating Unit
Power Supply (VCC = 0) V
Input Voltage (VCC = 0) V
Output Current— Continuous
— Surge
Operating Temperature Range T
Storage Temperature Range— Plastic
— Ceramic
I
T
EE
I
out
A
stg
–8.0 to 0 Vdc
0 to V
EE
50
100
0 to +75 °C
–55 to +150
–55 to +165
Vdc
mA
°C
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0° 25° 75°
Characteristic Symbol Min Max Min Max Min Max Unit
Power Supply Current I
Input Current High
Pins 5,6,7,9,10,12,13
Pin 11
Input Current Low I
High Output Voltage V
Low Output Voltage V
High Input Voltage V
Low Input Voltage V
I
E
inH
inL
OH
OL
IH
— 107 — 97 — 107 mA
——565
1120——
0.5 — 0.5 — 0.3 — µA
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc
IL
335
660——
335
660
AC PARAMETERS
Propagation Delay
Data
Clock
Reset
Set–up Time t
Hold Time t
Rise Time t
Fall Time t
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test
table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a
printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are
terminated through a 50–ohm resistor to –2.0 volts.
t
pd
set
hold
r
f
0.6
1.6
0.6
1.6
0.6
0.7
1.9
0.7
1.0
2.2
1.5 — 1.5 — 1.5 — ns
0.8 — 0.8 — 0.8 — ns
0.5 1.8 0.5 1.9 0.5 2.0 ns
0.5 1.8 0.5 1.9 0.5 2.0 ns
1.0
2.0
2.3
0.8
1.0
1.7
2.1
2.4
µA
ns
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
TRUTH TABLE
DC0C1 Reset Q
L
H
X
X
X
X
L
L
X
H
H
X
X
H
H
X
L
L
X
X
L
L
H
H
DIP
PIN ASSIGNMENT
V
CC1
Q2
Q3
Q4
D4
C0
C1
V
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
1
2
3
4
5
6
7
8
Book (DL122/D).
16
15
14
13
12
11
10
9
n+1
L
H
Qn
Qn
L
L
V
CC2
Q1
Q0
D2
D1
RESET
D0
D3
3/93
Motorola, Inc. 1996
2–92
REV 5
APPLICATION INFORMATION
MC10H175
The MC10H175 is a high speed, low power quint latch.
It features five D type latches with common reset and a
common two–input clock. Data is transferred on the
negative edge of the clock and latched on the positive
edge. The two clock inputs are “OR”ed together.
Any change on the data input will be reflected at the
LOGIC DIAGRAM
D0 10 14 Q0DCQ
D1 12
D2 13
outputs while the clock is low. The outputs are latched on
the positive transition of the clock. While the clock is in the
high state, a change in the information present at the data
inputs will not affect the output information. THE RESET
INPUT IS ENABLED ONLY WHEN THE CLOCK IS IN
THE HIGH STATE.
R
DCQ
R
DCQ
DCQ
15 Q1
2 Q2
D3 9
D4 5
C0 6
C
1 7
RESET 11
V
= PIN 1
CC1
V
= PIN 16
CC2
VEE = PIN 8
R
DCQ
R
DCQ
R
3 Q3
4 Q4
DL122 — Rev 6
2–93 MOTOROLAMECL Data
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