SEMICONDUCTOR TECHNICAL DATA
The MC10121 is a basic logic building block providing the simultaneous
OR–AND/OR–AND–Invert function, useful in data control and digital multiplexing
applications.
PD= 100 mW typ/pkg (No Load)
tpd= 2.3 ns typ
tr, tf= 2.5 ns typ (20%–80%)
LOGIC DIAGRAM
4
5
6
7
9
10
11
12
13
14
15
V
= PIN 1
CC1
V
= PIN 16
CC2
VEE= PIN 8
2
3
CERAMIC PACKAGE
PLASTIC PACKAGE
DIP
PIN ASSIGNMENT
V
A
OUT
A
OUT
A1
A1
A1
A2
CC1
IN
IN
IN
IN
V
EE
1
2
3
4
5
6
7
8
L SUFFIX
CASE 620–10
P SUFFIX
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
16
15
14
13
12
11
10
V
A4
A4
A4
A3
A3
A2IN, A3
A2
9
CC2
IN
IN
IN
IN
IN
IN
IN
3/93
Motorola, Inc. 1996
3–73
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
REV 5
MC10121
Under
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Characteristic Symbol
Power Supply Drain Current I
Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50Ω Load) ns
Propagation Delay t
Rise Time (20 to 80%) t
Fall Time (20 to 80%) t
inH
I
inL
OH
OL
OHA
OLA
4+3–
t
4–3+
t
4+2+
t
4–2–
3+
t
2+
3–
t
2–
E
Under
Test
8 29 20 26 29 mAdc
7
9
10
7
9
10
3
2
3
2
3
2
3
2
3
3
2
2
3
2
3
2
–30°C +25°C +85°C
Min Max Min Typ Max Min Max
0.5
0.5
0.5
–1.060
–1.060
–1.890
–1.890
–1.080
–1.080
1.4
1.4
1.4
1.4
0.9
0.9
0.9
0.9
390
390
495
–0.890
–0.890
–1.675
–1.675
–1.655
–1.655
3.6
3.6
3.6
3.6
4.1
4.1
4.1
4.1
0.5
0.5
0.5
–0.960
–0.960
–1.850
–1.850
–0.980
–0.980
1.4
1.4
1.4
1.4
1.1
1.1
1.1
1.1
2.3
2.3
2.3
2.3
2.5
2.5
2.5
2.5
245
245
310
–0.810
–0.810
–1.650
–1.650
–1.630
–1.630
3.4
3.4
3.4
3.4
4.0
4.0
4.0
4.0
0.3
0.3
0.3
–0.890
–0.890
–1.825
–1.825
–0.910
–0.910
1.4
1.4
1.4
1.4
1.1
1.1
1.1
1.1
–0.700
–0.700
–1.615
–1.615
–1.595
–1.595
245
245
310
3.5
3.5
3.5
3.5
4.6
4.6
4.6
4.6
Unit
µAdc
µAdc
Vdc
Vdc
Vdc
Vdc
MOTOROLA MECL Data
3–74
DL122 — Rev 6
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