MC100EPT26
1:2 Fanout Differ ential
LVPECL to LVTTL
Translator
The MC100EPT26 is a 1:2 Fanout Differential LVPECL to L VTTL
translator. Because LVPECL (Positive ECL) levels are used only
+3.3V and ground are required. The small outline 8–lead SOIC
package and the 1:2 fanout design of the EPT26 makes it ideal for
applications which require the low skew duplication of a signal in a
tightly packed PC board.
The VBB output allows the EPT26 to be used in a single–ended
input mode. In this mode the VBB output is tied to the D0
non–inverting buffer or the D0 input for an inverting buffer. If used,
the VBB pin should be bypassed to ground via a 0.01µF capacitator.
• 1.4ns T ypical Propagation Delay
• 275MHz Fmax (Clock bit stream, not pseudo–random)
• Differential LVPECL inputs
• Small Outline SOIC Package
• 24mA TTL outputs
• Flowthrough Pinouts
• ESD Protection: >2KV HBM, >100V MM
• Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D
• Q Outputs will default LOW with inputs open or at V
• V
BB
Output
• New Differential Input Common Mode Range
• Moisture Sensitivity Level 1, Indefinite Time Out of Drypack.
For Additional Information, See Application Note AND8003/D
• Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
• Transistor Count = 1 17 devices
input for a
EE
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MARKING
DIAGRAMS*
8
SO–8
8
1
8
1
*For additional information, see Application Note
AND8002/D
PIN
Q0, Q1
D, D
V
CC
V
BB
GND Ground
D SUFFIX
CASE 751
TSSOP–8
DT SUFFIX
CASE 948R
A = Assembly Location
L = W afer Lot
Y = Year
W = Work Week
PIN DESCRIPTION
FUNCTION
LVTTL Outputs
Differential LVPECL Input Pair
Positive Supply
Reference Voltage
HPT26
ALYW
1
8
HR26
ALYW
1
NC
1
2
D
78Q0
LVTTL
3
VBB
Figure 1. 8–Lead Pinout (Top View) and Logic Diagram
Semiconductor Components Industries, LLC, 2000
May, 2000 – Rev. 2
45
LVPECL
6
V
CC
ORDERING INFORMATION
Device Package Shipping
MC100EPT26D SO–8 98 Units / Rail
MC100EPT26DR2 SO–8 2500 / Reel
Q1D
MC100EPT26DT TSSOP–8 98 Units / Rail
MC100EPT26DTR2 TSSOP–8 2500 / Reel
GND
1 Publication Order Number:
MC100EPT26/D
MC100EPT26
MAXIMUM RATINGS*
Symbol Parameter Value Unit
V
CC
V
I
I
out
I
BB
T
A
T
stg
θ
JA
θ
JC
T
sol
* Maximum Ratings are those values beyond which damage to the device may occur.
{
Use for inputs of same package only.
DC CHARACTERISTICS (VCC = 3.3V ± 0.3V; GND = 0V; TA = –40°C to 85°C)
Symbol Characteristic Min Typ Max Unit
I
CCH
I
CCL
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
I
OS
V
IHCMR
V
BB
NOTE: 100EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
1. All values vary 1:1 with VCC.
2. All loading with 500 ohms to GND, CL = 20pF.
3. V
Power Supply Current (Outputs set to HIGH) 10 20 18 mA
Power Supply Current (Outputs set to LOW) 15 28 35 mA
Input HIGH Voltage (VCC = 3.3) (Note 1.) 2135 2420 mV
Input LOW Voltage (VCC = 3.3) (Note 1.) 1490 1825 mV
Input HIGH Current 150 µA
Input LOW Current D
Output HIGH Voltage (IOH = –3.0mA) (Note 2.) 2.4 V
Output LOW Voltage (IOL = 24mA) (Note 2.) 0.5 V
Output Short Circuit Current –50 –150 mA
Input HIGH Voltage Common Mode Range (Note 3.) 2.0 3.3 V
Output Voltage Reference 2.0 V
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.
min varies 1:1 with GND, max varies 1:1 with VCC.
IHCMR
AC CHARACTERISTICS (VCC = 3.3V ± 0.3V; GND = 0V)
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
f
max
t
PLH
t
PHL
t
SK+ +
t
SK– –
t
SKPP
t
JITTER
V
PP
t
r
t
f
4. F
5. Reference (VCC = 3.3V ± 5%, GND = 0V)
6. Skews are measured between outputs under identical transitions.
Maximum Toggle
Frequency (Note 4.)
,
Propagation Delay to
Output Differential (Note 5.)
Output–to–Output Skew++
Output–to–Output Skew– –
Part–to–Pa rt Skew (Note 6.)
Cycle–to–Cycle Jitter TBD TBD TBD ps
Input Voltage Swing (Diff.) 150 800 1200 150 800 1200 150 800 1200 mV
Output Rise/Fall Times
(0.8V – 2.0V) Q, Q
guaranteed for functionality only. VOL and VOH levels are guaranteed at DC only.
max
Power Supply (GND = 0V) 0 to 3.8 VDC
Input Voltage (GND = 0V, VI not more positive than VCC) 0 to 3.8 VDC
Output Current Continuous
VBB Sink/Source Current
Operating Temperature Range –40 to +85 °C
Storage Temperature –65 to +150 °C
Thermal Resistance (Junction–to–Ambient) Still Air
Thermal Resistance (Junction–to–Case) 41 to 44 ± 5% °C/W
Solder Temperature (<2 to 3 Seconds: 245°C desired) 265 °C
{
–40°C 25°C 85°C
275 350 275 350 275 350 MHz
1.2
1.2
330 600 900 330 600 900 330 650 900
1.5
1.5
60
25
500
1.8
1.8
Surge
500lfpm
1.2
1.2
D
1.5
1.5
60
25
500
50
100
± 0.5 mA
190
130
–150
1.8
1.8
1.3
1.2
1.7
1.5
60
25
500
mA
°C/W
0.5 µA
2.2
1.8
ns
ps
ps
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