Motorola MC10E122FN, MC100E122FNR2, MC10E122FNR2, MC100E122FN Datasheet
V
CCO
V
CCO
NCNCNCD
8
LOGIC DIAGRAM
D
7
D
6
D
5
V
EE
D
4
D
3
D
2
26
27
28
2
3
4
25 24 23 22 21 20 19
18
17
16
15
14
13
12
115 6 7 8 9 10
V
CCO
Q
8
Q
7
Q
6
V
CC
Q
5
Q
4
V
CCO
Q
3
D1D0V
CCOQ0Q1
Q
2
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
Q
8
1
Pinout: 28-Lead PLCC (Top View)
* All VCC and V
CCO
pins are tied together on the die.
SEMICONDUCTOR TECHNICAL DATA
2–1
REV 2
Motorola, Inc. 1996
12/93
The MC10E/100E122 is a 9-bit buffer. The device contains nine
non-inverting buffer gates.
• 500ps Max. Propagation Delay
• Extended 100E V
EE
Range of – 4.2V to – 5.46 V
• 75kΩ Input Pulldown Resistors
PIN NAMES
Pin Function
D0 – D
8
Data Inputs
Q0 – Q
8
Data Outputs
9-BIT BUFFER
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
MC10E122 MC100E122
MOTOROLA ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–2
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = V
CCO
= GND)
0°C 25°C 85°C
Symbol Characteristic min typ max min typ max min typ max Unit Condition
I
IH
Input HIGH Current 200 200 200 µA
I
EE
Power Supply Current mA
10E 41 49 41 49 41 49
100E 41 49 41 49 47 57
AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = V
CCO
= GND)
0°C 25°C 85°C
Symbol Characteristic min typ max min typ max min typ max Unit Condition
t
PLH
Propagation Delay to Output ps
t
PHL
D to Q 150 350 500 150 350 500 150 350 500
t
SKEW
Within-Device Skew ps
D to Q 75 75 75 1
t
r
Rise/Fall Times ps
t
f
20 - 80% 300 425 800 300 425 800 300 425 800
1. Within-device skew is defined as identical transitions on similar paths through a device.
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