Mitsubishi M5M5V416CWG Datasheet

MITSUBISHI ELECTRIC

M5M5V416CWG -70HI

2001.05.18 Ver. 1.0

4194304

-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM

MITSUBISHI LSIs

Target Specification

Notice: This is not a final specification.
Some parametric limits are subject to change

* Typical parameter indicates the value for the center
of distribution, and not 100% tested.

1

DESCRIPTION

The M5M5V416C is a family of low voltage 4-Mbit static RAMs
organized as 262144-words by 16-bit, fabricated by Mitsubishi's
high-performance 0.18µm CMOS technology.
The M5M5V416C is suitable for memory applications where a
simple interfacing , battery operating and battery backup are the
important design objectives.
M5M5V416CWG is packaged in a CSP (chip scale package),
with the outline of 7.0mm x 8.5mm, ball matrix of 6 x 8 (48ball)
and ball pitch of 0.75mm. It gives the best solution for
a compaction of mounting area as well as flexibility of wiring
pattern of printed circuit boards.

FEATURES

- Single 2.7~3.0V power supply

- Small stand-by current: 0.1µA (2.85V, typ.)

- No clocks, No refresh

- Data retention supply voltage =2.0V

- All inputs and outputs are TTL compatible.

- Easy memory expansion by S1, S2, BC1 and BC2

- Common Data I/O

- Three-state outputs: OR-tie capability

- OE prevents data contention in the I/O bus

- Process technology: 0.18µm CMOS

- Package: 48ball 7.0mm x 8.5mm CSP

PIN CONFIGURATION

A0 ~ A17

DQ1 ~ DQ16

S1

W

OE

BC1

Address input
Data input / output
Chip select input 1

Write control input
Output enable input

Lower Byte (DQ1 ~ 8)

Pin Function

Vcc

GND

Power supply
Ground supply

BC2

Upper Byte (DQ9 ~ 16)

S2

Chip select input 2

(TOP VIEW)

Outline: 48FJA
NC: No Connection

1 2 3 4 5 6

A

B

C

D

E

F

G

DQ3A7DQ1S2VCC

GND

DQ6A2S1

DQ2

DQ4

DQ5

DQ7A1A4A6A5

A17

A16

A15A0A3

GND

A14OEBC2

DQ15

DQ13

DQ12

DQ10

BC1

DQ16

DQ14

GND

VCC

DQ11DQ8WA13

A12

N.C.

DQ9

N.C.

A11

A10A9A8

H

Those are summarized in the part name table below.

30mA

(10MHz)

5mA

(1MHz)

Version,

Operating

temperature

Part name

Power

Supply

Access time

max.

Stand-by current (Vcc=3.0V)

Ratings (max.)

Active

current

(3.0V, typ.)

Icc1

70°C 85°C25°C

I-version

-40 ~ +85°C

M5M5V416CWG -70HI

2.7 ~ 3.0V

70ns

* Typical

40°C25°C 40°C

201021

0.40.2

N C

MITSUBISHI ELECTRIC

M5M5V416CWG -70HI

2001.05.18 Ver. 1.0

4194304

-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM

MITSUBISHI LSIs

Target Specification

Notice: This is not a final specification.
Some parametric limits are subject to change

2

FUNCTION

The M5M5V416CWG is organized as 262144-words by
16-bit. These devices operate on a single +2.7~3.0V power
supply, and are directly TTL compatible to both input and
output. Its fully static circuit needs no clocks and no
refresh, and makes it useful.
The operation mode are determined by a combination of
the device control inputs BC1 , BC2 , S1, S2 , W and OE.
Each mode is summarized in the function table.
A write operation is executed whenever the low level W
overlaps with the low level BC1 and/or BC2 and the low
level S1 and the high level S2. The address(A0~A17) must
be set up before the write cycle and must be stable during
the entire cycle.
A read operation is executed by setting W at a high level
and OE at a low level while BC1 and/or BC2 and S1 and
S2 are in an active state(S1=L,S2=H).
When setting BC1 at the high level and other pins are in
an active stage , upper-byte are in a selectable mode in
which both reading and writing are enabled, and lower-byte
are in a non-selectable mode. And when setting BC2 at a
high level and other pins are in an active stage, lower-

When setting BC1 and BC2 at a high level or S1 at a high
level or S2 at a low level, the chips are in a non-selectable
mode in which both reading and writing are disabled. In this
mode, the output stage is in a high-impedance state, allowing
OR-tie with other chips and memory expansion by BC1, BC2
and S1, S2.
The power supply current is reduced as low as 0.1µA(25°C,
typical), and the memory data can be held at +2V power
supply, enabling battery back-up operation during power
failure or power-down operation in the non-selected mode.

BLOCK DIAGRAM

MEMORY ARRAY

262144 WORDS

x 16 BITS

CLOCK

GENERATOR

A0

A1

A16

A17

S2

BC1

BC2

W

OE

DQ

8

DQ

1

DQ

16

DQ

9

-

Vcc

GND

S1

FUNCTION TABLE

Mode

S2

W

H X X

High-Z

BC1BC2

OE

DQ1~8

X X

Non selection

DQ9~16

Icc

High-Z

Standby

High-Z High-Z

H XLL H Din

High-Z

Active

H HL H

Read

High-ZDout ActiveL

H HL Active

H H L Active

H L

High-Z

High-Z ActiveHL

H

H High-Z

H L DoutHL L Read Dout Active

H L DinLL X

Write

Din Active

H High-Z

H H High-Z High-Z

Non selection

X H H X X

Write

H H L L

Write

Din ActiveX

H L H

Read

High-Z

ActiveL DoutH High-Z

S1

H

L
L
L

L

L

L

L

X

L
L

L X X

High-Z

X X

Non selection

High-Z

Standby

X

Standby

MITSUBISHI ELECTRIC

M5M5V416CWG -70HI

2001.05.18 Ver. 1.0

4194304

-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM

MITSUBISHI LSIs

Target Specification

Notice: This is not a final specification.
Some parametric limits are subject to change

3

ABSOLUTE MAXIMUM RATINGS

pF

10

VI=GND, VI=25mVrms, f=1MHz
VO=GND,VO=25mVrms, f=1MHz

CI
CO

Symbol

Parameter

Limits

Conditions

Units

µA

mA

mA

V

Icc1

Icc2

Icc4

VIH
VIL

IO

Icc3

VOH IOH= -0.5mA
VOL IOL=2mA

II

VI =0 ~ Vcc

BC1 and BC2=VIH or S1=VIH or S2=VIL or OE=VIH, VI/O=0 ~ Vcc

Vcc+0.2V

0.4

2.2

-0.2 *

2.4

0.5

0.4
±1

4030

±1

10

MaxTypMin

DC ELECTRICAL CHARACTERISTICS

f= 10MHz

f= 1MHz

-

-

-

-

-

Supply voltage

Input voltage

Output voltage

Power dissipation

Operating
temperature

Storage temperature

V

mW

Conditions

Ta=25°C

700

- 65 ~ +150

Ratings

V

cc

VI
VO
Pd

Ta
Tstg

-0.5* ~ +4.6

-0.3* ~ Vcc + 0.3

0 ~ Vcc

Symbol Parameter Units

- 40 ~ +85

I-version

With respect to GND

f= 10MHz

f= 1MHz

5

4030
105

-

With respect to GND
With respect to GND

High-level input voltage
Low-level input voltage

High-level output voltage

Low-level output voltage
Input leakage current

Output leakage current
Active supply current

( AC,MOS level )

( AC,TTL level )

Active supply current

Stand by supply current
( MOS level )

( TTL level )

Stand by supply current

Other inputs= 0 ~ Vcc

Note 1: Direction for current flowing into IC is indicated as positive (no mark)
Note 2: Typical parameter indicates the value for the center of distribution at 2.85V, and is not 100% tested.

CAPACITANCE

Symbol

Parameter

Conditions

Limits

Max

Typ

Min

Units

Input capacitance

Output capacitance

* -3.0V in case of AC (Pulse width 30ns)

BC1 and BC2 0.2V, S1 0.2V, S2 Vcc-0.2V
other inputs 0.2V or Vcc-0.2V
Output - open (duty 100%)

<=<=>

=

BC1 and BC2=VIL , S1=V IL ,S2=VIH

<

=

other pins =V IH or VIL
Output - open (duty 100%)

BC1 and BC2=VIH or S1=VIH or S2=VIL

* -1.0V in case of AC (Pulse width 30ns)

<
=

<
=

10

°C
°C

µA

0.1

-

~ +85°C

~ +25°C

-

1

~ +40°C

-

0.2 2

-

20

(1)

S1 Vcc - 0.2V,

>

=

other inputs = 0 ~ Vcc
S2 0.2V,

(2)

other inputs = 0 ~ Vcc

BC1 and BC2 Vcc - 0.2V

S1 0.2V, S2 Vcc - 0.2V

<=>

=

(3)

>=other inputs = 0 ~ Vcc

S2 Vcc - 0.2V,

>=<

=

~ +70°C

-

-