Mitsubishi M37516F8HP Datasheet
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to
change.
MITSUBISHI MICROCOMPUTERS
M37516F8HP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
DESCRIPTION
The M37516F8HP is the 8-bit microcomputer based on the 740
family core technology.
The M37516F8HP is designed for household products and office
automation equipment and includes serial I/O functions, 8-bit
timer, A-D converter, and I2C-BUS interface.
FEATURES
●Basic machine-language instructions ...................................... 71
●Minimum instruction execution time .................................. 0.5 µs
(at 8 MHz oscillation frequency)
●Memory size
Flash memory............................................................... 32 Kbytes
RAM ................................................................................1 Kbytes
●Programmable input/output ports ............................................ 40
●Interrupts ................................................. 17 sources, 16 vectors
●Timers.............................................................................8-bit ✕ 4
●Serial I/O1 ................... 8-bit ✕ 1 (UART or Clock-synchronized)
●Serial I/O2 ................................... 8-bit ✕ 1(Clock-synchronized)
●Multi-master I2C-BUS interface (option) ...................... 1 channel
●PWM ............................................................................... 8-bit ✕ 1
●A-D converter ............................................... 10-bit ✕ 8 channels
●Watchdog timer ............................................................ 16-bit ✕ 1
●Clock generating circuit..................................... Built-in 2 circuits
(connect to external ceramic resonator or quartz-crystal oscillator)
●Power source voltage
In high-speed mode .................................................. 4.0 to 5.5 V
(at 8 MHz oscillation frequency)
In high-speed mode .................................................. 2.7 to 5.5 V
(at 4 MHz oscillation frequency)
In middle-speed mode............................................... 2.7 to 5.5 V
(at 8 MHz oscillation frequency)
In low-speed mode .................................................... 2.7 to 5.5 V
(at 32 kHz oscillation frequency)
●Power dissipation
In high-speed mode ..........................................................34 mW
(at 8 MHz oscillation frequency, at 5 V power source voltage)
In low-speed mode ............................................................. T.B.D.
(at 32 kHz oscillation frequency, at 3 V power source voltage)
●Operating temperature range....................................–20 to 85°C
APPLICATION
Office automation equipment, FA equipment, Household products,
Consumer electronics, etc.
PIN CONFIGURATION (TOP VIEW)
P 35/ A N
5
P 34/ A N
4
P 33/ A N
3
P 32/ A N
2
P 31/ A N
1
P 30/ A N
0
V
C C
V
R E F
A V
S S
P 4
7
P 4
6
P 4
5
)
)
1
2
2
6
7
N
N
/
/
6
7
3
3
A
A
P
P
6
3
3
53
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
4 8
1
2
2
M
C
S
/
/
3
2
T
T
/
/
4
3
4
4
P
P
P W
I N
I N
M P
2
2
I
O
C
S
/
1
0
P
U T
L K
33
R
S
S
/
/
2
3
0
0
P
P
D Y
1
2
3
02
S
/
0
0
P
N
43
M 3 7 5 1 6 F 8 H P
3
4
5
6
0
1
1
T
/
2
4
P
I N
1
T
R
R
/
S
1
/
4
0
/
0
P
R
L
4
I N
P
C N T
/
7
2
P
C N T
D Y
4
0
P
3
92
7
K
C
S
/
6
2
P
S C
5
0
P
8
D
X
T
/
2
L
/
5
2
P
0
D
D
/
/
6
0
P
8
9
D
X
R
/
2
A
/
4
2
P
S D
1
7
0
0
1
1
P
( L E
( L E
P
P
7
5
6
2
2
2
2 4
P 12/ ( L E D2)
P 1
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1
0
2
1
1
1
1
1
S
L
S
A
V
/
/
3
C
2
2
N
2
P
P
S C
S D
3
/ ( L E D3)
P 1
4
/ ( L E D4)
P 1
5
/ ( L E D5)
P 1
6
/ ( L E D6)
P 17/ ( L E D7)
V
S S
X
O U T
X
I N
R E S E T
P 20/ X
C O U T
P 21/ X
C I N
P a c k a g e t y p e : 4 8 P 6 Q - A
Fig. 1 M37516F8HP pin configuration
1
PRELIMINARY
XINXO
U
T
S
I
/
O
1
(
8
)
R
A
M
F
l
a
s
h
m
e
m
o
r
y
C
P
U
A
XYSCHP
CLP
S
VS
S
1
8
R
E S E
T
1
5
VC
C
4
31
2
C
N
VS
S
C
N T
R0
P
0 ( 8
)
2
7
2
8
2
93
03
1
3
23
3
3
4
P
1
(
8
)
1
92
12
32
52
02
22
42
6
P
2 ( 8
)
6
8
1
0
1
3
7
9
1
11
4
3
9
4
14
04
2
P
3 ( 8 )P
4 ( 8
)
4
6
4
84
4
7
1
3
5
4
44
5
I
/ O p o r t P 3I
/ O p o r t P 0I
/ O p o r t P
1
/
O
p
o
r
t
P
2
I
/ O p o r t P
4
1
61
7
3
5
3
73
63
8
A
-
D
c
o n v e r t e
r
(
1 0
)
VR
E
F
A
VS
S
I
2
C
(
8
)
C
N T
R1
0
XC
I
N
XC
O U
T
2
I
N
T0–I
N
T3
P
W M ( 8
)
S
I / O 2 ( 8
)
M
a i n - cl o c k i
n p u tS
u b - cl o c k i
n p u tS
u b - cl o c k o
u t p u t1
3
1
4
M
a i n - cl o c k o
u t p u tR
e s e t i n p u
t
P
r e s c a l e r 1 2 ( 8
)
T
i m e r 1 ( 8 )T
i m e r 2 ( 8 )T
i m e r X ( 8 )T
i m e r Y ( 8
)
P
r e s c a l e r X ( 8 )P
r e s c a l e r Y ( 8
)
C
l
o
c
k
g
e
n
e
r
a
t
i
n
g
c
i
r
c
u
i
t
W
a t c h d o g t i m e
r
R
e s e
t
XC
I
N
XC
O U
T
Notice: This is not a final specification.
Some parametric limits are subject to
change.
FUNCTIONAL BLOCK
MITSUBISHI MICROCOMPUTERS
M37516F8HP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
FUNCTIONAL BLOCK DIAGRAM
Fig. 2 Functional block diagram
2
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to
change.
PIN DESCRIPTION
Table 1 Pin description
MITSUBISHI MICROCOMPUTERS
M37516F8HP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
VCC, VSS
CNVSS
RESET
XIN
XOUT
P00/SIN2
P01/SOUT2
P02/SCLK2
P03/SRDY2
P04–P07
P10/–P17
P20/XCOUT
P21/XCIN
P22/SDA1
P23/SCL1
P24/SDA2/RxD
P25/SCL2/TxD
P26/SCLK
P27/CNTR0/
SRDY1
P30/AN0–
P37/AN7
P40/CNTR1
P41/INT0
P42/INT1
P43/INT2/SCMP2
P44/INT3/PWM
P45–P47
NamePin
Power source
CNVSS input
Reset input
Clock input
Clock output
I/O port P0
I/O port P1
I/O port P2
I/O port P3
I/O port P4
Functions
•Apply voltage of 2.7 V – 5.5 V to Vcc, and 0 V to Vss.
•This pin controls the operation mode of the chip.
•Normally connected to VSS.
•Reset input pin for active “L.”
•Input and output pins for the clock generating circuit.
•Connect a ceramic resonator or quartz-crystal oscillator between the XIN and XOUT pins to set
the oscillation frequency.
•When an external clock is used, connect the clock source to the XIN pin and leave the XOUT
pin open.
•8-bit CMOS I/O port.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•CMOS compatible input level.
•CMOS 3-state output structure.
•P10 to P17 (8 bits) are enabled to output large current for LED drive.
•8-bit CMOS I/O port.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•CMOS compatible input level.
•P22 to P25 can be switched between CMOS compatible input level or SMBUS input level in the I2C-BUS
interface function.
•P20, P21, P24 to P27: CMOS3-state output structure.
•P24, P25: N-channel open-drain structure in the I2CBUS interface function.
•P22, P23: N-channel open-drain structure.
•8-bit CMOS I/O port with the same function as port P0.
•CMOS compatible input level.
•CMOS 3-state output structure.
•8-bit CMOS I/O port with the same function as port P0.
•CMOS compatible input level.
•CMOS 3-state output structure.
Function except a port function
• Serial I/O2 function pin
• Sub-clock generating circuit I/O
pins (connect a resonator)
• I2C-BUS interface function pins
• I2C-BUS interface function pin/
Serial I/O1 function pins
• Serial I/O1 function pin
• Serial I/O1 function pin/
Timer X function pin
• A-D converter input pin
• Timer Y function pin
• Interrupt input pins
• Interrupt input pin/SCMP2 output pin
• Interrupt input pin/PWM output pin
3
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to
change.
MITSUBISHI MICROCOMPUTERS
M37516F8HP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
FUNCTIONAL DESCRIPTION
CENTRAL PROCESSING UNIT (CPU)
The M37516F8HP uses the standard 740 Family instruction set.
Refer to the table of 740 Family addressing modes and machine
instructions or the 740 Family Software Manual for details on the
instruction set.
Machine-resident 740 Family instructions are as follows:
The FST and SLW instructions cannot be used.
The STP, WIT, MUL, and DIV instructions can be used.
b 7
b 0
C P U m o d e r e g i s t e r
(
[CPU Mode Register (CPUM)] 003B16
The CPU mode register contains the stack page selection bit, etc.
The CPU mode register is allocated at address 003B16.
C P U M : a d d r e s s
P r o c e s s o r m o d e b i t s
b 1 b 0
00 : S i n g l e - c h i p m o d e
01 :
10 : N o t a v a i l a b l e
11 :
S t a c k p a g e s e l e c t i o n b i t
0 : 0 p a g e
1 : 1 p a g e
F i x t h i s b i t t o “ 1 ” .
0 0 3 B
1 6
)
Fig. 3 Structure of CPU mode register
P o r t X
C
s w i t c h b i t
0 : I / O p o r t f u n c t i o n ( s t o p o s c i l l a t i n g )
C I N
– X
C O U T
1 : X
M a i n c l o c k ( X
0 : O s c i l l a t i n g
1 : S t o p p e d
M a i n c l o c k d i v i s i o n r a t i o s e l e c t i o n b i t s
b 7 b 6
00 : φ = f ( X
01 : φ = f ( X
1 0 : φ = f ( X
1 1 : N o t a v a i l a b l e
o s c i l l a t i n g f u n c t i o n
I N
– X
O U T
) s t o p b i t
I N
) / 2 ( h i g h - s p e e d m o d e )
I N
) / 8 ( m i d d l e - s p e e d m o d e )
C I N
) / 2 ( l o w - s p e e d m o d e )
4
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