Mitsubishi M35055-XXXFP, M35054-XXXFP Datasheet
MITSUBISHI MICROCOMPUTERS
M35054-XXXFP/M35055-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DESCRIPTION
The M35054-XXXFP and M35055-XXXFP are TV screen display control IC which can be used to display information such as number of
channels, the date and messages and program schedules on the TV
screen.
In particular, owing to the built-in SYNC-SEP (synchronous separation) circuit, the synchronous correction circuit, external circuits can
be decrease and character turbulence that occurs when superimposing can be reduced. The processor is suitable for AV systems
such as VTRs, LDs, and so on.
It is a silicon gate CMOS process and M35054-XXXFP and M35055XXXFP are housed in a 20-pin shrink SOP package.
For M35054-001FP/M35055-001FP that are a standard ROM versions of M35054-XXXFP/M35055-XXXFP respectively, the character pattern is also mentioned.
FEATURES
Screen composition .............................. 24 characters ✕ 10 lines,
•
Number of characters displayed ..................................240 (Max.)
•
Character composition ..................................... 12 ✕ 18 dot matrix
•
Characters available .............................128 characters (M35054)
•
Character sizes available....................4 (horizontal) ✕ 4 (vertical)
•
Display locations available
•
Horizontal direction............................................... 240 locations
Vertical direction ................................................... 256 locations
Blinking .................................................................Character units
•
Cycle : approximately 1 second, or approximately 0.5 seconds
Duty : 25%, 50%, or 75%
Data input..............................By the serial input function (16 bits)
•
Coloring
•
Background coloring (composite video signal)
Blanking
•
Total blanking (14 ✕ 18 dots)
Border size blanking
Character size blanking
Synchronizing signal
•
Composite synchronizing signal generation
(PAL, NTSC, M-PAL)
2 output ports (1 digital line)
•
Oscillation stop function
•
It is possible to stop the oscillation for synchronizing signal
generation
Built-in half-tone display function
•
Built-in reversed character display function
•
Built-in synchronous correction circuit
•
Built-in synchronous separation circuit
•
............................. 256 characters (M35055)
32 characters ✕ 7 lines
PIN CONFIGURATION (TOP VIEW)
CP1
TESTA
CS
SCK
SIN
AC
VDD2
CVIDEO
LECHA
CVIN
1
←
2
3
→
4
→
5
→
6
→
7
8
←
9
→
10
→
Outline 20P2Q-A
M35054-XXXFP
M35055-XXXFP
20
19
←
18
→
17
←
16
15
→
14
→
13
12
11
DD1
V
HOR
CP2
OSCIN
V
SS
P1
P0
TESTB
TESTC
V
SS
APPLICATION
TV, VCR, Movie
REV.1.2
PIN DESCRIPTION
Symbol
OSC1
TESTA
__
CS
SCK
SIN
__
AC
VDD2
CVIDEO
LECHA
CVIN
VSS
TESTC
TESTB
P0
P1
VSS
OSCIN
CP2
HOR
VDD1
Pin name
Clock input
Test pin input
Chip select input
Serial clock input
Serial data input
Auto-clear input
Power pin
Composite video
signal output
Character level input
Composite video
signal input
Earthing pin
Test pin output
Test pin input
Port P0 output
Port P1 output
Earthing pin
fSC input pin for
synchronous signal
generation
Filter output
Horizontal synchro-
nizing signal input
Power pin
Input/
Output
Input
—
Input
Input
Input
Input
—
Output
Input
Input
—
—
—
Output
Output
—
Input
Output
Input
—
MITSUBISHI MICROCOMPUTERS
M35054-XXXFP/M35055-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Function
This is the filter output pin 1.
This is the pin for test. Connect this pin to GND during normal operation.
This is the chip select pin, and when serial data transmission is being carried out, it goes
to “L”. Hysteresis input. Built-in pull-up resistor.
__
When CS pin is “L”, SIN serial data is taken in when SCK rises. Hysteresis input. Built-in
pull-up resistor.
This is the pin for serial input of data and addresses for the display control register and
the display data memory. Hysteresis input. Built-in pull-up resistor.
When “L”, this pin resets the internal IC circuit. Hysteresis input. Built-in pull-up resistor.
Please connect to +5V with the analog circuit power pin.
This is the output pin for composite video signals. It outputs 2VP-P composite video
signals. In superimpose mode, character output etc. is superimposed on the external
composite video signals from CVIN.
This is the input pin which determines the “white” character color level in the composite
video signal.
This is the input pin for external composite video signals. In superimpose mode, character
output etc. is superimposed on these external composite video signals.
Please connect to GND using circuit earthing pin.
This is the pin for test. Open this pin during normal operation.
This is the pin for test. Connect this pin to GND during normal operation.
This pin outputs the port output or BLNK1 (character background) signal.
This pin outputs the port output or CO1(character) signal.
Please connect to GND using circuit earthing pin (Analog side).
This is the input pin for the sub-carrier frequency (fSC) for generating a synchronous
signal.
A frequency of 3.580MHz is needed for NTSC, and a frequency of 4.434MHz in needed
for PAL and 3.576MHz is needed for M-PAL.
Filter output pin 2.
This is the input pin for external composite video signals. This pin inputs the external
video signal clamped sync-chip to 1.5V, and internally carries out synchronous separation.
Please connect to +5V with the digital circuit power pin.
2
MITSUBISHI MICROCOMPUTERS
Data
control
circuit
Address
control
circuit
Display control
register
Display RAM
Display character ROM
Timing
generator
Blinking circuit
Shift register
Display control
circuit
Reading address
control circuit
H counter
NTSC
PAL
M-PAL
video output
circuit
Timing
generator
SYNC-SEP
circuit
3.580MHz(NTSC)
4.434MHz(PAL)
3.576MHz(M-PAL)
TESTA
TESTB
Port output
circuit
Clock oscillation circuit
SCK
SIN
CS
CVIDEO
CVIN
LECHA
V
DD1
AC
V
SS
V
DD2
HOR
P0
P1
CP1
V
SS
TESTC
OSCIN
CP2
I/O control circuit
Oscillation circuit
for synchronizing
signal generation
Display location
detection circuit
7
16
11
20
6
13
2
5
4
3
119
17
18
8
10
9
12
14
15
M35054-XXXFP/M35055-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
BLOCK DIAGRAM
3
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
MEMORY CONSTITUTION
Address 0016 to EF16 are assigned to the display RAM, address F016
to F816 are assigned to the display control registers.
The internal circuit is reset and all display control registers (address
F016 to F816) are set to “0” and display RAM (address 0016 to EF16)
are RAM erased when the AC pin level is “L”.
When using M35054-XXXFP, set “0” in any of DA7, DAD through
DAF of addresses 0016 through EF16, and of DAE and DAF of ad-
Address
00
16
FED
000
__
DADA DA
DA DA DA DA DA DA DA DA DA DA DA DA DA
CBA9876543210
REV BLINK B G R C6 C5 C4 C3 C2 C1 C0
MITSUBISHI MICROCOMPUTERS
M35054-XXXFP/M35055-XXXFP
dresses F016 through F816.
Setting the blank code “FF16” as a character code is an exception.
When using M35055-XXXFP, set “0” in any of DAD through DAF of
addresses 0016 through EF16, and of DAE and DAF of addresses
F016 through F816.
TESTn (n : a number) is MITSUBISHI test memory, so be sure to
observe the setting conditions.
0
EF
F0
F1
F2
F3
F4
F5
F6
F7
F8
Display RAM
16
16
16
16
16
16
16
16
Display control register
16
16
Reverse
000
0 0 TEST15
0 0 TEST21
0 0 TEST27
0 0 TEST33
0 0 TEST36
0 0 TEST42
0 0 TEST43
0 0 TEST46
0 0 LEVEL1
Blinking
REV BLINK C6 C5 C4 C3 C2 C1 C0
TEST13 TEST12 SYSEP1 SYSEP0 SEPV1 SEPV0 PTD1 PTD0 PTC1 PTC0
TEST14
TEST20
TEST19
TEST26
TEST25
TEST32
TEST31
TEST35 TEST34 SPACE DSP9 DSP8 DSP7 DSP6 DSP5 DSP4 DSP3 DSP2 DSP1 DSP0
TEST40
TEST41 TEST39 TEST38 TEST37 EQP PALH MPAL INT/NON N/P BLINK2 BLINK1 BLINK0
TEST2 TEST1 TEST0 LBLACK LIN24/32 BLKHF BB BG BR LEVEL0 PHASE2 PHASE1 PHASE0
TEST45
RGBON TEST44 CL17/18 CBLINK CURS7 CURS6 CURS5 CURS4 CURS3 CURS2 CURS1 CURS0
TEST51
TEST50
Fig. 1 Memory constitution (M35054-XXXFP)
DADA DA
Address
00
16
EF
16
F0
16
F1
16
F2
16
F3
16
F4
16
F5
16
F6
16
F7
16
F8
16
FED
000
Display RAM
000
0 0 TEST15
0 0 TEST21
0 0 TEST27
0 0 TEST33
0 0 TEST36
0 0 TEST42
0 0 TEST43
Display control register
0 0 TEST46
0 0 LEVEL1
DA DA DA DA DA DA DA DA DA DA DA
CBA98765432
REV BLINK B G R C6 C5 C4 C3 C2 C1 C0
Reverse
TEST14
TEST20
TEST26
TEST32
TEST35 TEST34 SPACE DSP9 DSP8 DSP7 DSP6 DSP5 DSP4 DSP3 DSP2 DSP1 DSP0
TEST41 TEST39 TEST38 TEST37 EQP PALH MPAL INT/NON N/P BLINK2 BLINK1 BLINK0
TEST45
TEST51
Blinking
REV BLINK C6 C5 C4 C3 C2 C1 C0
TEST13 TEST12 SYSEP1 SYSEP0 SEPV1 SEPV0 PTD1 PTD0 PTC1 PTC0
TEST19
TEST25
TEST31
TEST40
TEST2 TEST1 TEST0 LBLACK LIN24/32 BLKHF BB BG BR LEVEL0 PHASE2 PHASE1 PHASE0
RGBON TEST44 CL17/18 CBLINK CURS7 CURS6 CURS5 CURS4 CURS3 CURS2 CURS1 CURS0
TEST50
Character color
BGR
TEST11
TEST17TEST18
TEST23
TEST24
TEST29
TEST30
TEST49
TEST48
Character color
BGR
TEST11
TEST17TEST18
TEST23
TEST24
TEST29
TEST30
TEST49
TEST48
TEST10
TEST16
TEST22
TEST28
TEST47
TEST10
TEST16
TEST22
TEST28
TEST47
Character code
0
HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0
VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0
VSZ21 VSZ20 VSZ11 VSZ10 HSZ21 HSZ20 HSZ11 HSZ10
RAMERS DSPON STOP1 STOPIN SCOR EX BLK1 BLK0
DA DA
10
C7
Character code
C7
HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0
VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0
VSZ21 VSZ20 VSZ11 VSZ10 HSZ21 HSZ20 HSZ11 HSZ10
RAMERS DSPON STOP1 STOPIN SCOR EX BLK1 BLK0
Fig. 2 Memory constitution (M35055-XXXFP)
4
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
SCREEN CONSTITUTION
The screen lines and rows are determined from each address of the
display RAM. The screen consitution (24 characters ✕ 10 lines) is
shown in Figure 3 the screen constitution (32 characters ✕ 7 lines) is
shown in 4.
16
16
24
17
16
23
16
16
22
15
16
21
14
16
20
13
16
19
12
18
1116291641
17
101628164016581670
16
16
0F
16
15
0E
16
14
0D
16
13
0C
16
12
0B
16
11
0A
16
10
09
9
0816201638
16
8
07
16
7
06
16
6
05
16
5
04
16
4
03
16
3
02
2
01161916311649
16
1
00
1
Rows
Lines
16
16
5F
16
5E
16
5D
16
5C
16
5B
16
5A
16
77
16
76
16
75
16
74
16
73
16
72
16
8F
16
8E
16
8D
16
8C
8B16A3
8A16A2
16
2F
16
2E
16
2D
16
2C
16
2B
16
2A
16
47
16
46
16
45
16
44
16
43
16
42
16
5916711689
16
16
88
16
3F
16
3E
16
3D
16
3C
16
3B
16
3A
16
57
16
56
16
55
16
54
16
53
16
52
16
6F
16
6E
16
6D
16
6C
16
6B
16
6A
16
87
16
86
16
85
16
84
16
83
16
82
16
16
27
16
26
16
25
16
24
16
23
16
22
211639165116691681
16
50166816801698
16
16
4F
16
4E
16
4D
16
4C
16
4B
16
4A
16
16
67
16
66
16
65
16
64
16
63
16
62
16
7F
16
7E
16
7D
16
7C
16
7B
16
7A
1F
16
1E
16
1D
16
1C
16
1B
16
1A
16
37
16
36
16
35
16
34
16
33
16
32
6116791691
181630164816601678
16
2
3
4
5
6
16
A7
16
A6
16
A5
16
A4
16
16
16B916
A1
A016B8
16
9F
9E16B6
16
9D
16
9C
9B16B3
9A16B2
16
99
16
16
97
16
96
16
95
16
94
16
93
16
92
16
16
90
7
BF16D7
16
16
D6
BE
16
16
D5
BD
16
16
D4
BC
16
16
D3
BB
16
16
D2
BA
16
D1
16
16
D0
16
16
B7
CF
16
16
CE
16
16
B5
CD
16
16
B4
CC
16
16
CB
16
16
CA
16
16
B1
C9
16
16
B0
C8
16
AF16C7
16
16
C6
AE
16
16
C5
AD
16
16
C4
AC
16
16
C3
AB
16
16
C2
AA
16
16
A9
C1
16
A8
C016D8
8
9
16
EF
16
EE
16
ED
16
EC
16
EB
16
EA
16
E9
16
E8
16
E7
16
E6
16
E5
16
E4
16
E3
16
E2
16
E1
16
E0
16
DF
16
DE
16
DD
16
DC
16
DB
16
DA
16
D9
16
10
Note : The hexadecimal numbers in the boxes show the display RAM address.
MITSUBISHI MICROCOMPUTERS
M35054-XXXFP/M35055-XXXFP
16
16
32
1F
31
1E163E165E
16
30
1D
29
1C163C165C
28
1B163B165B167B169B
27
1A163A165A
26
191639165916791699
25
181638
24
17163716571677
163616
23
16
22
15163516551675
16
21
14
20
1316331653
16
19
12
18
1116311651
17
101630165016701690
16
0F162F
15
0E162E164E166E
14
0D162D
13
0C162C164C166C
16
12
0B
11
0A162A164A
16
10
09
9
0816281648
8
071627164716671687
7
0616261646
6
051625164516651685
5
041624
4
03162316431663
3
021622
2
01162116411661
16
1
00
1
Rows
Lines
3F165F167F169F
16
3D165D167D169D
16
167A169A16
16
5816781698
5616761696
34165416741694
16
32165216721692
16
16
4F166F168F
16
4D166D168D
2B164B166B168B
166A16
29164916691689
16
16
16
4416641684
16
4216621682
20164016601680
2
3
16
16
7E169E
16
16
7C169C
16
16
16
16
16
97
16
16
16
95
16
16
731693
16
16
711691
16
16
16
16
8E
16
16
16
8C
16
16
8A
16
16
681688
16
16
661686
16
16
16
16
83
16
16
16
81
16
4
5
16
BF
DF
16
16
BE
DE
16
16
BD
DD
16
16
BC
DC
16
16
BB
DB
16
16
BA
DA
16
16
B9
D9
16
16
B8
D8
16
16
B7
D7
16
16
B6
D6
16
16
B5
D5
16
16
B4
16
B3
16
B2
16
B1
16
B0
16
AF
16
AE
16
AD
16
AC
16
AB
16
AA
16
A9
16
A8
16
A7
16
A6
16
A5
16
A4
16
A3
16
A2
16
A1
16
A0
6
16 to EF16.
D4
16
D3
16
D2
16
D1
16
D0
16
CF
16
CE
16
CD
16” to character code of addresses E0
16
CC
16
CB
16
CA
16
C9
16
C8
16
C7
16
C6
16
C5
16
C4
16
C3
16
C2
16
C1
16
C0
7
Notes 1. The hexadecimal numbers in the boxes show the display RAM address.
Notes 2. When 32 characters × 7 lines are displayed, set blank code “FF
Fig. 3 Screen constitution (24 characters ✕ 10 lines)
Fig. 4 Screen constitution (32 characters ✕ 7 lines)
5
MITSUBISHI MICROCOMPUTERS
M35054-XXXFP/M35055-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Display RAM DESCRIPTION
Display RAM Address 0016 to EF16
DA
0~C
0
1
2
3
4
5
6
7
8
9
A
B
C
Notes__1. Resetting at the AC pin RAM-erases the display RAM, and the status turns as indicated by the mark around in the status column.
2. Set to “1” only when setting a blank code. When using M35055-XXXFP, DA7 is C7 (MSB).
Name
C0
(LSB)
C1
C2
C3
C4
C5
C6
(MSB)
—
R
G
B
BLINK
REV
Status
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Set ROM-held character code of a character needed
to display.
Set to “0” during normal operation
Can not be used
When RGBON=1, set background color by character
unit.
No blinking
Blinking
Normal character
Reversed character
Contents
Function
Remarks
(Note 2)
Refer to supplemental
explanation (3).
Refer to BLINK2 to 0
(address F516)
6
Display control register
(1) Address F016
DA
0~D
0
1
2
3
4
5
6
7
8
9
A
B
C
Register
PTC0
PTC1
PTD0
PTD1
SEPV0
SEPV1
SYSEP0
SYSEP1
TEST10
TEST11
TEST12
TEST13
TEST14
Status
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
MITSUBISHI MICROCOMPUTERS
M35054-XXXFP/M35055-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Contents
Function
P0 output (port 0)
BLNK1 output
P1 output (port 1)
CO1 output
It is negative polarity at P0 output “L”, BLINK1 output.
It is positive polarity at P0 output “H”, BLINK1 output.
It is negative polarity at P01 output “L”, CO1 output.
It is positive polarity at P01 output “H”, CO1 output.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
SYSEP1
0
0
1
1
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
Can not be used.
It should be fixed to “1”.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
SYSEP0
0
1
0
1
Bias potential
Can not be used.
Can not be used.
1.75V
Can not be used.
Remarks
Port output control
Refer to supplemental explanation (4).
Control the port data
Refer to supplemental explanation (4).
Specifies the vertical synchronous
separation criterion
Refer to supplemental explanation (1).
Specifies the sync-bias potential
D
Note: The mark around the status value means the reset status by the “L” level is input to AC pin.
Notes
TEST15
0
1
It should be fixed to “0”.
Can not be used.
__
7
(2) Address F116
DA
0~D
0
1
2
3
4
5
6
7
8
9
A
B
C
D
Register
HP0
(LSB)
HP1
HP2
HP3
HP4
HP5
HP6
HP7
(MSB)
TEST16
TEST17
TEST18
TEST19
TEST20
TEST21
Status
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
M35054-XXXFP/M35055-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Contents
Function
Let horizontal display start position be HS,
HS = T ✕ (Σ 2nHPn+6)
Can not be used.
It should be fixed to “1”.
Can not be used.
It should be fixed to “1”.
Can not be used.
It should be fixed to “1”.
Can not be used.
It should be fixed to “1”.
Can not be used.
It should be fixed to “1”.
It should be fixed to “0”.
Can not be used.
7
n=0
HOR
VS
VERT
HS
Character
displaying
area
T : The oscillation cycle of display clock
MITSUBISHI MICROCOMPUTERS
Remarks
Set the horizontal display start
position by use of HP7 through
HP0. HP7 to HP0 = (00000000)
to (00001111) setting is
forbidden.
It can be set this up to 240 steps
in increments of one T.
8
(3) Address F216
0~D
0
1
2
3
4
5
6
7
8
9
A
B
C
D
Register
VP0
(LSB)
VP1
VP2
VP3
VP4
VP5
VP6
VP7
(MSB)
TEST22
TEST23
TEST24
TEST25
TEST26
TEST27
Status
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
M35054-XXXFP/M35055-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
ContentsDA
Function
Let vertical display start position be VS,
VS = H ✕ Σ 2nVPnVS
Can not be used.
It should be fixed to “1”.
Can not be used.
It should be fixed to “1”.
Can not be used.
It should be fixed to “1”.
Can not be used.
It should be fixed to “1”.
Can not be used.
It should be fixed to “1”.
It should be fixed to “0”.
Can not be used.
7
n=0
HOR
VS
VERT
HS
Character
displaying
area
H : The oscillation cycle of horizontal
synchronous signal
MITSUBISHI MICROCOMPUTERS
Remarks
Set the vertical display start
position by use of VP7 through
VP0. VP7 to VP0 = (00000000)
to (00000110) setting is
forbidden.
It can be set this up to 249 steps
in increments of one H.
VP7 to VP0 = (00000000) to
(00100011) setting is forbidden.
9
(4) Address F316
0~D
0
1
2
3
4
5
6
7
8
9
A
B
C
D
Register
HSZ10
HSZ11
HSZ20
HSZ21
VSZ10
VSZ11
VSZ20
VSZ21
TEST28
TEST29
TEST30
TEST31
TEST32
TEST33
Status
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
ContentsDA
HSZ11
0
0
1
1
HSZ21
0
0
1
1
VSZ11
0
0
1
1
VSZ21
0
0
1
1
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
HSZ10
HSZ20
VSZ10
VSZ20
MITSUBISHI MICROCOMPUTERS
M35054-XXXFP/M35055-XXXFP
Function
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Horizontal direction size
1T/dot
2T/dot
3T/dot
4T/dot
Horizontal direction size
1T/dot
2T/dot
3T/dot
4T/dot
Vertical direction size
1H/dot
2H/dot
3H/dot
4H/dot
Vertical direction size
1H/dot
2H/dot
3H/dot
4H/dot
Character size setting in the
horizontal direction for the first
line.
Character size setting in the
horizontal direction for the 2nd
line to 10th line.
Character size setting in the
vertical direction for the first line.
Character size setting in the
vertical direction for the 2nd line
to 10th line.
Remarks
10
(5) Address F416
0~D
0
1
2
3
4
5
6
7
8
9
A
B
C
D
Register
DSP0
DSP1
DSP2
DSP3
DSP4
DSP5
DSP6
DSP7
DSP8
DSP9
SPACE
TEST34
TEST35
TEST36
Status
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
M35054-XXXFP/M35055-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
ContentsDA
Function
BLK1
BLK0
0
0
1
1
Depends on BLK0 and BLK1 (address F816)
DSPn in the generic name for DSP0 to DSP9.
DSP0 to DSP9 are each controlled independently.
Normal display
Put a space line between line 2 and line 3, and
between line 8 and line 9.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
DSPn= “1”
Matrix-outline border
0
size
1
Border size
Matrix-outline size
0
1
Character size
DSPn= “0”
Matrix-outline size
Character size
Border size
Matrix-outline size
MITSUBISHI MICROCOMPUTERS
Remarks
Set the display mode of line 1.
Set the display mode of line 2.
Set the display mode of line 3.
Set the display mode of line 4.
Set the display mode of line 5.
Set the display mode of line 6.
Set the display mode of line 7.
Set the display mode of line 8.
Set the display mode of line 9.
Set the display mode of line 10.
Put a space line between line 2
and line 3 in displaying 32
characters.
11
M35054-XXXFP/M35055-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(6) Address F516
BLINK0
0
0
1
1
_
N/P
0
0
1
1
PALH
0
1
ContentsDA
Function
BLINK1
0
1
0
1
MPAL
0
1
0
1
__
INT/NON
0
1
0
1
0~D
0
Register
BLINK0
Status
0
1
1
BLINK1
0
1
0
2
BLINK2
1
_____
3
4
N/P
______________________
INT/NON
0
1
0
1
Division of vertical synchronizing signal into 1/64.
Cycle approximately 1 second.
Division of vertical synchronizing signal into 1/32.
Cycle approximately 0.5 second.
NTSC, M-PAL mode
PAL mode
Interlace
Non interlace
0
5
MPAL
1
0
6
PALH
1
7
EQP
0
1
8
TEST37
0
1
9
TEST38
0
1
A
TEST39
0
1
B
TEST40
0
1
C
TEST41
0
1
D
TEST42
0
1
Not include the equivalent pulse.
Include the equivalent pulse.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
It should be fixed to “0”.
Can not be used.
Note. To blink a character, set 1 to DAB (the blinking bit) of the display RAM.
MITSUBISHI MICROCOMPUTERS
Duty
Blinking off
25%
50%
75%
Synchronous mode
NTSC
M-PAL
PAL
Not available
Number of scanning lines
625H lines
626H lines
627H lines
628H lines
Remarks
Blinking duty ratio can be
altered. (Note)
Blinking cycle can be altered.
Refer to register MPAL
Scanning lines control (only in
internal synchronization)
Synchronizing signal is selected
with this register and N/P
_
register.
It should be fixed to “0” at NTSC
Effective only at non-interlace
12
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