Mitsubishi M35048-XXXFP Datasheet
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DESCRIPTION
The M35048-XXXFP is a character pattern display control IC can
display on the TV display. It can display 2 pages (24 characters ✕
12 lines per 1 page) at the same time. It uses a silicon gate CMOS
process and it housed in a 20-pin shrink SOP package.
For M35048-001FP that is a standard ROM version of M35048XXXFP respectively, the character pattern is also mentioned.
FEATURES
Screen composition...............24 characters ✕ 12 lines ✕ 2 pages
•
Number of characters displayed................. 288 (Max.) ✕ 2 pages
•
Character composition ..................................... 12 ✕ 18 dot matrix
•
Characters available................................ page 0 : 256 characters
•
Character sizes available ....................4 (vertical) ✕ 2 (horizontal)
•
Display locations available
•
Horizontal direction ................................................ 472 locations
Vertical direction .................................................... 255 locations
Blinking..................................................................Character units
•
Cycle : division of vertical synchronization signal into 32 or 64
Duty : 25%, 50%, or 75%
Data input .................................. By the 16-bit serial input function
•
Coloring
•
Character color .....................................................Character unit
Background coloring .............................................Character unit
Border (shadow) coloring ........................ 8 colors (RGB output)
Raster coloring ........................................ 8 colors (RGB output)
Blanking Character size blanking
•
Output ports
•
4 shared output ports (toggled between RGB output)
4 dedicated output ports
Display RAM erase function
•
Display input frequency range......... FOSC = 6.3 MHz to 16.0 MHz
•
Horizontal synchronous input frequency
•
...................................................H.sync = 15 .0 kHz to 32.0 kHz
Display oscillation stop function
•
page 1 : 128 characters
Specified by register
Specified by register
Border size blanking
Matrix-outline blanking
All blanking (all raster area)
(External input clock)
PIN CONFIGURATION (TOP VIEW)
20
19
18
17
16
15
14
13
12
11
DD2
➛
VERT
➛
HOR
➛
P5/B
➛
P4
➛
P3/G
P2
➛
P1/R
➛
➛
P0/BLNK0
SS1
V
V
SCK
TCK
V
SS2
AC
CS
SIN
DD1
P6
P7
1
2
➛
3
➛
4
5
➛
➛
6
➛
7
8
➛
9
➛
10
M35048 - XXXFP
TESTA V
Outline 20P2Q-A
APPLICATION
Movie, Digital steel camera
REV.1.0
PIN DESCRIPTION
Pin
Number
1
Symbol
TESTA
Pin name
TEST pin
Input/
Output
–
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Function
Test pin. Open this pin.
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VSS2
AC
CS
SCK
SIN
TCK
VDD1
P6
P7
VSS1
P0/BLNK0
P1/R
P2
P3/G
P4
Earthing pin
Auto-clear input
Chip select input
Serial data input
Serial data input
External clock
Power pin
Port P6 output
Port P7 output
Earthing pin
Port P0 output
Port P1 output
Port P2 output
Port P3 output
Port P4 output
–
Input
Input
Input
Input
Input
–
Output
Output
–
Output
Output
Output
Output
Output
Connect to GND.
When “L”, this pin resets the internal IC circuit. Hysteresis input. Built-in pull-up resistor.
Chip select pin. Set this pin to "L" level at serial data transfer. Hysteresis input. Built-in
pull-up resistor.
SIN pin serial data is taken in when SCK rises at CS pin "L" level. Hysteresis input. Built-
in pull-up resistor.
This is the pin for serial input of display control register and display RAM data. Hysteresis
input. Built-in pull-up resistor.
This is the pin for external clock input.
Please connect to +3V with the power pin.
This is the output port.
This is the output port.
Please connect to GND using circuit earthing pin.
This pin can be toggled between port pin output and BLNK0 signal output.
This pin can be toggled between port pin output and R signal output.
This is the output port.
This pin can be toggled between port pin output and G signal output.
This is the output port.
17
18
19
20
P5/B
HOR
VERT
VDD2
Port P5 output
Horizontal synchro-
nous signal input
Vertical synchro-
nous signal input
Power pin
Output
Input
Input
–
This pin can be toggled between port pin output and B signal output.
This pin inputs the horizontal synchronous signal. Hysteresis input.
This pin inputs the vertical synchronous signal. Hysteresis input.
Please connect to + 3V with the power pin.
REV.1.0
2
7
6
8
20
1
SIN
V
DD1
VDD2
3AC
11VSS1
2VSS2
TESTA
Clock oscillation
circuit display
Timing generator
Polarity switching circuit
Address control
circuit
Data control
circuit
Display control
register
Display RAM 0
(page 0)
Display RAM 1
(page 1)
Shift register
Blinking circuit
Reading address
control circuit
Display location
detection circuit
H counter
TCK
18
HOR
19
12
VERT
Synchronous signal
switching circuit
Display control
circuit
Port output
control circuit
P0/BLNK0
13 P1/R
15 P3/G
17 P5/B
14 P2
16 P4
9P6
10 P7
Input control circuit
Polarity switching circuit
Display character
ROM 0
(page 0)
Display character
ROM 1
(page 1)
SCK
5
CS
4
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
BLOCK DIAGRAM
REV.1.0
3
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
MEMORY CONSTITUTION
Address 00016 to 11F16 are assigned to the display RAM, address
12016 to 12816 are assigned to the display control registers. The
internal circuit is reset and all display control registers (address
12016 to 12816) are set to “0” when the AC pin level is “L”. And
then, RAM is not erased and be undefinited. This memory is con-
Addresses
00016
00116
11E16
11F16
12016
12116
12216
12316
DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
0 BB BG BR BLINK B G R C7 C6 C5 C4 C3 C2 C1 C0
0 BB BG BR BLINK B G R C7 C6 C5 C4 C3 C2 C1 C0
………
………
0 BB BG BR BLINK B G R C7 C6 C5 C4 C3 C2 C1 C0
0 BB BG BR BLINK B G R C7 C6 C5 C4 C3 C2 C1 C0
0
0
0
0
Background
coloring
TEST27
TEST28
TEST31SPACE2SPACE1SPACE0TEST30 TEST29
TEST34 TEST3 TEST2 TEST1 TEST0 TEST33 TEST32
VJT
PTD7 PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0 PTC5 PTC4 PTC3 PTC2 PTC1 PTC0
__
Blink-
ing
TEST26 TEST25 TEST24 TEST23 TEST22 TEST21 TEST20 TEST19 TEST18 TEST17 TEST16 TEST15 TEST14
Character color
sisted of 2 pages : page 0 memory and page 1 memory (their addresses are common), page controlled by DAF bit of each address
when writing data. For detail, see “DATA INPUT EXAMPLE”.
Memory constitution is shown in Figure 1 and 2.
Character code
HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0
VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0
12416
12516
12616
12716
12816
Fig. 1 Memory constitution (page 0 memory)
0 TEST9 TEST5 TEST4 DSP11 DSP10 DSP9 DSP8 DSP7 DSP6 DSP5 DSP4 DSP3 DSP2 DSP1 DSP0
0
TEST10VSZ1H1 VSZ1H0 VSZ1L1 VSZ1L0 V1SZ1 V1SZ0
0
POPUP VSZ2H1 VSZ2H0 VSZ2L1 VSZ2L0 V18SZ1 V18SZ0
0
MODE0 TEST12 HSZ20 TEST11 HSZ10 BETA14
0
MODE1 BLINK2 BLINK1 BLINK0 DSPON TEST35
LIN9 LIN8 LIN7 LIN6 LIN5 LIN4 LIN3 LIN2
LIN17 LIN16 LIN15 LIN14 LIN13 LIN12 LIN11 LIN10
TEST8 TEST7 TEST6 FB FG FR RB RG RR
RAMERS
SYAD BLK1 BLK0 POLH POLV VMASK__B/F BCOL
REV.1.0
4
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Addresses
00016
00116
………
11E16
11F16
12016
12116
12216
12316
12416
12516
12616
12716
DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
1 BB BG BR BLINK B G R 0 C6 C5 C4 C3 C2 C1 C0
1 BB BG BR BLINK B G R 0 C6 C5 C4 C3 C2 C1 C0
………
1 BB BG BR BLINK B G R 0 C6 C5 C4 C3 C2 C1 C0
1 BB BG BR BLINK B G R 0 C6 C5 C4 C3 C2 C1 C0
1
1
1
1 TEST3 TEST2 TEST1 TEST0
1 TEST4 DSP11 DSP10 DSP9 DSP8 DSP7 DSP6 DSP5 DSP4 DSP3 DSP2 DSP1 DSP0
1
1
1
Background
coloring
SPACE2 SPACE1 SPACE0
VSZ1H1 VSZ1H0 VSZ1L1 VSZ1L0
VSZ2H1 VSZ2H0 VSZ2L1 VSZ2L0 V18SZ1 V18SZ0
TEST12
HSZ20
Blink-
ing
TEST11
Character color
TEST30 TEST29
TEST33 TEST32
V1SZ1 V1SZ0 LIN9 LIN8 LIN7 LIN6 LIN5 LIN4 LIN3 LIN2
HSZ10
BETA14
HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0
TEST8 TEST7 TEST6 FB FG FR RB RG RR
………
Character code
VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0
LIN17 LIN16 LIN15 LIN14 LIN13 LIN12 LIN11 LIN10
12816
Fig. 2 Memory constitution (page 1 memory)
Note: Page 0 and page 1 registers are found in their respective pages. For example, HP8 to HP0 of the page 0 memory sets the horizontal display start posi-
tion of page 0, whereas HP8 to HP0 (same register name) of the page 1 memory sets the horizontal display start position of page 1. Also, registers
common to both page 0 and page 1 are found only in the page 0 memory. For example, PTC0 is the control register of the P0 pin and is found only in
the page 0 memory.
1
BLINK2 BLINK1 BLINK0 DSPON TEST13
RAMERS
SYAD BLK1 BLK0 BCOL
REV.1.0
5
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
SCREEN CONSTITUTION
The screen lines and rows are determined from each address of
the display RAM (page 0 and page 1 are common). The screen
constitution is shown in Figure 3.
Row
Line
123456789101112131415161718192021222324
0001600116002160031600416005160061600716008160091600A1600B1600C1600D1600E1600F1601016011160121601316014160151601616017
1
018160191601A1601B1601C1601D1601E1601F160201602116022160231602416025160261602716028160291602A1602B1602C1602D1602E1602F
2
0301603116032160331603416035160361603716038160391603A1603B1603C1603D1603E1603F1604016041160421604316044160451604616047
3
048160491604A1604B1604C1604D1604E1604F160501605116052160531605416055160561605716058160591605A1605B1605C1605D1605E1605F
4
0601606116062160631606416065160661606716068160691606A1606B1606C1606D1606E1606F1607016071160721607316074160751607616077
5
078160791607A1607B1607C1607D1607E1607F160801608116082160831608416085160861608716088160891608A1608B1608C1608D1608E1608F
6
0901609116092160931609416095160961609716098160991609A1609B1609C1609D1609E1609F160A0160A1160A2160A3160A4160A5160A6160A7
7
0A8160A9160AA160AB160AC160AD160AE160AF160B0160B1160B2160B3160B4160B5160B6160B7160B8160B9160BA160BB160BC160BD160BE160BF
8
0C0160C1160C2160C3160C4160C5160C6160C7160C8160C9160CA160CB160CC160CD160CE160CF160D0160D1160D2160D3160D4160D5160D6160D7
9
0D8160D9160DA160DB160DC160DD160DE160DF160E0160E1160E2160E3160E4160E5160E6160E7160E8160E9160EA160EB160EC160ED160EE160EF
10
0F0160F1160F2160F3160F4160F5160F6160F7160F8160F9160FA160FB160FC160FD160FE160FF1610016101161021610316104161051610616107
11
108161091610A1610B1610C1610D1610E1610F161101611116112161131611416115161161611716118161191611A1611B1611C1611D1611E1611F
12
* The hexadecimal numbers in the boxes show the display RAM address.
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
16
16
16
16
16
16
16
16
16
16
16
16
Fig. 3 Screen constitution
REV.1.0
6
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DISPLAY RAM
Address 00016 to 11F16
BR
R
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Contents
Function
Magenta
Green
Yellow
Magenta
Color
Black
Red
Green
Yellow
Blue
Cyan
White
Color
Black
Red
Blue
Cyan
White
Remarks
Set display character
Set character color (character unit)
Set blinking
See register BLINK2 to BLINK0 (address12816)
Set character background
(character unit)
DA
Register
Status
0
0
C0
Set the displayed ROM character code.
1
0
1
2
C1
C2
To write data into page 0 (Note 2), select the data from the ROM
characters (256 types) for page 0 and set the character code. To
1
write data into page 1, do the same from the ROM characters (128
0
types) for page 1.
1
0
3
C3
1
0
4
C4
1
0
5
C5
1
0
6
C6
1
0
7
C7
Set "0" to C7 when 0 page setting.
1
8
R
1
0
0
9
G
1
0
A
B
1
Do not blink.
B
C
BLINK
BR
0
1
Blinking
0
BB
1
0
D
BG
1
0
E
BB
1
Notes 1. The display RAM is undefined state at the AC pin.
2. The display RAM consists of 2 pages, page 0 and page 1 (common address). The page in which data is written is controlled by the DAF bit. When
set to "0", data is written into page 0, whereas when set to "1", data is written into page 1.
3. Set to "1" when only setting blank code "FF
G
B
0
0
0
0
1
0
1
0
0
1
0
1
1
1
1
1
BG
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
____
16" to character code.
REV.1.0
7
REGISTERS DESCRIPTION
(1) Address 12016
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Contents
DA
Notes 1. The mark around the status value means the reset status by the "L" level is input to AC pin.
Register
TEST14
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
(Note 3)
TEST15
(Note 3)
TEST16
(Note 3)
TEST17
(Note 3)
TEST18
(Note 3)
TEST19
(Note 3)
TEST20
(Note 3)
TEST21
(Note 3)
TEST22
(Note 3)
TEST23
(Note 3)
TEST24
(Note 3)
TEST25
(Note 3)
TEST26
(Note 3)
VJT
TEST27
(Note 3)
2. The page in which data is written is controlled by the DAF bit. When set to "0", data is written into page 0, whereas when set to "1", data is written
into page 1.
3. Registers marked with (Note 3) are found only in page 0, therefore the register value does not change when the DAF bit is set to "1".
Status
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.It should be fixed to “0”.
0
Can not be used.
1
It should be fixed to “0”.
0
Can not be used.
1
It should be fixed to “0”.
0
Can not be used.
1
It should be fixed to “0”.
0
Can not be used.
1
It should be fixed to “0”.
0
Can not be used.
1
It should be fixed to “0”.
0
It is used to "0", normally.
1
Alleviates continuous vertical jitters.
0
Can not be used.
1
It should be fixed to “0”.
Function
____
Remarks
REV.1.0
8
(2) Address 12116
Register
DA
0
1
2
3
PTC0
(Note 3)
PTC1
(Note 3)
PTC2
(Note 3)
PTC3
(Note 3)
Status
P0 output (port P0).
0
BLNK0 output.
1
P1 output (port P1).
0
R signal output.
1
P2 output (port P2).
0
Can not be used.
1
P3 output (port P3).
0
G signal output.
1
Contents
Function
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Remarks
P0 pin output control.
P1 pin output control.
P2 pin output control.
P3 pin output control.
P4 output (port P4).
4
5
6
7
8
9
A
B
PTC4
(Note 3)
PTC5
(Note 3)
PTD0
(Note 3)
PTD1
(Note 3)
PTD2
(Note 3)
PTD3
(Note 3)
PTD4
(Note 3)
PTD5
(Note 3)
0
Can not be used.
1
P5 output (port P5).
0
B signal output.
1
“L” output or negative polarity output (BLNK0 output).
0
“H” output or positive polarity output (BLNK0 output).
1
“L” output or negative polarity output (R signal output).
0
“H” output or positive polarity output (R signal output).
1
“L” output.
0
“H” output.
1
“L” output or negative polarity output (G signal output).
0
“H” output or positive polarity output (G signal output).
1
“L” output.
0
“H” output.
1
“L” output or negative polarity output (B signal output).
0
“H” output or positive polarity output (B signal output).
1
P4 pin output control.
P5 pin output control.
P0 pin data control.
P1 pin data control.
P2 pin data control.
P3 pin data control.
P4 pin data control.
P5 pin data control.
“L” output.
C
D
E
Notes 1. The mark around the status value means the reset status by the "L" level is input to AC pin.
PTD6
(Note 3)
PTD7
(Note 3)
TEST28
(Note 3)
2. The page in which data is written is controlled by the DAF bit. When set to "0", data is written into page 0, whereas when set to "1", data is written
into page 1.
3. Registers marked with (Note 3) are found only in page 0, therefore the register value does not change when the DAF bit is set to "1".
0
“H” output.
1
0
“L” output.
1
“H” output.
Can not be used.
0
It should be fixed to “0”.
1
____
P6 pin data control.
P7 pin data control.
REV.1.0
9
(3) Address 12216
DA
Register
0
1
2
3
HP0
HP1
HP2
HP3
Status
0
1
0
1
0
1
0
1
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Contents
Function
If HS is the horizontal display start location,
8
HS = T × 2nHPn + 6)
(Σ
n = 0
T : Period of display frequency
472 settings are possible.
HOR
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
Remarks
Horizontal display start location is
specified using the 11 bits from HP8
to HP0.
HP8 to HP0 = (000000000002) and
(000001001112) setting is forbidden.
4
HP4
0
VS
1
5
HP5
1
VERT
0
0
6
HP6
HS*
Display area
HS* (shown left) shows horizontal
display start location that is register B/F
(address 12816) = 0 is set.
1
0
7
HP7
1
0
8
HP8
1
0
9
TEST29
A
TEST30
B
SPACE0
C
SPACE1
D
SPACE2
E
TEST31
(Note 3)
Notes 1. The mark around the status value means the reset status by the "L" level is input to AC pin.
2. The page in which data is written is controlled by the DAF bit. When set to "0", data is written into page 0, whereas when set to "1", data is written
into page 1.
3. Registers marked with (Note 3) are found only in page 0, therefore the register value does not change when the DAF bit is set to "1".
Can not be used.
1
It should be fixed to “0”.
Can not be used.
0
It should be fixed to “0”.
1
0
1
0
1
0
1
0
1
SPACE
2
1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
(S) represents one line worth of spac
Can not be used.
It should be fixed to “0”.
Number of Lines and Space
<(S) represents space>
0
0
1
0
1
0
1
0
1
12
1 (S) 10 (S) 1
2 (S) 8 (S) 2
3 (S) 6 (S) 3
4 (S) 4 (S) 4
5 (S) 2 (S) 5
6 (S) 6
6 (S)(S) 6
Leave one line worth of space in the vertical direction.
For example, 6 (S) 6 indicates two sets
of 6 lines with a line of spaces between
lines 6 and 7.
A line is 18 × N horizontal scan lines.
N is determined by the character size in
the vertical direction
____
__
10
REV.1.0
(4) Address 12316
DA
Register
0
1
2
VP0
VP1
VP2
Contents
Status
0
If VS is the vertical display start location,
1
VS = H × 2nVPn
0
H: Cycle with the horizontal synchronizing pulse
1
255 settings are possible.
Σ
n = 0
7
Function
0
1
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Remarks
The vertical start location is specified
using the 10 bits from VP7 to VP0.
VP7 to VP0 = (00000000002) setting is
forbidden.
HOR
3
VP3
0
1
4
VP4
0
VS
1
5
VP5
0
VERT
HS*
1
6
VP6
0
Display area
HS* (shown left) shows horizontal
display start location that is register B/F
(address 12816) = 0 is set.
__
1
7
VP7
0
1
0
TEST32
8
TEST33
9
A
TEST0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
B
C
D
E
Notes 1. The mark around the status value means the reset status by the "L" level is input to AC pin.
TEST1
TEST2
TEST3
TEST34
(Note 3)
2. The page in which data is written is controlled by the DAF bit. When set to "0", data is written into page 0, whereas when set to "1", data is written
into page 1.
3. Registers marked with (Note 3) are found only in page 0, therefore the register value does not change when the DAF bit is set to "1".
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
____
REV.1.0
11
(5) Address 12416
DA
Register
0
1
2
3
DSP0
DSP1
DSP2
DSP3
Status
0
1
0
1
0
1
0
1
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Contents
Function
The display mode (blanking mode) for line n on the display
screen is set line-by-line, using DSPn (n = 0 to 11).
The display mode is determined by the combination of registers
BLK1 and BLK0 (address 12816). Settings are given below.
BLK1
0
0
1
1
BLK0
0
1
0
1
DSPn= “0”
Matrix-outline border
Character
Border
Matrix-outline
DSPn= “1”
Matrix-outline
Border
Matrix-outline
Character
(At register BCOL = “0”)
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
Remarks
Sets the display mode of line 1.
Sets the display mode of line 2.
Sets the display mode of line 3.
Sets the display mode of line 4.
0
4
DSP4
For detail, see DISPLAY FORM1(1).
Sets the display mode of line 5.
1
5
DSP5
0
Sets the display mode of line 6.
1
6
DSP6
0
Sets the display mode of line 7.
1
7
DSP7
0
Sets the display mode of line 8.
1
8
DSP8
0
Sets the display mode of line 9.
1
9
DSP9
0
Sets the display mode of line 10.
1
A
DSP10
0
Sets the display mode of line 11.
1
B
DSP11
0
Sets the display mode of line 12.
1
It should be fixed to “0”.
C
TEST4
D
TEST5
(Note 3)
E
TEST9
(Note 3)
Notes 1. The mark around the status value means the reset status by the "L" level is input to AC pin.
2. The page in which data is written is controlled by the DAF bit. When set to "0", data is written into page 0, whereas when set to "1", data is written
into page 1.
3. Registers marked with (Note 3) are found only in page 0, therefore the register value does not change when the DAF bit is set to "1".
0
Can not be used.
1
It should be fixed to “0”.
0
1
Can not be used.
0
Can not be used.
1
It should be fixed to “1”.
12
REV.1.0
(6) Address 12516
DA
Register
0
LIN2
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Contents
Status
0
The vertical dot size for line n in the character dot lines (18 vertical
lines) is set using LINn (n = 2 to 17).
1
Function
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
Remarks
Vertical direction dot size setting for
the 2nd line.
0
1
LIN3
Dot size can be selected between 2 types for each dot line.
1
Vertical direction dot size setting for
the 3rd line.
For dot size, see the below registers. Line 1 and lines 2 to 12 can
0
2
3
4
LIN4
LIN5
LIN6
be set independent of one another.
1
0
1
1st line
2nd to 12th
line
LINn = “0”
Refer to VSZ1L0
and VSZ1L1
Refer to VSZ2L0
and VSZ2L1
0
LINn = “1”
Refer to VSZ1H0
and VSZ1H1
Refer to VSZ2H0
and VSZ2H1
1
5
LIN7
0
1
6
LIN8
0
1
7
LIN9
0
1
H: Cycle with the horizontal synchronizing pulse
8
V1SZ0
9
V1SZ1
0
V1SZ1
V1SZ0
1
0
1
0
0
1
1
Vertical direction size
0
1
0
1
1H/dot
2H/dot
3H/dot
4H/dot
Vertical direction dot size setting for
the 4th line.
Vertical direction dot size setting for
the 5th line.
Vertical direction dot size setting for
the 6th line.
Vertical direction dot size setting for
the 7th line.
Vertical direction dot size setting for
the 8th line.
Vertical direction dot size setting for
the 9th line.
Vertical direction dot size setting for
the 1st line.
(all lines are common)
0
A
VSZ1L0
B
VSZ1L1
C
VSZ1H0
D
VSZ1H1
E
TEST10
(Note 3)
Notes 1. The mark around the status value means the reset status by the "L" level is input to AC pin.
2. The page in which data is written is controlled by the DAF bit. When set to "0", data is written into page 0, whereas when set to "1", data is written
into page 1.
3. Registers marked with (Note 3) are found only in page 0, therefore the register value does not change when the DAF bit is set to "1".
H: Cycle with the horizontal synchronizing pulse
VSZ1L1
VSZ1L0
1
0
1
0
1
0
1
0
1
0
0
1
1
H: Cycle with the horizontal synchronizing pulse
VSZ1H1
VSZ1H0
0
0
1
1
It should be fixed to “0”.
Can not be used.
Vertical direction size
0
1
0
1
Vertical direction size
0
1
0
1
1H/dot
2H/dot
3H/dot
4H/dot
1H/dot
2H/dot
3H/dot
4H/dot
Character dot line vertical direction dot
size setting for the 1st line (LINn = 0).
Character dot line vertical direction dot
size setting for the 1st line (LINn = 1).
REV.1.0
13
(7) Address 12616
DA
Register
0
1
2
3
4
LIN10
LIN11
LIN12
LIN13
LIN14
Status
0
1
0
1
0
1
0
1
0
1
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Contents
Function
The vertical dot size for line n in the character dot lines (18 vertical
lines) is set using LINn (n = 2 to 17).
Dot size can be selected between 2 types for each dot line.
For dot size, see the below registers. Line 1 and lines 2 to 12 can
be set independent of one another.
1st line
2nd to 12th
line
LINn = “0”
Refer to VSZ1L0
and VSZ1L1
Refer to VSZ2L0
and VSZ2L1
LINn = “1”
Refer to VSZ1H0
and VSZ1H1
Refer to VSZ2H0
and VSZ2H1
MITSUBISHI MICROCOMPUTERS
M35048-XXXFP
Remarks
Vertical direction dot size setting for
the 11th line.
Vertical direction dot size setting for
the 11th line.
Vertical direction dot size setting for
the 12th line.
Vertical direction dot size setting for
the 13th line.
Vertical direction dot size setting for
the 14th line.
5
LIN15
0
1
6
LIN16
0
1
7
LIN17
0
1
0
8
V18SZ0
9
V18SZ1
A
VSZ2L0
B
VSZ2L1
C
VSZ2H0
D
VSZ2H1
E
POPUP
(Note 3)
Notes 1. The mark around the status value means the reset status by the "L" level is input to AC pin.
2. The page in which data is written is controlled by the DAF bit. When set to "0", data is written into page 0, whereas when set to "1", data is written
into page 1.
3. Registers marked with (Note 3) are found only in page 0, therefore the register value does not change when the DAF bit is set to "1".
H: Cycle with the horizontal synchronizing pulse
V18SZ1
1
0
1
0
1
0
1
0
1
0
1
0
1
V18SZ0
0
0
1
1
H: Cycle with the horizontal synchronizing pulse
VSZ2L1
0
0
1
1
H: Cycle with the horizontal synchronizing pulse
VSZ2H1
0
0
1
1
Page 1 priority display
Page 0 priority display
0
1
0
1
VSZ2L0
0
1
0
1
VSZ2H0
0
1
0
1
Vertical direction size
1H/dot
2H/dot
3H/dot
4H/dot
Vertical direction size
1H/dot
2H/dot
3H/dot
4H/dot
Vertical direction size
1H/dot
2H/dot
3H/dot
4H/dot
Vertical direction dot size setting for
the 15th line.
Vertical direction dot size setting for
the 16th line.
Vertical direction dot size setting for
the 17th line.
Vertical direction dot size setting for
the 18th line.
(all lines are common)
Character dot line vertical direction dot
size setting for the 2nd line to 12th line
(LINn = 0).
Character dot line vertical direction dot
size setting for the 2nd line to 12th line
(LINn = 1).
Sets the priority page for when 2 pages are
displayed at the same time. The setting is
effective only when the standard display
mode is set as MODE0 = "0" , MODE1 = "0".
See "DISPLAY FORM 2" .
14
REV.1.0
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