REMARK : This service manual explains them by extracting specifications
designed for the model CDR631 only. The explanation for CD-R module
"MAR770" (Loader : CDL4009' + CD-R Main board) is not mentioned on this
service manual.
The CD-R module information is described in the service manual of CD-R
modules <MAR770/MAR775>.
POWER
CD Recorder
CD RECORDER CDR631
IR
Recordable
ReWritable
STANDBY
HEADPHONE LEVEL
010
TIME
TEXT
12
6
4
3
9
8
7
TR.INCR.
REC MODE
FINAL
PROG
5
INPUT
0
REPEATRANDOM
STORE
DELETE
MENU
CANCL
ERASE
REC LEVEL/SELECT
PUSH ENTER
CDR631
TABLE OF CONTENTS
SECTIONPAGE
MAIN UNIT
1. Servicing the CDR631 ............................................................................................................................... 1
10. SCHEMATIC DIAGRAM AND PARTS LOCATION ................................................................................. 33
11. EXPLODED VIEW AND PARTS LIST ..................................................................................................... 43
12. ELECTRICAL PARTS LIST ..................................................................................................................... 46
Please use this service manual with referring to the user guide ( D.F.U. ) without fail.
R
Printed in Japan
CDR631
387K855010 MIT
3120 785 22410
First Issue 2001.02
Page 2
MARANTZ DESIGN AND SERVICE
MARANTZ AMERICA, INC.
Using superior design and selected high grade components, MARANTZ company has created the ultimate in stereo sound.
Only original MARANTZ parts can insure that your MARANTZ product will continue to perform to the specifications for which
it is famous.
Parts for your
MARANTZ equipment are generally available to our National Marantz Subsidiary or Agent.
ORDERING PARTS :
Parts can be ordered either by mail or by Fax.. In both cases, the correct part number has to be specified.
The following information must be supplied to eliminate delays in processing your order :
1. Complete address
2. Complete part numbers and quantities required
3. Description of parts
4. Model number for which part is required
5. Way of shipment
6. Signature : any order form or Fax. must be signed, otherwise such part order will be considered as null and void.
SUPERSCOPE TECHNOLOGIES, INC.
MARANTZ PROFESSIONAL PRODUCTS
2640 WHITE OAK CIRCLE, SUITE A
AURORA, ILLINOIS 60504 USA
PHONE : 630 - 820 - 4800
FAX : 630 - 820 - 8103
WO KEE HONG DISTRIBUTION PTE LTD
130 JOO SENG ROAD
#03-02 OLIVINE BUILDING
SINGAPORE 368357
PHONE : +65 858 5535 / +65 381 8621
FAX : +65 858 6078
MALAYSIA
WO KEE HONG ELECTRONICS SDN. BHD.
SUITE 8.1, LEVEL 8, MENARA GENESIS,
NO. 33, JALAN SULTAN ISMAIL,
50250 KUALA LUMPUR, MALAYSIA
PHONE : +60 3 - 2457677
FAX : +60 3 - 2458180
CAUTION : After servicing this appliance and prior to returning to customer, measure the resistance between either primary AC
cord connector pins ( with unit NOT connected to AC mains and its Power switch ON ), and the face or Front Panel of product and
controls and chassis bottom.
Any resistance measurement less than 1 Megohms should cause unit to be repaired or corrected before AC power is applied, and
verified before it is return to the user/customer.
Ref. UL Standard No. 813.
In case of difficulties, do not hesitate to contact the Technical
Department at above mentioned address.
001120MIT
Page 3
1.Servicing the CDR631
1.1 INTRODUCTION:
The CDR631is the professional version of a CD recorder, this means that the SCMS (Serial Copy Management System) is
not included. The CDR631can record on the Audio and CDRs PC.
The CDR631is suitable for recording and playback of CD-R W discs (CD-Re Writable disc).
Playback & Recording and Disc
Disc
Player/Recorder
Audio CD Player
Current products Ex:CD-17
Audio CD Player
CD-RW playback Ex:CD-17MK II
CD-RW Recorder
For Professional Ex:CDR630/631/640
CD-RW Recorder
For Consumer Ex:DR6000/6050
CDR
CD
Consumer Disc
Finalized
non
Finalized
Professional Disc
FinalizedFinalized
non
Finalized
Consumer Disc
Finalized
PP noP nonononono -
PP noP no Pno Pno -
PPP/RPP/RP/RP/RP/RP/R no
PPP/RPPPPP/RP/RYES
CD-RW
non
Finalized
Professional Disc
non
Finalized
SCMS
Consumer: For Digital Audio
Professional : For General use (Including PC)
P: Playback
R: Recording
1.2 OPENING THE PRODUCT:
The product can be opened by removing the top cover (8 screws). Once the product is opened one can have access to the
several PCB's and the main module. To have access to the Display PCB, the Headphone PCB first the front cover has to
be removed.
SWITCHING POWER
SUPPLY BOARD
MOTER
BOARD
CDR LOADER
DISPLAY BOARD
Below the several PCB's and it function and service policy will be discussed:
AUDIO
BOARD
HEAD
PHONE
BOARD
1
Page 4
1.2.1 CDR loader (CDR main module CDL4009 or MAR770):
This complete CDR loader is considered as not repairable in the field. therefore this module will be repaired centrally. A
module exchange procedure will be set up for this purpose. The module can be removed from the product by removing 4
screws and the transformer (see demounting the CDR module on page 1-7), and loosing the connectors.
This module is the complete CD recorder, it contains the following parts:
CD Mechanism (CDM4009'). Underneath this mechanism a PCB is mounted which is adjusted to the mechanism (laser
current settings are stored in EEPROM).
Loader Assy. This mechanical assy takes care for the tray control.
Main PCB. This PCB takes care that the (analog or digital) signal to be recorded is converted into a suitable signal which
can be recorded on the disc.
Digital signals with an other sampling frequency then 44.1kHz will be converted in the sample rate converter (DASP) to
44.1kHz.
Analog signals will be first converted into a digital converter by the AD converter.
This PCB also takes care that the signal from the CD (playback) is converted into a suitable digital signal (or analog via
the DA converter).
The main microprocessor controls the several functions of this PCB.
1.2.2 Switching Power Supply Board.
This PCB contains the Power Supply, which delivers the sevelal volteges for the each PCB in the CDR631. On this Power
Supply a fuse (Primaly side) are mounted on this PCB. The power SW is jointed the Power bottom on the front panel.
All parts are available as spare parts.
1.2.3 Audio Board.
This PCB contains the audio part,witch takes care that the signal from CDR main module is converted into an analog signal
via DA converter and outputs the analog signal. This PCB contains the output and input connectors also. All parts are available
as spare parts.
1.2.4 Display Board.
This PCB contains the Display, which informs the user about the status of the recording/playback process and it also takes
care for scanning the keys on the front panel. The information from the keys is fed via a I C connection to the main
microprocessor on the CDR loader module. Information which needs to be displayed is also fed via this I C line from the
main microprocessor on the CDR loader module to the display controller.
The parts for this PCB are available as service parts so this PCB can be repairable up to component level.
2
2
1.2.5 Headphone Board.
This PCB contains the headphone socket and potentiometer which controls the headphone volume. All parts are available
as spare parts.
IMPORTANT
In case of replace the CD-R module "MAR770", the initialization is necessary.
Please initialize the CD-R module with following orders.
1. Press the POWER button (POWER ON) while depressing FINALIZE button and REC
MODE button together.
2. FL Display shows;
WAIT
PGM PROTOCOL
PGM PORT END
3. Press the POWER button (POWER OFF).
Then the CD-R module set up to CDR631 own status.
2
Page 5
2 TECHNICAL SPECIFICATIONS
GENERAL
System .................................................................................................... Compact disc digital audio
Number of channels ................................................................................ 2 (stereo)
Analog Input Sensitivity (Unbalanced) .................................................... 500 mVrms / 50 kohms
Analog Input Sensitivity (Balanced) ........................................................ 0 dBu to +22 dBu / 50 kohms
(default setting : +16 dBu / 50 kohms)
Specifications subject to change without prior notice.
C - 35 °C
3
Page 6
3. WARNINGS
WARNING
All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD). Careless handling during
repair can reduce life drastically.
When repairing, make sure that you are connected with the
same potential as the mass of the set via a wristband with
resistance. Keep components and tools at this potential.
ATTENTION
Tous les IC et beaucoup d´autres semi-conducteurs sont
sensibles aux décharges statiques (ESD). Leur longévite
pourrait être considérablement écourtée par le fait qu´aucune
précaution nést prise à leur manipulation.
Lors de réparations, s´assurer de bien être relié au même
potentiel que la masse de l´appareil et enfileer le bracelet
serti d´une résistance de sécurité.
Veiller à ce que les composants ainsi que les outils que l´on
utilise soient également à ce potentiel.
WARNUNG
Alle ICs und viele andere Halbleiter sind empfindlich
gegenüber elektrostatischen Entladungen (ESD).
Unsorgfältige Behandlung im Reparaturfall kann die
Lebensdauer drastisch reduzieren.
Sorgen Sie dafür, daß sie im Reparaturfall über ein Pulsarmband mit Widerstand mit dem Massepotential des
Gerätes verbunden sind.
Halten Sie Bauteile und Hilfsmittel ebenfalls auf diesem
Potential.
anti-static wristband4822 395 10223
connection box (3 press stud connections, 1M )4822 320 11307
extendible cable (2m, 2M , to connect wristband to connection box)4822 320 11305
connecting cable (3m, 2M , to connect table mat to connection box)4822 320 11306
earth cable (1M , to connect any product to mat or to connection box)4822 320 11308
KIT ESD3 (combining all 6 prior products - small table mat)4822 310 10671
wristband tester4822 344 13999
ESD
WAARSCHUWING
Alle IC´s en vele andere halfgeleiders zijn gevoelig voor
electrostatische ontladingen (ESD).
Onzorgvuldig behandelen tijdens reparatie kan de levensduur
drastisch doen vermindern. Zorg ervoor dat u tijdens reparatie
via een polsband met weerstand verbonden bent met hetzelfde
potentiaal als de massa van het apparaat.
Houd componenten en hulpmiddelen ook op ditzelfde potentiaal.
AVVERTIMENTO
Tutti IC e parecchi semi-conduttori sono sensibili alle scariche
statiche (ESD).
La loro longevità potrebbe essere fortemente ridatta in caso di
non osservazione della più grande cauzione alla loro
manipolazione. Durante le riparationi occorre quindi essere
collegato allo stesso potenziale che quello della massa
delápparecchio tramite un braccialetto a resistenza.
Assicurarsi che i componenti e anche gli utensili con quali si
lavora siano anche a questo potenziale.
small 600x650x1.25mm4822 466 10958
Safety regulations require that the set be restored to its
original condition and that parts which are identical with
those specified be used.
Safety components are marked by the symbol
Les normes de sécurité exigent que l`appareil soit remis
à l`état d`origine et que soient utilisées les pièces de
rechange identiques à celles spécifiées.
Les composants de sécurité sont marqués
Bei jeder Reparatur sind die geltenden Sicherheitsvorschriften zu beachten. Der Originalzustand des Gerätes
darf nicht verändert werden. Für Reparaturen sind Originalersatzteile zu verwenden.
Sicherheitsbauteile sind durch das Symbol markiert.
U : VERSIONN : VERSION
DANGER: Invisible laser radiation when open.
AVOID DIRECT EXPOSURE TO BEAM.
Varning !
Advarsel !
Osynlig laserstrålning när apparaten är öppnad och
spärren är urkopplad. Betrakta ej strålen.
Usynlig laserstråling ved åbning når sikkerhedsafbrydere
er ude af funktion. Undgå udsaettelse for stråling.
CLASS III b
LASER PRODUCT
SAFETY
Veiligheidsbepalingen vereisen, dat het apparaat in zijn
oorspronkeliijke toestand wordt teruggebracht en dat
onderdelen, identiek aan de gespecificeerde, worden toegepast.
De Veiligheidsonderdelen zijn aangeduid met het symbool
Le norme di sicurezza estigono che l´apparecchio venga
rimesso nelle condizioni originali e che siano utilizzati i
pezzi di ricambiago identici a quelli specificati.
Componenty di sicurezza sono marcati con
CLASS 3B
LASER PRODUCT
Varoitus !
Avatussa laitteessa ja suojalukituksen ohitettaessa olet alttiina
näkymättömälle laserisäteilylle. Älä katso säteeseen !
After servicing and before returning the set to customer
perform a leakage current measurement test from all
exposed metal parts to earth ground, to assure no
shock hazard exists.
The leakage current must not exceed 0.5mA.
"Pour votre sécurite, ces documents doivent être utilisés par
des spécialistes agréés, seuls habilités à réparer votre
appareil en panne".
4
Page 7
4. SERVICE HINTS AND TOOLS
SERVICE TOOLS
“The tools listed below are standard test tools that can be used for repairing and testing Marantz
CD Players & Recorders. Unless otherwise stated in the text, these tools are not mandatory for
servicing Marantz CD Players & Recorders”
Audio signals disc4822 397 30184
Disc without errors (SBC444)+
Disc with DO errors, black spots and fingerprints (SBC444A)4822 397 30245
Disc (65 min 1kHz) without no pause4822 397 30155
Max. diameter disc (58.0 mm)4822 397 60141
Torx screwdrivers
Set (straight)4822 395 50145
Set (square)4822 395 50132
13th order filter4822 395 30204
Hexagon socket screw button (No. 1.5)
5
Page 8
5. Diagnostic Software
5.1Electrical service diagnostics
ELECTRICAL SERVICE DIAGNOSTICS
(software versions, test for defective components)
If power ON,
switch power OFF
Load CD-DA disc (SBC444A)
Press <PLAY> + <F FWD>
simultaneously and switch ON unit
PLAYER
INFORMATION
Display :
"PLAYER ID"
"SW VERSION BACK END"
"SW VERSION CDR LOADER"
(DR6050
CDR MAIN
BOARD TEST
Display :
PASS OR FAIL
Display :
PASS OR FAIL
Display :
PASS OR FAIL
Display :
PASS OR FAIL
Display :
PASS OR FAIL
Display :
PASS OR FAIL
"SW VERSION CD LOADER"
"DTST1"
DRAM test (7702)
"DTST2"
FLASH CHECKSUM test (7702)
"DTST3"
FLASH ERASE test (7702)
"DTST4" *
CODEC test (7702)
"DTST5"
CDR LOADER
COMMUNICATION test
"DTST5"
*
CD LOADER
COMMUNICATION test
* FOR CDR500 ONLY
)
ABORT TEST
Press <F FWD>
ABORT TEST
Press <F FWD>
ABORT TEST
Press <F FWD>
ABORT TEST
Press <F FWD>
ABORT TEST
Press <F FWD>
ABORT TEST
Press <F FWD>
ABORT TEST
Press <F FWD>
LOADER TESTS
CDR LOADER TEST
CD-DA disc must be loaded
Display shows current disc time
Test OK?
YES
CD LOADER TEST *
CD-DA disc must be loaded
Display shows current disc time
Test OK?
YES
DISPLAY TEST
DISPLAY TEST
Display segments blink at f=1Hz
KEYBOARD &
RC TEST
KEYBOARD & RC TEST
Display shows name of pressed keys
Press <F FWD>
NO
Display :
or
or
* FOR CDR500 ONLY
NO
Display :
or
or
"BERR1"
"NO CDDA"
"NO DISC"
Press <F FWD>
"BERR2"
"NO CDDA"
"NO DISC"
Press <F FWD>
Tests OK?
YES
NO
Display :
n = failed test
Display next
failed test
To end test, switch OFF unit
"DERRn"
Figure 5-1
6
Page 9
5.1.1 Description
The intention of the electrical service diagnostics is to show the
software versions present in the player and to direct the dealer
towards defective internal units. The units are : the CDR main
board, the CDR loader, the CD loader in case of a CDR500 and
the keyboard/display board. A sequence of tests is executed
automatically. Some of the tests can be aborted or skipped
without the result being taken into account. External tools or
disassembly of the unit is not necessary to get the diagnostic
information. Pressing keys [PLAY/PAUSE] and [F FWD]
simultaneously while switching on the unit, starts the test.
Switching off the unit ends the test.
5.1.2 Requirements to perform the test
• Working keyboard to start up the test.
• Working local display to check the output messages.
• A CD-DA disc with a minimum of 3 tracks in all trays to
perform the disc test.
5.1.3 Description of the tests
Player information
In this part of the test the following important information can be
checked without removing the cover :
• Recorder ID.
• SW-version back end of player.
• SW-version CDR loader.
• SW-version CD loader (only for CDR500).
CDR main board test
As soon as the CDR main board tests are finished, all failure
messages (if any) will be displayed sequentially by pressing the
[F FWD] key. The message "DERRn" will be displayed with n
indicating the faulty test number.
If one of the tests is aborted with the [F FWD] key, no error
message will be displayed for this test. The flash data erase
test ("DTST3") can not be aborted !
The CDR main board test consists out of :
DRAM test
Display : "DTST1". The DRAM used for buffer management is
tested by writing, reading and verifying test patterns.
Flash checksum test
Display : "DTST2". This test checks the checksum of the
player's SW stored in the flash.
Flash data erase
Display : "DTST3". During this test, all temporary information
(CDtxt) in the flash is erased.
CODEC (ADC/DAC) test
Display : "DTST4". This test checks the CODEC IC by writing,
reading and verifying test patterns. The test is not applicable for
CDR950.
CDR communication test
Display : "DTST5". The communication between the host
processor (DASP) and the CDR loader via the DSA-R-bus is
tested.
CD communication test
Display : "DTST6"). The communication between the host
processor (DASP) and the CD loader is tested. The test is only
applicable for CDR500.
Loader tests
These tests determine if the CDR loader and the CD loader in
case of a CDR500 work correctly. A CD-DA disc with a
minimum of 3 tracks needs to be inserted in both loaders. A
disc test is executed to check focus control, disc motor control,
radial control and jump grooves control. The disc test is
performed by audio play-back of 5 seconds at the beginning,
middle and end of the disc.
CDR loader test
During the test, the current disc time is shown. In case of an
error the message "BERR1" will be displayed and the [F FWD]
key must be pressed to continue with the following test.
Pressing the [F FWD] key also aborts this test.
CD loader test
For CDR500 only. During the test, the current disc time is
shown. In case of an error the message "BERR2" will be
displayed and the [F FWD] key must be pressed to continue
with the following test. Pressing the [F FWD] key also aborts
this test.
Display test
All segments will blink at a frequency of 1 Hz. Pressing the [F
FWD] key will start the next test because the user has to check
for himself if all segments work properly.
Keyboard and remote control tests
The test will give the user the ability to test every key without
executing the function assigned to it. Therefore, the user needs
to press every key on the keyboard and the remote control. The
display will show the name of the key being pressed. Pressing
more than one key at once will give an unpredictable result
except for the service combinations : [PLAY/PAUSE] + [STOP],
[PLAY/PAUSE] + [ERASE] + [RECORD], [PLAY/PAUSE] +
[RECORD].
7
Page 10
5.2 Mechanical service diagnostics
MECHANICAL SERVICE DIAGNOSTICS
(test for defective components)
If power ON,
switch power OFF
Press <PLAY/PAUSE> + <STOP>
simultaneously and switch
To end test, switch OFF unit
ON unit
FOCUS TEST
Display shows
Visual inspection
SLEDGE TEST
Visual inspection
Display shows
“BUSY”
“BUSY”
<
OPEN
>
<
CLOSE
>
<FWD><REWIND>
TRAY TEST
Visual inspection
Display shows
even if tray is blocked
“OPENED”
5.2.1 Description
No external tools are required to perform this test. The cover
needs to be removed because the user has to check the
movements of the tray, focus and sledge visually. Pressing
keys [PLAY/PAUSE] and [STOP] simultaneously while
switching on the unit, starts the test. Switching off the unit ends
the test. In case of a CDR500, one can check the CD loader
mechanics in the same way by pressing the above key
combination on the CD player keys.
5.2.2 Requirements to perform the test
• Working keyboard to cycle through the tests and to start up
the test.
• Working local display to check the output messages.
5.2.3 Description of the tests
Focus control test
The focussing lens is continuously moving up and down. The
display reads "BUSY".
Sledge control test
After pressing [F FWD] the sledge continuously moves up and
down. Pressing [REWIND] stops the sledge at the position it is
in and the focus control test resumes. The display reads
"BUSY".
Figure 5-2
pressing [F FWD]. One has to stop these tests pressing
[REWIND] before it is possible to close the tray again.
Depending on the action the display reads "OPEN",
"OPENED", "CLOSE" or "BUSY".
Tray control test
This test starts from within the focus control test routine.
Pressing [OPEN/CLOSE] moves the tray in or out. In the tray
open position one can initiate focus and sledge tests by
8
Page 11
5.3 DC-erase service mode
DC ERASE SERVICE MODE
(erasement of complete CD-RW)
Load CD-RW disc
<ERASE> + <RECORD>
simultaneously and switch
Display shows:
“
ER mm:ss
Press
ON unit
”
mm
ss:remaining seconds
TOTAL
illuminated
To end test, switch OFF unit
:remaining minutes
and
REM
are also
Display shows:
“
when the erase function is
PASSED
completed
ERROR
“
if DC ERASE fails
Figure 5-3
”
”
5.3.1 Description
This test is initiated by pressing [ERASE] and [RECORD]
simultaneously while switching on the unit. The player will
erase a complete CD-RW disc (including PMA and ATIP lead
out area) at speed N=2. The display shows the countdown of
the remaining time required for the operation to complete. The
format is "ER mm:ss", where "mm" are the remaining minutes
and "ss" the remaining seconds. After completion the message
"PASSED" is shown, and the player has to be switched off and
on again to start up in normal operating mode. Switching off the
unit before completion of the test, leaves the disc in an
unpredictable state. In such case only a complete DC-erase
procedure can recover the CD-RW disc.
5.3.2 Requirements to perform the test
• Functional CDR player.
• A CD-RW audio disc must be present in the tray.
9
Page 12
6. Faultfinding Trees
NO DISC LOADED
SWITCH ON POWER
PRESS <DISPLAY>
DISPLAY?
YES
DISPLAY:
"INSERT DISC"
YES
CHECK:
• MAINS, MAINS CABLE
• POWER SUPPLY & TRAFO
⇒
WIRING
⇒
ON/OFF SWITCH
⇒
FUSES
⇒
NO
• DISPLAY (SEE FAULT FINDING GUIDE DISPLAY BOARD)
CHECK:
NO
• WIRING
• POWER SUPPLY VOLTAGES
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
VOLTAGES
⇒
WIRING
⇒
SUPPLY VOLTAGES
⇒
CLOCK SIGNAL 8MHz
⇒
CONTROL SIGNALS
⇒
KEYBOARD
⇒
STANDBY LED
⇒
ELECTRICAL SERVICE DIAGNOSTICS:
DISPLAY TEST, KEYBOARD TEST
"DERRn"
"BERRn"
ERROR OCCURS
PRESS
<OPEN/CLOSE>
TRAY?
YES
INSERT DISC
PRESS <OPEN/CLOSE>
CD-DA DISC
LOADED?
SEE CD-DA DISC
FAULT FINDING
CHECK:
• DISPLAY BOARD (SEE FAULT FINDING GUIDE DISPLAY BOARD)
⇒
NO
• MECHANICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF ERROR OCCURS
YESYES
SEE CD-R DISC
FAULT FINDING
WIRING
⇒
SUPPLY VOLTAGES
⇒
CLOCK SIGNAL 8MHz
⇒
CONTROL SIGNALS
⇒
KEYBOARD
⇒
ELECTRICAL SERVICE DIAGNOSTICS:
DISPLAY TEST, KEYBOARD TEST
SEE FAULTFINDING GUIDE AUDIO BOARD - ANALOG OUT PATH
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
"BERRn"
CHECK:
CONNECTION OF HEADPHONE
•
HEADPHONE BOARD
•
⇒
⇒
⇒
⇒
⇒
•
ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
"BERRn"
CHECK:
AUDIO CONNECTIONS & CABLES
•
AUDIO BOARD
•
⇒
⇒
⇒
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
"BERRn"
ERROR OCCURS
WIRE CONNECTION
+10V (pin 6. J903), -10V (pin 2. J903)
KILL VOLTAGE (pin 1. J903) : -8V DURING PLAY
KILL TRANSISTORS QN01 - QN02
PLAY SBC442 DISC (1kHz, -30dB) AND CHECK SIGNAL AT
Q901
ERROR OCCURS
FLEX & WIRE CONNECTIONS
+5V (pin 3. W853)
CHECK SINGNAL
-FOR COAXIAL OUT AT QT31,LT13
-FOR OPTICAL OUT AT QT31,JT21
ERROR OCCURS
"DERRn"
"DERRn"
"DERRn"
Figure 6-2
11
Page 14
CD-R DISC LOADED
DISC
DETECTION &
READING?
YES
DISPLAY:
“CD R”
&
OPC INFO?
YES
NO
NO
CHECK:
• WIRING
• POWER SUPPLY VOLTAGES
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
"BERRn"
DISPLAY:
“CD”
OR
T.O.C. INFO?
YES
ERROR OCCURS
“CD R”
&
NO
"DERRn"
CHECK:
• DISC: DIRT, SCRATCHES, DAMAGED...
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
"BERRn"
ERROR OCCURS
"DERRn"
CD-R DISC EMPTY
START MANUAL
RECORDING FROM
ANALOG SOURCE
ANALOG IN?
YES
LEVEL
ADJUSTABLE?
YES
FINALISED OR PARTIALLY
RECORDED CD-R DISC
LOADED :
SEE CD-DA DISC
FAULT FINDING
CHECK:
AUDIO CONNECTIONS & CABLES
•
AUDIO BOARD
•
⇒
+10V (QM01), -10V (QM02)
⇒
NO
CHECK SINGNAL
-FOR BALANCE IN AT Q326
-FOR UNBALANCE IN AT Q331
-FOR BALANCE & UNBALANCE IN AT Q332
-FOR OPTICAL IN AT J301
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
"BERRn"
CHECK:
AUDIO CONNECTIONS & CABLES
•
DISPLAY BOARD (SEE FAULT FINDING GUIDE DISPLAY BOARD)
•
NO
AUDIO
•
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
"BERRn"
ERROR OCCURS
⇒
EASY JOG KNOB
⇒
I2C COMMUNICATION
⇒
ELECTRICAL SERVICE DIAGNOSTICS:
KEYBOARD TEST
BOARD (SEE FAULT FINDING GUIDE I/O BOARD - ANALOG IN PATH)
ERROR OCCURS
"DERRn"
"DERRn"
DIGITAL IN?
OPTICAL IN?
YES
RECORDING
SUCCESSFUL?
YES
SET OK
CHECK:
AUDIO CONNECTIONS & CABLES
•
NO
AUDIO BOARD
•
⇒
⇒
⇒
FLEX AND WIRE CONNECTIONS
+5V (pin 3 conn. W853)
CHECK SINGNAL
-FOR XLR IN AT Q326
-FOR COAXIAL IN AT Q331
-FOR XLR & COAXIAL IN AT Q332
-FOR OPTICAL IN AT J301
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
"BERRn"
NO
CHECK:
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
"BERRn"
ERROR OCCURS
ERROR OCCURS
Figure 6-3
"DERRn"
"DERRn"
12
Page 15
CD-RW DISC LOADED
DISC
DETECTION &
READING?
YES
DISPLAY:
“CD RW”
OPC INFO?
YES
&
NO
NO
CHECK:
• WIRING
• POWER SUPPLY VOLTAGES
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
DISPLAY:
“CD”
OR
T.O.C. INFO?
YES
"BERRn"
ERROR OCCURS
“CD RW”
&
"DERRn"
CHECK:
NO
• DISC: DIRT, SCRATCHES, DAMAGED...
• ELECTRICAL SERVICE DIAGNOSTICS:
REPLACE CDR MODULE IF
OR
"BERRn"
ERROR OCCURS
"DERRn"
CD-RW DISC EMPTY
START ERASING OF LAST RECORDED TRACK
ERASING
SUCCESSFUL?
YES
SET OK
FINALISED OR PARTIALLY
RECORDED CD-RW DISC
NO
CHECK:
• ELECTRICAL SERVICE DIAGNOSTICS:
•
Figure 6-4
LOADED :
SEE CD-DA DISC
FAULT FINDING
REPLACE CDR MODULE IF
OR
"BERRn"
IF DISC CORRUPTED TRY DC ERASE
ERROR OCCURS
"DERRn"
13
Page 16
7. Faultfinding Guide
7.1 Display Board
7.1.1 Description of display board
General description
The display board has three major parts : the FTD (Fluorescent
Tube Display), the display controller TMP87CH74F and the
keyboard. The display controller is controlled by the DASP
master processor on the CDR main board. The communication
protocol used is I2C. So all the information between DASP and
display controller goes via the SDA or I2C DATA and SCL or
I2C CLK lines. Communication is always initiated by the DASP
on the CDR main board. Unlike the previous generations of
CDR players, the interrupt generated by the display controller
at key-press or reception of remote control is not used. Instead,
the DASP polls the display controller for these events.
BLOCK DIAGRAM
TMP87C874F
64 63 62 61 60 59 58 57 56 55254 53
I/O PORT8 (VFT)
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
I/O PORTD (VFT)I/O PORT9 (VFT)
VKK
I/O PORT0
3
1
DATA MEMORY
( RAM )
512X8 BIT
16 BIT
TIMER/COUNTER
8 BIT A/D
CONVERT.
79819
651516
I/O PORT7 (VFT)
PROGR MEMORY
( ROM )
8kX8 BIT
C P U
INTERRUPT
CONTROLLER
CLOCK/TIMING CONTROLLER
( I/O PORT2 )
VSS1
RESETN
XOUT
XIN
P22
P21
10
Display controller TMP87CH74F
TMP87CH74F (QY01) is a high speed and high performance
8-bit single chip microprocessor, containing 8-bit A/D
conversion inputs and a VFT (Vacuum Fluorescent Tube)
driver.
In this application, its functions are :
• slave microprocessor.
• FTD driver.
• generates the square wave for the filament voltage
required for an AC FTD.
• generates the grid and segment scanning for the FTD.
• generates the scanning grid for the key matrix.
• input for remote control.
All the communication runs via the serial bus interface I2C. The
display controller uses an 8Mhz resonator as clock driver.
52
I/O PORT6 (VFT)
PROGRAM
COUNTER
8 BIT
TIMER/COUNTER
I/O PORT1
TEST1
P20
INT0
INT1
13
14121117 1820 21 22
41
42434445464748495051
VDD
VAREF
VASS
I C
PORT3
SCL
23 244
I/O PORT5
I/O PORT4
2
SDA
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
SCK0
PIN DESCRIPTIONS
INT0external interrupt input 0
INT1external interrupt input 1
RESETNreset signal input, active low
SCLI2C-bus serial clock input/output
SDAI2C-bus serial data input/output
TESTtest pin, tied to low
VAREFanalog reference voltage input
VASSanalog reference ground
VDD+5V
VKKVFT driver power supply
VSSground
XIN, XOUTresonator connecting pins for high-frequency clock
Figure 7-1
14
Page 17
7.1.2 Test instructions
Supply voltages
The display board receives several voltages via connector
JY01.
• VFTD : -34V ±5% measured at pin 2 of conn. JY52.
• VDC1-VDC2 : 4V1 ±10% measured between pin 1 and 3 of
conn. JY52.
•+5V : + 5V ±5% measured at pin 10 of conn. JY52.
Voltages VFTD, VDC1 and VDC2 are produced in the Switching
Power Supply Board and sent to the display board via the CDR
main board. The +5V voltage is produced on the CDR main
board as D5V.
Clock signal
As clock driver for the display controller, a resonator of 8 Mhz
(XY01) is used. The signal can be measured at pins 8 and 9 of
the display controller : 8 Mhz ±5%.
Grid lines
Level and timing of all grid lines, G1-->G15, can be checked
either at the FTD itself or at the display controller. Grid lines
G13, G14 and G15 each have an extra current amplifier in line
: QY04 for G13, QY03 for G14 and QY02 for G15. A typical
grid line signal shows in the oscillogram below.
PM3392A
+4V
0V
Control signals
RESETN
The reset signal comes via pin 4 of conn. JY52 from the DASP
master processor on the CDR main board (SYS_RESET). The
reset is low active. It should be kept low during power up for at
least 3 machine cycles with supply voltage in operating range
and a stable clock signal (1 machine cycle = 12 x 1/Fc (8 Mhz)
sec.). During normal operation, the reset should be high (3V3).
The high signal is 3V3 because the DASP operates on 3V3.
I2C DATA/I2C CLK
These lines connect to the DASP master processor via
respectively pin 5 and pin 7 of conn. JY52. When there is
no communication, they should have the high level (+5V). The
oscillogram below gives an indication of how these signals
should look like.
PM3392A
+5V
I2C DATA
-34V
CH1!10.0 V= MTB1.00ms ch1+
Figure 7-3 “OSD”
Segment lines
Level and timing of all segment lines, P-->P21, can be
checked either at the FTD itself or atthe display controller.
The data on these segment lines however, depends on the
characters displayed. The oscillogram below shows a
segment line with data. A segment line without data
maintains a -30V level.
PM3392A
+5V
0V
0V
+5V
I2C CLK
0V
CH1!2.00 V=
CH2 2 V= MTB10.0ms ch1+
Figure 7-2 “I2C SIGNALS”
FTD drive lines
Filament voltage
Should measure 4.3V ±10% (=VDC1-VDC2) between pins 1-2
and pins 52-53 of FTD(VY01).
-34V
CH1!10.0 V= MTB1.00ms ch 1+
Figure 7-4 “SEGMENT LINE”
15
Page 18
Key matrix lines
The lines connected to pins 18, 19, 20, 34, 35, 36 and 37 of the
display controller act as matrix scanners. Without a key pressed,
they maintain a low level. As soon as a key is pressed, the
scanning line connected to that key puts out a scanning signal,
which should look like the oscillogram below. This scanning signal
goes via the pressed key to I/O port 7 of the display controller
(pins 28 to 33). The display controller can now determine which
key has been pressed. Without a key pressed, pins 28 to 33 of
the display controller maintain a high level (+5V).
PM3392
Pin1
Pin3
PM3392A
+5V
0V
CH1!2.00 V= MTB5.00ms ch1+
CL 96532121_031.eps
Figure 7-5 KEY MATRIX SCAN LINE
Easy jog knob
Rotary operation
The easy jog knob (SY26) incorporates a whole heap of user
control possibilities in just one knob. Without the knob being
operated, pin 1 and 3 of the knob (and thus pin 16 and 17 of the
display controller), maintain the +5V level. Turning the knob
clockwise briefly connects pin 1 to GND followed by pin 3.
141099
CH1 5.00 V=
CH2 5.00 V= M TB20.0ms- 1.92dv ch2-
CL 96532121_033.eps
141099
Figure 7-7 TURN ANTI-CLOCKWISE
The pulses created this way arrive at pin 16 and 17 of the
display controller. The first pulse to arrive tells the controller the
direction of the rotation. Counting the pulses reveals the
amount of rotation. Combining and decoding this information,
the display controller will execute the appropriate task.
Push button operation
This button connects to the key matrix lines and thus the
operation is identical to the ordinary keys. Without being
pressed, pin 4 of the easy jog maintains the low level, pin 5 the
high level. When pressed the scanning signal goes through the
closed contact of pins 4 and 5, and can be checked at both
pins.
IR receiver - remote control
In the CDR631 the IR receiver ZY01 is mounted on the IR board.
In all versions the IR receiver connects to the display controller.
The signal coming from the receiver can be checked at pin 22 of
the display controller. This signal is normally high (+5V).
When the remote control is being operated, pulses mixed in with
the +5V can be measured. The oscillogram gives an indication of
how the signal looks like with the RC being operated.
PM3392
Pin1
Pin3
CH1 5.00 V=
CH2 5.00 V= MTB20.0ms- 1.92dv ch2-
CL 96532121_032.eps
141099
Figure 7-6 TURN CLOCKWISE
Turning the knob anti-clockwise briefly connects pin 3 to GND
followed by pin 1.
+5V
0V
PM3392A
1
CH1!2.00 V= MTB20.0ms ch1+
CL 96532121_034.eps
Figure 7-8 IR RECEIVER SIGNAL
141099
16
Page 19
7.1.3 Display board troubleshooting guide
SWITCH POWER ON,
EXIT STAND BY
MODE
CHECK :
DISPLAY?
YES
KEY
FUNCTIONS?
YES
NO
NO
• SUPPLY VOLTAGES
⇒ -34V ±5% at conn. JY52-2
⇒ 4V3 ± 10% between conn. JY52-1 and JY52-3
⇒ +5V ± 5 % at conn. JY52-10
• CLOCK SIGNAL
⇒ 8Mhz at pins 8, 9 of QY01
• CONTROL SIGNALS
⇒ RESETN 3V3 (high) at conn.JY52-4 after start up
⇒ I2C DATA at conn. JY52-5
⇒ I2C CLK at conn. JY52-7
• FTD DRIVE LINES
⇒ Filament voltage 4V3 ± 10% between pins 1-2 and
pins 52-53 of the FTD (VY01)
⇒ Grid lines (see test instructions)
⇒ Segment lines (see test instructions)
• ELECTRICAL SERVICE DIAGNOSTICS - Local display test
CHECK:
• KEY MATRIX LINES (see test instructions)
• ELECTRICAL SERVICE DIAGNOSTICS – Keyboard test
• EASY JOG KNOB (see test instructions)
REMOTE
CONTROL?
YES
DISPLAY BOARD
OK
NO
CHECK:
• IR RECEIVER signal at pin 22 of QY01
• ELECTRICAL SERVICE DIAGNOSTICS – Remote control test
Figure 7-9
17
Page 20
7.2 Audio Board
Pin description
The Audio board for the CDR631 is a full high performance
AD/DA panel, acting as an interface to the outside world. Key
components are DS1807, ADC AK5351 and DAC AK4393.
7.2.1 Analog-in path
Description
The via BALANCE in connected anolog-in L and R signals are
pre-amplified by opamp Q761-Q763, and the via UNBALANCE
in connected anolog-in L and R signals are pre-amplified by
opamp Q705, Q706, these signals is selected by Analog SW
Q701 after which they are presented to an adjustable amplifier
made out of DS1807 and opamp Q703 - Q708. The level of the
incoming. Analog signal is adjusted by means of control lines
2
"I
C" coming from the DASP on the CDR main board and
switching the mux/demux. The anolog signal is then presented
to the A/D converter A5351 (QA01) where they are converted
from analog to I
via connector J601 and flex to the DASP on the CDR main
board. The ADC uses the CL11-clock (11.2896 MHz), coming
from the DASP on the CDR main board.
ADC AK5351
Description
The AK5351 is a stereo, 20-bit oversampling ADC based on
Sigma Delta technology intended primarily for digital audio
bandwith applications. It supports the I2S-bus data format. The
device can be used in either slave or master mode. In this
application it is used in slave mode receiving it's clock from the
DASP on the CDR main board.
2
S-bus data format. The I2S-bus is connected
No. Pin Name I/OPIN / FUNCTION
1AINR+
2AINR3VREF
4VAAnalog section Analog Power Supply, +5V
5AGNDAnalog section Analog Ground
6AlNL+
7AINL-
8TST1
10TST2
11TST3
14TST4
9HPFE
12VDDigital section Digital Power Supply pin, +5V
13DGNDDigital section Digital Ground pin
16PD
17MCLKIMaster Clock input pin
18SCLKI/O Serial Data Clock pin
19LRCKI/O L/R Channel Clock Select pin
20FSYNCI/O Frame Synchronization Signal pin
21SDATAOSerial Data Output pin
22CMODEIMaster Clock Selection pin
23SMODE1ISerial Interface Mode Select pin
15SMODE2IDefines the directions of LRCK, SCLK and FSYNC pins and
24VB
Right channel analog positive input pin
I
Right channel analog negative input pin
I
Voltage Reference output pin (VA-2.6V)
O
Normally connected to VA with a 0.1uF ceramic capacitor in
parallel with a 10uF electrolytic capacitor.
Left channel analog positive input pin
I
Left channel analog negative input pin
I
Test pin Should be left floating. (Pull- down pin)
Test pin Should be left floating. (Pull- down pin)
Test pin Should be left floating. (Pull- down pin)
Test pin Should be left floating. (Pull- down pin)
High Pass Filter Enable pin (Pull- up pin)
I
"H": ON
"H": OFF
Power Down pin
I
"L" brings the device into power-down mode. Must be done
once after power-on.
CMODE="H" : 384fs
CMODE="L" : 256fs
Data is clocked out at the falling edge of SCLK.
Slave mode: 64fs clock is input usually.
Master mode: SCLK outputs a 64fs clock.
SCLK stays low during the power-down mode(PD="L").
Slave mode: An fs clock is fed to this LRCK pin.
Master mode: LRCK output an fs clock.
LRCK goes "H" at SMODE2="L" and "L" at SMODE2="H"
during reset when SMODE1 "H".
S!ave mode: When "H", data bits are clocked out on SDATA.
2
S slave mode ignores FSYNC It should hold "L" or
As I
"H".
Master mode: FSYNC outputs 2fs clock.
Stay low during the power-down mode(PD="L") .
Data are output with MSB first, in 2's complement format.
After 20 bits are output it turns to "L". It also remains "L" at a
power- down mode(PD="L").
"L": MCLK=256fs
"H": MCLK=384fs
Output Data Format. SMODE2 is pull- down pin.
SMODE1 SMODE2 MODE LRCK
L L Slave mode: MSB justified : H/L
H L Master mode Similar to I
L H Slave mode: I
H H Master mode: I
Substrate Power Supply, +5V
SDASerial Data I/O
SCLSerial Clock Input
GNDDigital Ground
AGNDAnalog Ground
NCNo connection
Figure 7-14
19
Page 22
7.2.2 Analog-out path
A
Description
The I2S-bus data format being the digital output signal, goes
from the DASP on the CDR main board via flex and connector
J601 to the I/O board. Here it is presented to the D/A converter
AK4393. The DAC's analog outputs pass an amplification and filtering
circuit (opamp Q603, Q604). After the analog-out L and R signals are
sent to the headphone connector on the headphone board, analog out
UNBALANCE connectors on the AUDIO board. The DAC uses the
CL11-clock (11.2896 MHz), coming from the DASP on the CDR main
board.
DIF2DIF1DIF0
LRCK
BICK
SDAT
Audio Data
Interface
DAC AK4393
Description
The AK4393 is a high performance, single-chip stereo, audio
DAC delivering 101dB dynamic range sample rate.
Block diagram
DEM0DVDD
DEM1
De-emphasis
Control
AVDD
AVSSDVSS
BVSS
VCOM
PDN
SMUTE
DFS
De-emphasis
Soft Mute
De-emphasis
Soft Mute
8x
Interpolator
8x
Interpolator
Modulator
Modulator
Control RegisterClock Divider
CSN
CCLK
CDTI
P/S
MCLK CKS0
Figure 7-15
CKS1 CKS2 VREFH VREFL
∆Σ
∆Σ
SCF
SCF
AOUTL+
AOUTL-
AOUTR+
AOUTR-
20
Page 23
Pin configuration and description
No. Pin Name I/O Function
1
DVSS- Digital Ground Pin
2
DVDD- Digital Power Supply Pin, 3.3V or 5.0V
3
MCLKI Master Clock Input Pin
4
PDNI Power-Down Mode Pin
When at "L", the AK4393 is in power-down mode and is held in reset.
The AK4393 should always be reset upon power-up.
5
BICK I Audio Serial Data Clock Pin
The clock of 64fs or more than is recommended to be input on this pin.
6
SDATAI Audio Serial Data Input Pin
2’s complement MSB-first data is input on this pin.
7
LRCKI L/R Clock Pin
8
SMUTEI Soft Mute Pin in parallel mode
When this pin goes "H", soft mute cycle is initiated.
CSN I Chip Select Pin in serial mode
CDTII Control Data Input Pin in serial mode
12DIF0I Digital Input Format Pin
13DIF1I Digital Input Format Pin
14DIF2I Digital Input Format Pin
15BVSS- Substrate Ground Pin, 0V
16VREFLI Low Level Voltage Reference Input Pin
17VREFHI High Level Voltage Reference Input Pin
18AVDD- Analog Power Supply Pin, 5.0V
19AVSS- Analog Ground Pin, 0V
20 AOUTR- O Rch Negative analog output Pin
21 AOUTR+ O Rch Positive analog output Pin
22AOUTL-O Lch Negative analog output Pin
23AOUTL+ O Lch Positive analog output Pin
24VCOMO Common Voltage Output Pin, 2.6V
25P/SI Parallel/Serial Select Pin (Internal pull-up pin)
"L": Serial control mode, "H": Parallel control mode
26CKS0I Master Clock Select Pin
27CKS1I Master Clock Select Pin
28CKS2I Master Clock Select Pin
Note: All input pins except internal pull-up/down pins should not be left floating.
There is a cinch digital-in paths and an optical path taking the
digital signals pretty much straight to the DASP on the CDR
main board. The optical-out and the digital-out path take the
signal from the DASP on the CDR main board to their
respective output connectors on the I/O board.
7.3 Headphone board
The L and R analog signals coming from the analog output on
the I/O board pass an adjustable amplifier (opamp Q901) after
which they are passed on to the headphone connector. The
amplification is adjusted by means of a potentiometer
positioned at the front of the CDR player.
Figure 7-17
22
Page 25
7.4Power Supply Unit P816
7.4.1 Description of P816
MOSFET Q825 is used as a power switch controlled by the
controller Q810. When the switch is closed, energy is
transferred from mains to the transformer. This energy is
supplied to the load when the switch is opened. Through
control of the switch-on time, the energy transferred in each
cycle is regulated so that the output voltages are independent
of load or input voltage variations. The controlling device
MC44603 is an integrated pulse width modulator. A clock
signal initiates power pulses at a fixed frequency. The
termination of each output pulse occurs when a feedback
signal of the inductor current reaches a threshold set by the
error signal. In this way the error signal actually controls the
peak inductor current on cycle-by-cycle basis.
Figure 7-18 ‘Blockdiagram P816’
Description of controller MC44603
The MC44603 is an enhanced high performance controller that
is specifically designed for off-line and DC-to-DC converter
applications. This device has the unique ability of automatically
changing operating modes if the converter output is
overloaded, unloaded or shorted. The MC44603 has several
distinguishing features when compared to conventional SMPS
controllers. These features consist of a foldback facility for
overload protection, a standby mode when the converter output
is slightly loaded, a demagnetization detection for reduced
switching stresses on transistor and diodes, and a high current
totem pole output ideally suited for driving a power MOSFET. It
can also be used for driving a bipolar transistor in low power
converters. It is optimised to operate in discontinuous mode but
can also operate in continuous mode. Its advanced design
allows use in current mode or voltage mode control
applications.
Pin connections
Figure 7-19
Rref
R Frequency Standby
Voltage feedback Input
Error Amp Output
R Power Standby
Soft-Start/Dmax/
Voltage Mode
Sync Input
Overvoltage Protection (OVP)
Current Sense Input
Demag. Detection
Foldback Input
107
CT
89
6
5
11
12
Output
Gnd
VC
VCC
3
4
2
14
13
15
116
CL 96532076_030.eps
290799
ERROR
AMP
IREFSYNC
RF
STANDBY
RP
STANDBY
VOLTAGE
VREF
VSB
OUT
2.5V
FEEDBACK
E/A OUT
FOLDBACK
INPUT
FOLDBACK
=1
DMAX&
SOFT-START
CONTROL
SOFTSTART
&DMAXSENSEINPUT
CURRENT
OVER
VOLTAGE
MANAGEMENT
OVER
VOLTAGE
PROTECT
BUFFER
VREF VOCTHERMAL
SHUTDOWN
LATCH
Q
UVL01
IREF
SUUPLY
INITIZLIZATION BLOCK
REFERENCE
BLOCK
VREFIREF
(REDUCED FREQUENCY)
STANDBY
OSCILLATOR
DEMAGNETISATION
MANAGEMENT
DEMAGINETIZATION
DETECT
MC44603P
UVL01
L831
Q810
GND
+5V
+5V
GND
GND
GND
+12V
-8V
GND
GND
GND
+12V
+5V
1
2
3
4
6
11
75
13
14
12
15
10
9
8
16
U810
U811
SELECT
JUMPER
(-8V)
+12V
+12V
-12V
(-8V)
-12V
-12V/-8V
1
4
5
6
7
8
9
10
11
12
13
14
+4.1V
-34V
SWITCHING POWER SUPPLY PCB. (P816)
S1WB
4.7/50V
10k
22
100/25V
2SK2943
1k
1.5
10
µ
H
0.1
100
15
2200pF
180
0.1
2.2/50V
330
1500p
180k1k
15k 15k4700pF
470p
22k
6.8
µ
H
1
µ
H
10k
2SC
2SA
1k
10k
10k
10k
10
µ
H
PC123F
LM317
1.5
0.1
250V
0.22
250V
18k
1/2W
1.8k
1.8k
330
/16V
100/6.3V
2200
/10V
10/50V
220/50V
1000
/16V
2.2
µ
H
1k
220
/16V3.3k 100
1.8k
0.022
TL431100
7908
22k
22k
100/25
10k
PC123F
100/25
1k
AG01
RK46
AG01
RU4YX
AG01
10uH
0.1
2SC2878
820pF
82pF
NP0
82k
18k
AG01
AG01
24V
10uH
220
/16V
10k
0.1
10
220
560
0.1
4.7
µ
H
4.7
µ
H
220
/16V
100
/16V
100
/25V
120
/400V
18k
1/2W
0.01
0.1
470pF
/1kV
1
4.7k
330k
(UL/CSA,MITI)
1M(CB)
0.1
0.1
0.1
681
1%
2.21k
1%
10
µ
H
470pF
/400V
470pF
/400V
470pF
/400V
220/16V
100/10V
OPTION
OPTION
J820
J821
J801
L820
D802
C829
R829
R811
C833
D806
D807
Q825
L825
R825
R827
L832
C811
R812
R813
C813
R816
C814
C810
R809
C809
R807R806
R805 R804C804
C803
R802
L856
L861
R861
Q861
Q862
R862
R863
R864
R865
L862
D868
Q801
L831
Q851
R828
J851
S815
F820
C819
C820
R823
R815
R814
C856
J852
C852
C854
C857
C862
C864
C867
C868
L867
R866
C872
R881 R882
R883
C882
D881R887
Q871
D862
J828
R891
R892
C891
R893
Q892
C892
R894
D803
D804
D851
D856
D861
D866
D871
L866
L871
L873
C877
Q891
C802
C801
R801
R808
D814
D832
D829
L872
C873
R810
C855
R853
R852
R851
C860
L851
L853
C869
C875
C881
C821
R832
G815
J891
C898
C827
R826
R803
R819
C851
C861
C871
C866
R885
R884
R886
L854
L852
C825
C826
C828
C876
C859
R835
D835
23
Page 26
Pin function description
Pin NameDescription
1VCCThis pin is the positive supply of the IC. The operating voltage range after start-up is 9.0 to 14.5 V.
2VCThe output high state (VOH) is set by the voltage applied to this pin.
3Output
eak currents up to 750 mA can be sourced or sunk, suitable for driving either MOSFET or bipolar transistors.
P
4GndThe groundpin is a single return, typically connected back to the power source.
5Foldback InputThe foldback function provides overload protection.
6Overvoltage
Protection
7Current Sense
When the overvoltage protection pin receives a voltage greater than 2.5V, the device is disabled and requires a
complete restart sequence.
A voltage proportional to the current flowing into the power switch is connected to this input.
Input
8Demagnetisation
Detection
A voltage delivered by an auxiliary transformer winding provides to the demagnetisation pin an indication of the
magnetisation state of the flyback transformer. A zero voltage detection corresponds to complete core
saturation.
9Synchronisation
Input
The synchronisation input pin can be activated with either a negative pulse going from a level between 0.7V and
3.7V to Gnd or a positive pulse going from a level between 0.7V and 3.7V up to a level higher than 3.7V. The
oscillator runs free when Pin 9 is connected to Gnd.
10C
T
The normal mode oscillator frequency is programmed by the capacitor CT choice together with the Rref
resistance value. CT, connected between Pin 10 and Gnd, generates the oscillator sawtooth.
11Soft-
Start/Dmax/Volta
A capacitor, resistor or a voltage source connected to this pin limits the switching duty-cycle. This pin can be
used as a voltage mode control input. By connecting Pin 11 to Ground, the MC44603 can be shut down.
ge-Mode
12RP StandbyA voltage level applied to the RP Standby pin determines the output power level at which the oscillator will turn
into the reduced frequency mode of operation (i.e. standby mode). An internal hysteresis comparator allows to
return in the normal mode at a higher output power level.
13E/A OutThe error amplifier output is made available for loop compensation.
14Voltage
Feedback
This is the inverting input of the Error Amplifier. It can be connected to the switching power supply output
through an optical (or other) feedback loop.
15RF StandbyThe reduced frequency or standby frequency programming is made by the RF Standby resistance choice.
16Rref
Rref sets the internal reference current. The internal reference current ranges from 100
<
requires that 5.0kΩ Rref 25kΩ.
<
=
=
µ
A to 500µA. This
CL 96532076_031.eps
290799
Figure 7-20
24
Page 27
Block diagram of MC44603
16
VrefIref
DEMAGNETISATION
8
9
10
15
12
14
13
DETECT
SYNC INPUT
CT
RF STANDBY
RP STANDBY
VOLTAGE
FEEDBACK
E/A OUT
DEMAGNETISATION
MANAGEMENT
Iref
OSCILLATOR
Vstby
STANDBY
(REDUCED FREQUENCY)
2.5V
ERROR
AMP
FOLDBACK
FOLDBACK
INPUT
5711
VS8 OUT
VOSC PROT
CURRENT
SENSE
CURRENT SENSE
INPUT
VOSC
REFERENCE
BLOCK
=1
Operating description of MC44603
The input voltage Vcc (pin 1) is monitored by a comparator with
hysteresis, enabling the circuit at 14.5V and disabling the
circuit below 7.5V. The error amplifier compares a voltage Vfb
(pin 14) related to the output voltage of the power supply, with
an internal 2.5V reference. The current sense comparator
compares the output of the error amplifier with the switch
current Isense (pin 7) of the power supply. The output of the
current sense comparator resets a latch, which is set every
cycle by the oscillator. The output stage is a totem pole,
capable of driving a MOSFET directly.
Vref
enable
1Set
LATCH
1Reset
THERMAL
SHUTDOWN
Figure 7-21
SUPPLY
INITIALISATION BLOCK
C
Iref
Dmax &
SOFT-START
CONTROL
SOFT-START
& DMAX
14.5V
10V
Vcc
7.5V
p.a.v.
0V
UVL01
Vref
UVL01
BUFFER
Vref
OVER
VOLTAGE
MANAGEMENT
CL 96532076_032.eps
1
VC
2
OUT
3
GND
4
Voc
OVER
VOLTAGE
PROTECT
6
290799
Start up sequence of P816
t1: Charging the capacitors at Vcc
C829 will be charged via R823 and R832, C833 and
C811 v ia R829. The output is switched off during t1.
t2: Charging of output capacitors
When the input voltage of the IC exceeds 14.5V, the circuit is
enabled and starts to produce output pulses. The current
consumption of the circuit increases to about 17mA, depending
on the external loads of the IC. At first, the capacitors at the Vcc
pin will discharge because the primary auxiliary voltage,
coming from winding 7-9 is below the Vcc voltage. At some
moment during t2, the primary auxiliary voltage reaches the
same level as Vcc. This primary auxiliary voltage now
determines the Vcc voltage.
t3: Regulation
The output voltage of the power supply is in regulation.
t4: Overload
When the output is shorted, the supply voltage of the circuit will
decrease and after some time drop below the lower threshold
voltage. At that moment, the output will be disabled and the
process of charging the Vcc capacitors starts again. If the
output is still shorted at the next t2 phase, the complete startand stop sequence will repeat. The power supply goes in a
hiccup mode.
17mA
Icc
1mA
OUTPUT
short
Vo
0
t1
t2t3
CL 96532076_035.eps
Figure 7-22 ‘Start-up sequence’
Regulation of P816
Figure 7-22 shows the most relevant signals during the
regulation phase of the power supply.
The oscillator voltage ramps up and down between V1 and V2.
The voltage at the current sense terminal is compared every
cycle with the output of the error amplifier Vcomp. The output
t4
290799
25
Page 28
is switched off when the current sense level exceeds the level
at the output of the error amplifier.
TimeON phase : A drain current will flow from the positive
supply at pin 2 of the transformer through the transformer's
primary winding, the MOSFET and Rsense to ground. As the
positive voltage at pin 2 of the transformer is constant, the
current will increase linearly and create a ramp dependent on
the mains voltage and the inductance of the primary winding. A
certain amount of energy is stored in the transformer in the form
of a magnetic field. The polarity of the voltages at the
secondary windings is opposite to the primary winding so that
the diodes are non-conducting in this phase.
TimeDIODE phase : When the MOSFET is switched off,
energy is no longer supplied to the transformer. The inductance
of the tranformer now tries to maintain the current which has
been flowing through it at a constant level. The polarity of the
voltage from the transformer therefore reverses. This results in
a current flow through the transformer's secondary winding via
the now conducting diodes, electrolytic capacitors and the load.
This current is also ramp shaped but decreasing.
TimeDEAD phase : when the stored energy has been supplied
to the load, the current in the secondary windings stops flowing.
At this point, the drain voltage of the MOSFET will drop to the
voltage of C821 with a ringing caused by the drain-source
capacitance with the primary inductance.
The oscillator will start a next cycle which consists of the above
described three phases. The time of the different phases
depends on the mains voltage and the load.
TimeDEAD is maximum with an input of 400VDC and a
minimum load. It will be zero with an input of 100VDC and an
overload.
PM3394B
ch1
ch3
ch2
1
T
3
2
ch1 : Drain voltage
ch2 : Drain current
ch3 : Gate voltage
PM3394B
ch1
ch3
1
T
CH1 2
CH2
CH3 2 V~ ALT MTB5.00us- 0.90dv ch1-
CH1 1
CH3 50mV~ ALT MTB5.00us- 0.90dv ch1-
V2
Vosc
V1
0
Vcomp
Vsense
Vgate
Vdrain
Idrain
Idiodes
TonTdiode Tdead
CL 96532076_034.eps
290799
3
ch1 : Drain voltage
ch2 : Oscillator voltage
CH1 1
CH3 20mV~ ALT MTB5.00us- 0.90dv ch1-
ch1
ch3
PM3394B
1
T
3
ch1 : Drain voltage
ch3 : Sense voltage
CL 96532076_033.eps
290799
Figure 7-23 ‘Regulation’
Figure 7-24 ‘Oscillograms’
26
Page 29
Circuit description of P816
Input circuit
The input circuit consists of a lightning protection circuit and an
EMI filter.
The lightning protection comprises R819.
The EMI filter is formed by C820, L820, C825 and C826.
It prevents inflow of noise into the mains.
Primary rectifier/smoothing
The AC input is rectified by rectifier bridge D802 and smoothed
into C821. The voltage over C821 is approximately 300V.
It can vary from 100V to 390V.
Start up circuit and Vcc supply
This circuit is formed by R823, R834, C829, D828, R829,
R811, C833 and C811.
When the power plug is connected to the mains voltage, the
stabilised voltage over D829 (24V ) will charge C833 via
R829. When the voltage reaches 14.5V across C811, the
control circuit of Q810 is turned on and the regulation starts.
During regulation, Vcc of IC7110 will be supplied by the
rectified voltage from winding 7-9 via L832, D832 and C833.
Control circuit
The control circuit exists of Q810, C802, C804, C807, C809,
C810, R802, R803, R804, R807, R808, R809 and R810.
C802 and R810 define the frequency of the
oscillator.
Demagnetisation
The auxiliary winding (7-9) voltage is used to detect magnetic
saturation of the transformer core and connected via R801 to
pin 8 of Q810. During the demagnetisation phase, the output
will be disabled.
Overvoltage protection circuit
This circuit consist of D814, C814, R814, R815 and R816.
When the regulation circuit is interrupted due to an error in the
control loop, the regulated output voltage will increase
(overvoltage). This overvoltage is sensed at the auxiliary
winding 7-9.
When an overvoltage longer than 2.0 (s is detected, the output
is disabled until VCC is removed and then re-applied. The
power supply will come in a hiccup mode as long as the error
in the control loop is present.
Secondary rectifier/smoothing circuit
There are 5 rectifier/smoothing circuits on the secondary side.
Each voltage depends on the number of windings of the
transformer.
The -8V supply is regulated by voltage regulator Q871.
On/off circuit
Power switch circuit
This circuit comprises MOSFET Q825, Rsense R826, R827 and
R828, R825, C827, L825, R812 and R813. R825 is a
resistor to remove static charges from the gate of the
pull-down
MOSFET.
Regulation circuit
The regulation circuit comprises opto-coupler Q801 which
isolates the error signal from the control IC on the primary side
and a reference component D881. The TL431(D881) can be
represented by two components:
a very stable and accurate reference diode
a high gain amplifier
K
R
2.5V
A
CL 96532076_036.eps
Figure 7-25 ‘TL 431’
290799
TL431 will conduct from cathode to anode when the reference
is higher than the internal reference voltage of about 2.5V. If the
reference voltage is lower, the cathode current is almost zero.
The cathode current flows through the LED of the opto-coupler.
The collector current of the opto-coupler flows through R806,
producing an error voltage, connected to voltage feedback pin
14 of Q810.
27
Page 30
7.4.2 Troubleshooting P816
Check fuse F820 and
replace if necessary
OK
+5V, +12V, -8V, VFTD (-34V),VDC1-VDC2 (4V1)
Disconnect power supply unit from CDR main board
These voltages might be somewhat higher than specified
Turn input voltage up and check voltage across C821,
this voltage should be
ESCUTCHEON ARM L
123B 9965 000 07419 SPRING ESCUTCHEON ARM388K115010
130B CONTROL BOARD TRAY LID
RELEASE PISTON LEFT
131B CONTROL BOARD TRAY LID
RELEASE PISTON RIGHT
132B LOCK TRAY LID LEFT386K102010
133B LOCK TRAY LID RIGHT386K102020
135B STOPPER TRAY LID LOCK
COVER LEFT
136B STOPPER TRAY LID LOCK
COVER RIGHT
140B BLACKBUSHING REC LEVEL KNOB
BUSH BLACK
140B GRAY9965 000 07420 BUSHING REC LEVEL KNOB
BUSH GRAY
150B HOLDER FTD370K271110
001D BLACKLID TOP COVER BLACK292J257050
001D GRAYLID TOP COVER GRAY292J257150
003D BLACKBRACKET MOUNT L BLACK371K160040
003D GRAY9965 000 07421 BRACKET MOUNT L GRAY371K160060
005D BLACKBRACKET MOUNT R BLACK371K160050
005D GRAY9965 000 07422 BRACKET MOUNT R GRAY371K160070
011G 482246241771 LEG BLACK229K057010
037G 9965 000 07423 LINK POWER SW FRONT387K121020
038G 9965 000 07424 LINK POWER SW REAR387K121010
039G N1,U1SCREW SCREW FOR GND371K010020
043G N1,U1482253211527 T.L. WASHER OR
TOOTHED WASHER
284T154310
284T154050
387K271010
387K271020
386K127010
386K127020
386K114010
386K114020
387K259010
387K259110
54050400R0
001M MECHANISM CD-R MODULE
MAR770 SPICE 2.08+
J001 F996500001313 JACK 2P AC INLET M1910-HYJ04002440
J001 N19965 000 07428 JACK 3P AC INLET M1910-DYJ04002450
J001 U19965 000 07428 JACK 3P AC INLET M1910-DYJ04002450
2) On the occasion, be confirmed the common parts on
the parts list.
3) Refer to “Common Parts List” for the other common
parts (RI05, DD4, DK4).
➆
{
One-way type, Mylar ±10% 50V
Capacity value
NOTE ON SAFETY :
SymbolFire or electrical shock hazard. Only original
parts should be used to replaced any part marked with
symbol . Any other component substitution (other
than original type), may increase risk of fire or electrical
shock hazard.