This device is a 5-V low drop fixed-voltage regulator. The maximum input voltage is 42 V
(65 V, ≤ 400 ms). Up to an input voltage of 26 V and for an output current up to 650 mA
it regulates the output voltage within a 2% accuracy. The short circuit protection limits
the output current of more than 650 mA. The device incorporates overvoltage protection
and a temperature protection which turns off the device at high temperatures.
1) ESD susceptibility, Human Body Model (HBM) according to EIA/JESD 22-A114B
TypePackage
TLE 4270-2 GPG-TO263-5-1
TLE 4270-2 DPG-TO252-5-11
Data Sheet1Rev. 1.8, 2007-11-09
TLE 4270-2
PG-TO263-5-1
15
RO
GNDDQ
Ι
AEP01922
Figure 1Pin Configuration (top view)
Table 1Pin Definitions and Functions
PinSymbolFunction
PG-TO252-5
GND
15
ROΙDQ
AEP02580
1IInput; block to ground directly at the IC with a ceramic capacitor.
2ROReset Output; the open collector output is connected to the
5-V output via an integrated resistor of 30 kΩ.
3GNDGround; internally connected to heatsink.
4DReset Delay; connect a capacitor to ground for delay time adjustment.
5Q5-V Output; block to ground with 22 µF capacitor, ESR < 3 Ω.
Data Sheet2Rev. 1.8, 2007-11-09
TLE 4270-2
Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by
resistance adjustment, to a voltage that is proportional to the output voltage and drives
the base of a series transistor via a buffer. Saturation control as a function of the load
current prevents any over-saturation of the power element.
The IC also incorporates a number of internal circuits for protection against:
•Overload
•Overvoltage
•Overtemperature
•Reverse polarity
Application Description
The IC regulates an input voltage in the range of 5.5 V <
V
< 36 V to V
I
=5.0V. Up
Q,nom
to 26 V it produces a regulated output current of more than 650 mA. Above 26 V the
save-operating-area protection allows operation up to 36 V with a regulated output
current of more than 300 mA. Overvoltage protection limits operation at 42 V. The
overvoltage protection hysteresis restores operation if the input voltage has dropped
below 36 V. A reset signal is generated for an output voltage of
V
< 4.5 V. The delay for
Q
power-on reset can be set externally with a capacitor.
Data Sheet3Rev. 1.8, 2007-11-09
TLE 4270-2
1
I
Temperature
Adjustment
Sensor
Bandgap
Reference
Control
Amplifier
3
GND
Saturation
Control and
Protection
Circuit
Buffer
Reset
Generator
5
2
4
AEB01924
Q
RO
D
Figure 2Block Diagram
Data Sheet4Rev. 1.8, 2007-11-09
Table 2Absolute Maximum Ratings
T
= -40 to 150 °C
j
ParameterSymbolLimit ValuesUnitNotes
Min.Max.
Input I
TLE 4270-2
Voltage
Voltage
Current
Reset Output RO
Voltage
Current
Reset Delay D
Voltage
Current
Output Q
Voltage
Current
Ground GND
Current
Temperatures
Junction temperature
Storage temperature
V
V
I
I
V
I
RO
V
I
D
V
I
Q
I
GND
T
T
I
I
RO
D
Q
j
stg
-42
–
–
-0.3
–
-0.3
–
-1.0
–
42
65
–
7
–
7
–
16
–
V
V
–
V
–
V
–
V
–
-0.5–A–
–
-50
150
150
°C
°C
–
t ≤ 400 ms
internally limited
–
Internally limited
–
Internally limited
–
Internally limited
–
–
Table 3Operating Range
ParameterSymbolLimit ValuesUnitNotes
Min.Max.
Input voltageV
Junction temperature
T
I
j
642V–
-40150°C–
Thermal Resistance
Junction ambient
Junction caseR
1) Mounted on PCB, 80 × 80 × 1.5 mm3; 35µ Cu; 5µ Sn; Footprint only; zero airflow.
Data Sheet5Rev. 1.8, 2007-11-09
R
thj-a
thj-c
–6579K/W
K/W
–
TO263, TO252
1)
–3K/WTO-263 Packages
TLE 4270-2
Table 4Characteristics
V
= 13.5 V; -40 °C ≤ Tj ≤ 125 °C (unless otherwise specified)
I
ParameterSymbolLimit ValuesUnitTest Condition
Min.Typ.Max.
Output voltage
Output voltage
Output current
V
V
I
Qmax
limiting
Current
I
q
consumption
I
= II - I
q
Current
Q
I
q
consumption
I
= II - I
q
Current
Q
I
q
consumption
I
= II - I
q
Drop voltage
Q
V
Load regulation∆V
Q
Q
DR
Q,Lo
4.905.005.10V5 mA ≤ IQ ≤ 550 mA;
6 V ≤
V
≤ 26 V
I
4.905.005.10V26 V ≤ VI ≤ 36 V;
I
≤ 300 mA
Q
650850–mAVQ = 0 V
–11.5mAIQ = 5 mA
–5575mAIQ = 550 mA
–7090mAIQ = 550 mA; VI = 5 V
–350700mVIQ = 550 mA
1)
–2550mVIQ = 5 to 550 mA;
V
= 6 V
I
Line regulation∆
Power supply Ripple
rejection
V
Q,Li
–1225mVVI = 6 to 26 V
PSRR–54–dBf
I
= 5 mA
Q
= 100 Hz;
r
V
= 0.5 Vpp
r
Reset Generator
Switching threshold
Reset High voltage
Reset low voltage
Reset low voltage
Reset pull-up
V
V
V
V
R
RT
ROH
ROL
ROL
int
4.54.654.8V–
4.5––V–
–60–mVR
= 30 kΩ2);
int
1.0 V ≤
V
≤ 4.5 V
Q
–200400mVIR = 3 mA, VQ = 4.4 V
183046kΩinternally connected
to Q
Charge current
Data Sheet6Rev. 1.8, 2007-11-09
I
D,c
81425µAVD = 1.0 V
TLE 4270-2
Table 4Characteristics (cont’d)
V
= 13.5 V; -40 °C ≤ Tj ≤ 125 °C (unless otherwise specified)
I
ParameterSymbolLimit ValuesUnitTest Condition
Min.Typ.Max.
Upper reset timing
V
DU
1.41.82.3V–
threshold
Lower reset timing
V
DL
0.20.450.8VVQ < V
RT
threshold
Delay timet
Reset reaction time
rd
t
rr
–13–msCD = 100 nF
––3µsCD = 100 nF
Overvoltage Protection
Turn-Off voltage
1) Drop voltage = VI - VQ (measured when the output voltage has dropped 100 mV from the nominal value
obtained at 13.5 V input)
2) Reset peak is always lower than 1.0 V.
V
I, ov
424446V–
Data Sheet7Rev. 1.8, 2007-11-09
TLE 4270-2
I
I
V
I
Figure 3Test Circuit
I
I
1
Q
5
470 nF1000 µF
TLE4270-2
TLE 4270G
RO
2
4
D
I
D
V
D
C
D
3
GND
I
GND
Q
22 µF
I
R
V
Q
V
R
AES01925
Input
Reset
to µC
470 nF
15
I
TLE 4270
TLE4270-2
RO
2
3
Q
D
4
5 V - Output
22 µF
GND
100 nF
AES01926
Figure 4Application Circuit
Data Sheet8Rev. 1.8, 2007-11-09
TLE 4270-2
Design Notes for External Components
C
An input capacitor
circuit consisting of lead inductance and input capacitance can be damped by a resistor
of approx. 1 Ω in series with
the regulating circuit. Stability is guaranteed at values of
<3Ω.
Reset Circuitry
is necessary for compensation of line influences. The resonant
I
C
. An output capacitor CQ is necessary for the stability of
I
C
≥ 22 µF and an ESR of
Q
If the output voltage decreases below 4.5 V, an external capacitor
discharged by the reset generator. If the voltage on this capacitor drops below
C
on pin 4 (D) will be
D
V
DL
, a
reset signal is generated on pin 2 (RO), i.e. reset output is set low. If the output voltage
rises above the reset threshold,
power-on-reset time the voltage on the capacitor reaches
C
will be charged with constant current. After the
D
V
and the reset output will
DU
be set high again. The value of the power-on-reset time can be set within a wide range
depending of the capacitance of
C
.
D
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
C
which can be calculated as follows:
D
C
= (∆t × I
D
)/∆V(1)
D,c
Definitions:
•
C
= delay capacitors
D
•∆
t = reset delay time t
•I
•∆
V
= charge current, typical 14 µA
D,c
V = V
= upper reset timing threshold at CD for reset delay time
DU
, typical 1.8 V
DU
rd
t
= ∆V × CD/I
rd
D,c
The reset reaction time
t
is the time it takes the voltage regulator to set the reset out
rr
(2)
LOW after the output voltage has dropped below the reset threshold. It is typically 1 µs
for delay capacitor of 47 nF. For other values for
C
the reaction time can be estimated
D
using the following equation:
t
≈ 20 s/F ×C
rr
Data Sheet9Rev. 1.8, 2007-11-09
D
(3)
TLE 4270-2
V
I
<
t
rr
V
RT
V
Q
I
V
d
D, c
=
t
d
C
V
DU
V
D
V
DL
t
t
rd
V
RO
rr
D
Power-ON
ResetShutdown
Thermal
Voltage DropSecondary
at Input
Figure 5Reset Time Response
Undervoltage
Load
SpikeBounce
AES01927
Data Sheet10Rev. 1.8, 2007-11-09
TLE 4270-2
Output Voltage VQ versus
Temperature
5.2
V
V
Q
5.1
5.0
4.9
4.8
4.7
4.6
-4004080120 ˚C 160
T
j
V
= 13.5 V
I
AED01928
T
j
Output Voltage VQ versus
Input Voltage
12
V
V
Q
10
8
6
4
2
0
0
V
I
R
= 25
L
2
4
68
Ω
AED01929
10
V
V
Ι
Output Current IQ versus
Temperature
1200
mA
I
Q max
1000
800
600
400
200
0
-4004080120 ˚C 160
T
j
AED01930
T
j
Output Current IQ versus
Input Voltage
1.2
A
I
Q
1.0
0.8
0.6
0.4
0.2
0
010203040 V50
V
I
= 125 ˚C
T
j
25 ˚C
AED03038
V
I
Data Sheet11Rev. 1.8, 2007-11-09
TLE 4270-2
Current Consumption Iq versus
Output Current
3
mA
Ι
q
2
1
0
0
I
Q
AED03092
V
= 13.5 V
Ι
20406080120
mA
Ι
Current Consumption Iq versus
Output Current
80
mA
Ι
q
70
60
50
40
30
20
10
0
0
Q
I
Q
AED03093
V
= 13.5 V
Ι
100200300400600
mA
Ι
Q
Current Consumption Iq versus
Input Voltage
120
mA
I
q
100
80
60
40
20
0
010203040 V50
V
I
AED01934
R
= 10 Ω
L
20 Ω
R
=
L
50 Ω
Drop Voltage VDR versus
Output Current
800
mV
V
DR
700
600
500
T
400
300
200
100
0
0
V
I
= 125 ˚C
j
25 ˚C
200400
I
Q
AED01935
6001000
mA
I
Q
Data Sheet12Rev. 1.8, 2007-11-09
TLE 4270-2
Charge Current I
Temperature
20
µA
I
18
16
14
12
10
8
6
4
-40
T
j
I
04080
D,c
D, c
V
V
versus
= 13.5 V
I
= 1 V
D
AED03047
120160˚C
T
j
Upper Reset Timing Threshold VDU
versus Temperature
4.0
mA
V
DU
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
-40
04080120160
V
= 13.5 V
Ι
T
j
AED03094
V
DU
˚C
T
j
Data Sheet13Rev. 1.8, 2007-11-09
Package Outlines
0...0.3
1
±0.2
9.25±0.3
(15)
5 x 0.8
±0.1
10
±0.2
8.5
1)
A
1)
7.55
0...0.15
1.7
4 x
TLE 4270-2
4.4
±0.1
1.27
B
0.05
2.4
0.1
±0.3
±0.5
2.7
4.7
0.5
±0.1
BA0.25
8˚ MAX.
0.1 B
M
Typical
1)
Metal surface min. X = 7.25, Y = 6.9
All metal surfaces tin plated, except area of cut.
GPT09113
GPT09113
Figure 6PG-TO263-5-1 (Plastic Transistor Single Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
SMD = Surface Mounted Device
Dimensions in mm
Data Sheet14Rev. 1.8, 2007-11-09
TLE 4270-2
+0.15
6.5
5.7 MAX.
-0.2
±0.5
6.22
9.98
1)
±0.1
1
(4.24)
-0.05
(5)
A
±0.15
0.8
B
+0.20
0.9
-0.01
0...0.15
2.3
+0.05
-0.10
0.5
+0.08
-0.04
0.15 MAX.
per side
5 x 0.6
1.14
±0.1
0.51 MIN.
0.5
+0.08
-0.04
0.1
B
4.56
0.25MA
B
1) Includes mold flashes on each side.
All metal surfaces tin plated, except area of cut.
GPT09527
Figure 7PG-TO252-5-11 (Plastic Transistor Single Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
SMD = Surface Mounted Device
Dimensions in mm
Data Sheet15Rev. 1.8, 2007-11-09
TLE 4270-2
Revision History
Revision History
VersionDateChanges
Rev. 1.82007-11-09Page 1: Changed ESD specification from “>4000V”
to “±2kV HBM” according to PCN No. 2007-089
Rev. 1.72007-03-20Initial version of RoHS-compliant derivate of TLE 4270
Change of product name to TLE 4270-2 due to
modified chip layout and size.
Page 1: AEC certified statement added
Page 1 and Page 14: RoHS compliance statement and
Green product feature added
Page 1 and Page 14: Package changed to RoHS compliant
version
Legal Disclaimer updated
Data Sheet16Rev. 1.8, 2007-11-09
Edition 2007-11-09
Published by
Infineon Technologies AG
81726 Munich, Germany
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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