LINEAR TECHNOLOGY LT3011 Technical data

LT3011

50mA, 3V to 80V Low

Dropout Micropower Linear

Regulator with PWRGD

FEATURES

n

Wide Input Voltage Range: 3V to 80V

n

Low Quiescent Current: 46μA

n

Low Dropout Voltage: 300mV

n

Output Current: 50mA

n

PWRGD Flag with Programmable Delay

n

No Protection Diodes Needed

n

Adjustable Output from 1.24V to 60V

n

1μA Quiescent Current in Shutdown

n

Stable with 1μF Output Capacitor

n

Stable with Ceramic, Tantalum, and Aluminum

Capacitors

n

Reverse-Battery Protection

n

No Reverse Current Flow from Output to Input

n

Thermal Limiting

n

Thermally Enhanced 12-Lead MSOP and

10-Pin (3mm × 3mm) DFN Packages

APPLICATIONS

n

Low Current High Voltage Regulators

n

Regulator for Battery-Powered Systems

n

Telecom Applications

n

Automotive Applications

DESCRIPTION

The LT®3011 is a high voltage, micropower, low dropout
linear regulator. The device is capable of supplying 50mA of
output current with a dropout voltage of 300mV. Designed
for use in battery-powered high voltage systems, the low
quiescent current (46μA operating and 1μA in shutdown)
is well controlled in dropout, making the LT3011 an ideal
choice.

The LT3011 includes a PWRGD fl ag to indicate output
regulation. The delay between regulated output level and
fl ag indication is programmable with a single capacitor.
The LT3011 also has the ability to operate with very small
output capacitors; it is stable with only 1μF on the output.
Small ceramic capacitors can be used without the addition
of any series resistance (ESR) as is common with other
regulators. Internal protection circuitry includes reverse­battery protection, current limiting, thermal limiting, and
reverse current protection.

The LT3011 features an adjustable output with a 1.24V
reference voltage. The device is available in the thermally
enhanced 12-lead MSOP and the low profi le (0.75mm)
10-pin (3mm × 3mm) DFN package, both providing excel­lent thermal characteristics.

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.

TYPICAL APPLICATION

5V Supply with Shutdown

IN

V

IN

3V TO
80V

V

SHDN

<0.3V
>2.0V

1.6M

1μF

POWER GOOD

OUTPUT

OFF

ON

LT3011

SHDN

PWRGD

GND

C

OUT

ADJ

T

1000pF

750k

249k

1μF

V

OUT

5V
50mA

3011 TA01

350

300

250

200

150

100

DROPOUT VOLTAGE (mV)

50

0

0

Dropout Voltage

10 20 30 50

OUTPUT CURRENT (mA)

40

3011 TA02

3011f

1

LT3011

ABSOLUTE MAXIMUM RATINGS

IN Pin Voltage .........................................................±80V

OUT Pin Voltage ......................................................±60V

Input-to-Output Differential Voltage ........................±80V

ADJ Pin Voltage ........................................................±7V

SHDN Pin Voltage ...................................................±80V

Pin Voltage .................................................. 7V, –0.5V

C

T

PWRGD Pin Voltage ....................................... 80V, –0.5V

Output Short-Circuit Duration .......................... Indefi nite

PIN CONFIGURATION

TOP VIEW

10

OUT

1

ADJ

2

11

3

GND

4

NC

5

PWRG D

10-LEAD (3mm s 3mm) PLASTIC DFN

T

JMAX

EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB

DD PACKAGE

= 150°C, θJA = 43°C/W, θJC = 16°C/W

IN

NC

9

SHDN

8

7

NC

6

C

T

(Note 1)

Storage Temperature Range ................... –65°C to 150°C

Operating Junction Temperature
(Notes 3, 10, 11)

LT3011E, LT3011I .............................. –40°C to 125°C

LT3011H ............................................ –40°C to 150°C

Lead Temperature (Soldering, 10 sec)

MSE Package Only ............................................ 300°C

TOP VIEW

1

NC

2

OUT

3

ADJ

GND

NC

PWRG D

T

= 150°C, θJA = 40°C/W, θJC = 16°C/W

JMAX

EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB

13

4
5
6

MSE PACKAGE

12-LEAD PLASTIC MSOP

NC

12

IN

11

NC

10

SHDN

9

NC

8

C

7

T

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3011EDD#PBF LT3011EDD#TRPBF LDKQ

LT3011IDD#PBF LT3011IDD#TRPBF LDKQ

10-Lead (3mm × 3mm) Plastic DFN

10-Lead (3mm × 3mm) Plastic DFN

LT3011EMSE#PBF LT3011EMSE#TRPBF 3011 12-Lead Plastic MSOP –40°C to 125°C

LT3011HMSE#PBF LT3011HMSE#TRPBF 3011 12-Lead Plastic MSOP –40°C to 150°C

LT3011IMSE#PBF LT3011IMSE#TRPBF 3011 12-Lead Plastic MSOP –40°C to 125°C

LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3011EDD LT3011EDD#TR LDKQ

LT3011IDD LT3011IDD#TR LDKQ

10-Lead (3mm × 3mm) Plastic DFN

10-Lead (3mm × 3mm) Plastic DFN

LT3011EMSE LT3011EMSE#TR 3011 12-Lead Plastic MSOP –40°C to 125°C

LT3011HMSE LT3011HMSE#TR 3011 12-Lead Plastic MSOP –40°C to 150°C

LT3011IMSE LT3011IMSE#TR 3011 12-Lead Plastic MSOP –40°C to 125°C

Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
For more information on lead free part marking, go to:

For more information on tape and reel specifi cations, go to:

http://www.linear.com/leadfree/

http://www.linear.com/tapeandreel/

–40°C to 125°C

–40°C to 125°C

–40°C to 125°C

–40°C to 125°C

3011f

2

LT3011

ELECTRICAL CHARACTERISTICS

The l

denotes the specifi cations which apply over the –40°C to 125°C operating temperature range, otherwise specifi cations are TJ = 25°C.

(LT3011E, LT3011I)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Input Voltage I

ADJ Pin Voltage (Notes 2, 3) V

Line Regulation (Note 2)

Load Regulation (Note 2)

Dropout Voltage
V

= V

IN

OUT(NOMINAL)

(Notes 4, 5)

GND Pin Current
V

= V

IN

OUT(NOMINAL)

(Notes 4, 6)

Output Voltage Noise C

= 50mA

LOAD

= 3V, I

IN

4V < V

< 80V, 1mA < I

IN

ΔV

= 3V to 80V, I

IN

VIN = 4V, ΔI
V

= 4V, ΔI

IN

= 1mA

I

LOAD

I

= 1mA

LOAD

I

= 10mA

LOAD

I

= 10mA

LOAD

I

= 50mA

LOAD

I

= 50mA

LOAD

= 0mA

I

LOAD

I

= 1mA

LOAD

I

= 10mA

LOAD

I

= 50mA

LOAD

= 10μF, I

OUT

= 1mA

LOAD

LOAD

= 1mA to 50mA

LOAD

= 1mA to 50mA

LOAD

= 50mA, BW = 10Hz to 100kHz, V

LOAD

< 50mA

LOAD

= 1mA

= 1.24V 100 μV

OUT

l

l

l

l

l

l

l

l
l
l
l

1.228

1.215

2.8 4 V

1.24

1.24

1.252

1.265

112 mV

61525mV

100 150

190

200 260

350

300 370

550

46
105
410

1.9

90
200
700

3.3

RMS

ADJ Pin Bias Current (Note 7 ) 30 100 nA

Shutdown Threshold V

SHDN Pin Current (Note 8) V

Quiescent Current in Shutdown V

= Off to On

OUT

V

= On to Off

OUT

SHDN

V

SHDN

= 6V, V

IN

= 0V
= 6V

= 0V 1 5 μA

SHDN

PWRGD Trip Point % of Nominal Output Voltage, Output Rising

l
l

0.3

1.3

1.1

0.5

0.1

l

85 90 94 %

2V

2

0.5

PWRGD Trip Point Hysteresis % of Nominal Output Voltage 1.1 %

PWRGD Output Low Voltage I

C

Pin Charging Current

T

C

Pin Voltage Differential V

T

Ripple Rejection V

Current Limit V

Input Reverse Leakage Current V

Reverse Output Current (Note 9) V

= 50μA

PWRGD

CT(PWRGD High)

= 7V (Avg), V

IN

= 7V, V

IN

V

= 4V, ΔV

IN

= –80V, V

IN

= 1.24V, VIN < 1.24V (Note 2) 8 15 μA

OUT

– V

CT(PWRGD Low)

RIPPLE

= 0V

OUT

= –0.1V (Note 2)

OUT

= 0V

OUT

= 0.5V

P-P

, f

RIPPLE

= 120Hz, I

= 50mA 65 85 dB

LOAD

l

l

140 250 mV

36 μA

1.67 V

140 mA

l

60

l

6mA

V
V

mV

mV
mV

mV
mV

mV
mV

μA
μA
μA

mA

V

μA
μA

mA

ELECTRICAL CHARACTERISTICS

The l

denotes the specifi cations which apply over the –40°C to 150°C operating temperature range, otherwise specifi cations are TJ = 25°C.

(LT3011H)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Input Voltage I

ADJ Pin Voltage (Notes 2, 3) V

Line Regulation (Note 2)

Load Regulation (Note 2)

= 50mA

LOAD

= 3V, I

IN

4V < V

IN

ΔV

= 3V to 80V, I

IN

V

= 4V, ΔI

IN

V

= 4V, ΔI

IN

= 1mA

LOAD

< 80V, 1mA < I

LOAD

= 1mA to 50mA

LOAD

= 1mA to 50mA

LOAD

< 50mA

LOAD

= 1mA

l

1.228

l

1.215

l

2.8 4 V

1.24

1.24

1.252

1.265

112 mV

61525mV

l

3011f

3

V
V

mV

LT3011

ELECTRICAL CHARACTERISTICS

The l

denotes the specifi cations which apply over the –40°C to 150°C operating temperature range, otherwise specifi cations are at TJ = 25°C.

(LT3011H)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Dropout Voltage

= V

V

IN

OUT(NOMINAL)

(Notes 4, 5)

GND Pin Current
V

= V

IN

OUT(NOMINAL)

(Notes 4, 6)

Output Voltage Noise C

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

OUT

= 1mA
= 1mA

= 10mA
= 10mA

= 50mA
= 50mA

= 0mA
= 1mA
= 10mA
= 50mA

= 10μF, I

= 50mA, BW = 10Hz to 100kHz, V

LOAD

l

l

l

l
l
l
l

= 1.24V 100 μV

OUT

100 150

220

200 260

380

300 370

575

46
105
410

1.9

125
225
750

3.5

mV
mV

mV
mV

mV
mV

mA

RMS

ADJ Pin Bias Current (Note 7) 30 100 nA

Shutdown Threshold V

SHDN Pin Current (Note 8) V

Quiescent Current in Shutdown V

OUT

V

OUT

SHDN

V

SHDN

IN

= 6V, V

= Off to On
= On to Off

= 0V
= 6V

SHDN

= 0V 1 5 μA

PWRGD Trip Point % of Nominal Output Voltage, Output Rising

l
l

0.3

1.3

1.1

0.5

0.1

l

85 90 95 %

2V

2

0.5

PWRGD Trip Point Hysteresis % of Nominal Output Voltage 1.1 %

PWRGD Output Low Voltage I

C

Pin Charging Current

T

C

Pin Voltage Differential V

T

Ripple Rejection V

Current Limit V

Input Reverse Leakage Current V

Reverse Output Current (Note 9) V

= 50μA

PWRGD

CT(PWRGD High)

= 7V (Avg), V

IN

= 7V, V

IN

V

= 4V, ΔV

IN

= –80V, V

IN

= 1.24V, VIN < 1.24V (Note 2) 8 15 μA

OUT

– V

CT(PWRGD Low)

RIPPLE

= 0V

OUT

= –0.1V (Note 2)

OUT

= 0V

OUT

= 0.5V

P-P

, f

RIPPLE

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Note 2: The LT3011 is tested and specifi ed for these conditions with the
ADJ pin connected to the OUT pin.

Note 3: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specifi cation will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.

Note 4: To satisfy requirements for minimum input voltage, the LT3011
is tested and specifi ed for these conditions with an external resistor
divider (249k bottom, 409k top) for an output voltage of 3.3V. The external
resistor divider will add a 5μA DC load on the output.

Note 5: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specifi ed output current. In dropout, the
output voltage will be equal to (V

Note 6: GND pin current is tested with V

IN

– V

DROPOUT

= V

IN

).

OUT(NOMINAL)

and a current

source load. This means the device is tested while operating close to its

= 120Hz, I

= 50mA 65 85 dB

LOAD

dropout region. This is the worst-case GND pin current. The GND pin
current will decrease slightly at higher input voltages.

Note 7: ADJ pin bias current fl ows into the ADJ pin.
Note 8: SHDN pin current fl ows out of the SHDN pin.
Note 9: Reverse output current is tested with the IN pin grounded and the

OUT pin forced to the rated output voltage. This current fl ows into the OUT
pin and out the GND pin.

Note 10: The LT3011 regulators are tested and specifi ed under pulse
load conditions such that TJ ≅ TA. The LT3011E regulators are 100%
tested at T

= 25°C. Performance of the LT3011E over the full –40°C

A

to 125°C operating junction temperature range is assured by design,
characterization and correlation with statistical process controls. The
LT3011I regulators are guaranteed over the full –40°C to 125°C operating
junction temperature range. The LT3011H is tested to the LT3011H
Electrical Characteristics table at 150°C operating junction temperature.
High junction temperatures degrade operating lifetimes. Operating lifetime
is derated at junction temperatures greater than 125°C.

Note 11: This IC includes overtemperature protection that is intended to protect
the device during momentary overload conditions. Junction temperature will
exceed 125°C (LT3011E/LT3011I) or 150°C (LT3011H) when overtemperature
protection is active. Continuous operation above the specifi ed maximum
operating junction temperature may impair device reliability.

l

l

140 250 mV

36 μA

1.67 V

l

60

l

140 mA

mA

6mA

3011f

μA
μA
μA

V

μA
μA

4

LT3011

TYPICAL PERFORMANCE CHARACTERISTICS

TJ = 25°C, unless otherwise noted.

Dropout Voltage Guaranteed Dropout Voltage Dropout Voltage

400

350

300

250

200

150

100

DROPOUT VOLTAGE (mV)

50

0

TJ 125oC

TJ 25oC

10 204030 50

0

OUTPUT CURRENT (mA)

3011 G01

600

500

400

300

200

DROPOUT VOLTAGE (mV)

100

0

= TEST POINTS

TJb 125oC

TJb 25oC

10 20 30 40

OUTPUT CURRENT (mA)

505015253545

3011 G02

400

350

300

250

200

150

100

DROPOUT VOLTAGE (mV)

50

0

–50

Quiescent Current ADJ Pin Voltage Quiescent Current

80

VIN = 6V

= ∞

R

L

70

= 0

I

L

60

50

40

30

20

QUIESCENT CURRENT (μA)

10

0

–25 0 50

–50

V

SHDN

V

SHDN

25

TEMPERATURE (°C)

= V

IN

= GND

75 100 125 150

3011 G04

1.250
IL = 1mA

1.248

1.246

1.244

1.242

1.240

1.238

1.236

ADJ PIN VOLTAGE (V)

1.234

1.232

1.230

–50

–25

25 50 10075 125

0

TEMPERATURE (°C)

150

3011 G05

80

TJ = 25°C
R

70

L

60

50

40

30

20

QUIESCENT CURRENT (μA)

10

0

0

IL = 50mA

IL = 10mA

IL = 1mA

–25

=

19

25 50 10075 125

0

TEMPERATURE (°C)

150

3011 G03

d

V

= V

SHDN

IN

24

358610
INPUT VOLTAGE (V)

7

3011 G06

GND Pin Current GND Pin Current vs I

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

GND PIN CURRENT (mA)

0.4

0.2

0

0

TJ = 25°C
*FOR V

RL = 1.24k, IL = 1mA*

2143679510

INPUT VOLTAGE (V)

= 1.24V

OUT

RL = 24.8Ω

= 50mA*

I

L

RL = 124Ω

= 10mA*

I

L

RL = 49.6Ω

= 25mA*

I

L

8

3011 G07

2.0
VIN = V

1.8

1.6

1.4

1.2

1.0

0.8

0.6

GND PIN CURRENT (mA)

0.4

0.2

0

OUT(NOMINAL)

= 25°C

T

J

0

1052015 30 35 4525 50

OUTPUT CURRENT (mA)

+1V

OUT

SHDN Pin Threshold

1.6

1.4

1.2

1.0

0.8

0.6

0.4

SHDN PIN THRESHOLD (V)

0.2

0

–25 0 50

40

3011 G08

–50

25

TEMPERATURE (°C)

75 100 125 150

3011 G09

3011f

5

LT3011

TYPICAL PERFORMANCE CHARACTERISTICS

= 25°C, unless otherwise noted.

T

J

SHDN Pin Current SHDN Pin Current ADJ Pin Bias Current

0.28
TJ = 25°C

CURRENT FLOWS

0.24
OUT OF SHDN PIN

0.20

0.16

0.12

0.08

SHDN PIN CURRENT (μA)

0.04

0

12

0

1.5 2.5435

0.5 4.5

SHDN PIN VOLTAGE (V)

3.5

3011 G10

PWRGD Trip Point PWRGD Output Low Voltage C

95

94

93

92

91

–50

OUTPUT
FALLING

–25

90

89

88

87

86

PWRGD TRIP POINT (% OF OUTPUT VOLTAGE)

85

OUTPUT

RISING

25 50 10075 125

0

TEMPERATURE (°C)

150

3011 G13

0.6
V

= 0V

SHDN

CURRENT FLOWS
OUT OF SHDN PIN

0.5

0.4

0.3

0.2

SHDN PIN CURRENT (μA)

0.1

0

–50 0 50 75–25 25 100 150125

200

I

PWRGD

180

160

140

120

100

80

60

40

PWRGD OUTPUT LOW VOLTAGE (mV)

20

0

–50

–25

= 50μA

0

TEMPERATURE (°C)

25 50 10075 125

TEMPERATURE (°C)

3011 G11

3011 G14

150

120

100

80

60

40

ADJ PIN BIAS CURRENT (nA)

20

0

–50 0 50 75–25 25 100 150125

Charging Current

T

4.0
PWRGD TRIPPED HIGH

3.5

3.0

2.5

2.0

1.5

CHARGING CURRENT (μA)

1.0

T

C

0.5

0

–25 0 50

–50

TEMPERATURE (°C)

25

TEMPERATURE (°C)

75 100 125 150

3011 G12

3011 G15

CT Comparator Threshold Current Limit Current Limit

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

COMPARATOR THRESHOLD (V)

T

C

0.2

0

–50

–25

0

V

CT(HIGH)

V

CT(LOW)

25 50 10075 125

TEMPERATURE (°C)

150

3011 G16

180

V

= 0V

OUT

= 25°C

T

160

J

140

120

100

80

60

CURRENT LIMIT (mA)

40

20

0

24

07

358610

19

INPUT VOLTAGE (V)

3011 G17

200

180

160

140

120

100

CURRENT LIMIT (mA)

6

80

60

40

20

0

–50

VIN = 7V

= 0V

V

OUT

–25

25 50 10075 125

0

TEMPERATURE (°C)

150

3011 G18

3011f

LT3011

TYPICAL PERFORMANCE CHARACTERISTICS

TJ = 25°C, unless otherwise noted.

Reverse Output Current Reverse Output Current Input Ripple Rejection

160

140

120

100

REVERSE OUTPUT CURRENT (μA)

ADJ PIN CLAMP

(SEE APPLICATIONS

INFORMATION)

80

60

40

20

0

24

07

358610

19

OUTPUT VOLTAGE (V)

TJ = 25°C

= 0V

V

IN

CURRENT FLOWS
INTO OUTPUT PIN

= V

V

OUT

ADJ

3011 G19

80

VIN = 0V

= V

V

OUT

70

60

50

40

30

20

REVERSE OUTPUT CURRENT (μA)

10

0

–50

= 1.24V

ADJ

–25 0 50

25

TEMPERATURE (°C)

75 100 125 150

3011 G20

90

88

86

84

82

80

78

76

RIPPLE REJECTION (dB)

74

72

70

–50

Input Ripple Rejection Minimum Input Voltage Load Regulation

100

VIN = 7V + 50mV

90

= 50mA, V

I

L

80

70

60

50

40

30

RIPPLE REJECTION (dB)

20

10

0

10 100 100k 1M

RIPPLE

RMS

= 1.24V

OUT

1k 10k

FREQUENCY (Hz)

C

OUT

CERAMIC

C

= 1μF

OUT

CERAMIC

= 10μF

3011 G22

4.0
IL = 50mA

3.5

3.0

2.5

2.0

1.5

1.0

MINIMUM INPUT VOLTAGE (V)

0.5

0

–25 0 50

–50

25

TEMPERATURE (°C)

75 100 125 150

3011 G23

0

–2

–4

–6

–8

LOAD REGULATION (mV)

–10

–12

–50 0 50 75–25 25 100 150125

VIN = 7V + 0.5V

= 50mA

I

L

V

OUT

–25

ΔIL = 1mA TO 50mA
V

OUT

P-P

= 1.24V

25 50 10075 125

0

TEMPERATURE (°C)

= 1.24V

TEMPERATURE (°C)

RIPPLE AT f = 120Hz

150

3011 G21

3011 G24

Output Noise Spectral Density Output Noise (10Hz to 100kHz) Transient Response

10

V

= 1.24V

OUT

= 1μF

C

OUT

= 50mA

I

L

1

0.1

DENSITY (μV/ Hz)

0.01

OUTPUT NOISE SPECTRAL

0.001
10

FREQUENCY (Hz)

1k 10k100 100k

3011 G25

V

OUT

100μV/DIV

V

= 1.24V

OUT

= 1μF

C

OUT

= 50mA

I

L

WORST-CASE NOISE

1ms/DIV

3011 G26

0.3

0.2

0.1

0

DEVIATION (V)

OUTPUT VOLTAGE

–0.1

–0.2

50

25

LOAD

0

CURRENT (mA)

200 400

0 700

100 900

VIN = 6V
V
C
C
ΔI

300 500

TIME (μs)

SET FOR 5V

OUT

= 1μF CERAMIC

IN

= 1μF CERAMIC

OUT

= 1mA TO 50mA

LOAD

600 1000

800

3011 G27

3011f

7

LT3011

PIN FUNCTIONS

OUT (Pin 1/Pin 2): Output. The output supplies power to
the load. A minimum output capacitor of 1μF is required
to prevent oscillations. Larger capacitors will be required
for applications with large transient loads to limit peak
voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.

ADJ (Pin 2/Pin 3): Adjust. This is the input to the error
amplifi er. This pin is internally clamped to ±7V. It has a
bias current of 30nA which fl ows into the pin (see the
curve labeled ADJ Pin Bias Current vs Temperature in the
Typical Performance Characteristics section). The ADJ
pin voltage is 1.24V referenced to ground, and the output
voltage range is 1.24V to 60V.

GND (Pins 3, 11/Pins 4, 13): Ground. The exposed back­side of the package (Pin 11/Pin 13) is an electrical connec­tion for GND. As such, to ensure optimum device opera­tion and thermal performance, the Exposed Pad must be
connected directly to Pin 3/Pin 4 on the PC board.

NC (Pins 4, 7, 9/Pins 1, 5, 8, 10, 12): No Connection.
These pins have no internal connection. Connecting NC
pins to a copper area for heat dissipation provides a small
improvement in thermal performance.

PWRGD (Pin 5/Pin 6): Power Good. The PWRGD fl ag is
an open-collector fl ag to indicate that the output voltage
has increased above 90% of the nominal output voltage.
There is no internal pull-up on this pin; a pull-up resistor
must be used. The PWRGD pin will change state from an
open-collector pull-down to high impedance after both
the output is above 90% of the nominal voltage and the
capacitor on the C
ferential. The maximum pull-down current of the PWRGD
pin in the low state is 50μA.

pin has charged through a 1.67V dif-

T

(DFN/MSOP)

(Pin 6/Pin 7): Timing Capacitor. The CT pin allows the

C

T

use of a small capacitor to delay the timing between the
point where the output crosses the PWRGD threshold and
the PWRGD fl ag changes to a high impedance state. Cur­rent out of this pin during the charging phase is 3μA. The
voltage difference between the PWRGD low and PWRGD
high states is 1.67V (see the Applications Information
section).

SHDN (Pin 8/Pin 9): Shutdown. The SHDN pin is used
to put the LT3011 into a low power shutdown state. The
output will be off when the SHDN pin is pulled low. The
SHDN pin can be driven either by 5V logic or open-collector
logic with a pull-up resistor. The pull-up resistor is only
required to supply the pull-up current of the open-collec­tor gate, normally several microamperes. If unused, the
SHDN pin must be tied to a logic high or V

IN (Pin 10/Pin 11): Input. Power is supplied to the device
through the IN pin. A bypass capacitor is required on this
pin if the device is more than six inches away from the
main input fi lter capacitor. In general, the output imped­ance of a battery rises with frequency, so it is advisable to
include a bypass capacitor in battery-powered circuits. A
bypass capacitor in the range of 1μF to 10μF is suffi cient.
The LT3011 is designed to withstand reverse voltages
on the IN pin with respect to ground and the OUT pin. In
the case of a reverse input voltage, which can occur if a
battery is plugged in backwards, the LT3011 will act as if
there is a diode in series with its input. There will be no
reverse current fl ow into the LT3011 and no reverse volt­age will appear at the load. The device will protect both
itself and the load.

Exposed Pad (Pin 11/Pin 13): Ground. The Exposed Pad
must be soldered to the PCB.

IN

.

8

3011f

APPLICATIONS INFORMATION

LT3011

The LT3011 is a 50mA high voltage/low dropout regulator
with micropower quiescent current and shutdown. The
device is capable of supplying 50mA at a dropout voltage of
300mV. The low operating quiescent current (46μA) drops
to 1μA in shutdown. In addition to low quiescent current,
the LT3011 incorporates several protection features which
make it ideal for use in battery-powered systems. The
device is protected against both reverse input and reverse
output voltages. In battery backup applications where the
output can be held up by a backup battery when the input
is pulled to ground, the LT3011 acts like it has a diode in
series with its output and prevents reverse current fl ow.

Adjustable Operation

The LT3011 has an output voltage range of 1.24V to 60V. The
output voltage is set by the ratio of two external resistors as
shown in Figure 1. The device servos the output to maintain
the voltage at the adjust pin at 1.24V referenced to ground.
The current in R1 is then equal to 1.24V/R1 and the current
in R2 is the current in R1 plus the ADJ pin bias current.
The ADJ pin bias current, 30nA at 25°C, fl ows through
R2 into the ADJ pin. The output voltage can be calculated
using the formula in Figure 1. The value of R1 should be
less than 250k to minimize errors in the output voltage
caused by the ADJ pin bias current. Note that in shutdown
the output is turned off and the divider current will be zero.
The adjustable device is tested and specifi ed with the
ADJ pin tied to the OUT pin and a 5μA DC load (unless
otherwise specifi ed) for an output voltage of 1.24V. Speci-

fi cations for output voltages greater than 1.24V will be
proportional to the ratio of the desired output voltage to

1.24V; (V

/1.24V). For example, load regulation for an

OUT

output current change of 1mA to 50mA is –6mV (typical)
at V

= 1.24V. At V

OUT

12

V

124

V

.

658

mV mV

•– –=

= 12V, load regulation is:

OUT

Output Capacitance and Transient Response

The LT3011 is designed to be stable with a wide range
of output capacitors. The ESR of the output capacitor
affects stability, most notably with small capacitors. A
minimum output capacitor of 1μF with an ESR of 3Ω or
less is recommended to prevent oscillations. The LT3011
is a micropower device and output transient response
will be a function of output capacitance. Larger values
of output capacitance decrease the peak deviations and
provide improved transient response for larger load current
changes. Bypass capacitors, used to decouple individual
components powered by the LT3011, will increase the
effective output capacitor value.

Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common
dielectrics used are specifi ed with EIA temperature char­acteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances

ADJ

R2

+ (I

)(R2)1 +

ADJ

R1

= V

V

OUT

V

= 1.24V

ADJ

= 30nA AT 25oC

I

ADJ

OUTPUT RANGE = 1.24V TO 60V

IN

V

IN

Figure 1. Adjustable Operation

OUT

LT3011

ADJ

GND

V

+

R2

R1

OUT

3011 F01

3011f

9

LT3011

APPLICATIONS INFORMATION

in a small package, but they tend to have strong voltage
and temperature coeffi cients, as shown in Figures 2 and 3.
When used with a 5V regulator, a 16V 10μF Y5V capacitor
can exhibit an effective value as low as 1μF to 2μF for the
DC bias voltage applied and over the operating tempera­ture range. The X5R and X7R dielectrics result in more
stable characteristics and are more suitable for use as the
output capacitor. The X7R type has better stability across
temperature, while the X5R is less expensive and is avail­able in higher values. Care still must be exercised when
using X5R and X7R capacitors; the X5R and X7R codes
only specify operating temperature range and maximum
capacitance change over temperature. Capacitance change
due to DC bias with X5R and X7R capacitors is better than
Y5V and Z5U capacitors, but can still be signifi cant enough
to drop capacitor values below appropriate levels. Capaci­tor DC bias characteristics tend to improve as component
case size increases, but expected capacitance at operating
voltage should be verifi ed.

Voltage and temperature coeffi cients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress, simi­lar to the way piezoelectric accelerometer or microphone
works. For a ceramic capacitor, the stress can be induced
by vibrations in the system or thermal transients.

PWRGD Flag and Timing Capacitor Delay

The PWRGD fl ag is used to indicate that the ADJ pin volt­age is within 10% of the regulated voltage. The PWRGD
pin is an open-collector output, capable of sinking 50μA
of current when the ADJ pin voltage is low. There is no
internal pull-up on the PWRGD pin; an external pull-up
resistor must be used. When the ADJ pin rises to within
10% of its fi nal reference value, a delay timer is started.
At the end of this delay, programmed by the value of the
capacitor on the C

pin, the PWRGD pin switches to a high

T

impedance and is pulled up to a logic level by an external
pull-up resistor.

To calculate the capacitor value on the C

pin, use the

T

following formula:

It

•

C

TIME

=

CT DELAY

VV

CT HIGH CT L OW

() ()

−

Figure 4 shows a block diagram of the PWRGD circuit. At
start-up, the timing capacitor is discharged and the PWRGD
pin will be held low. As the output voltage increases and
the ADJ pin crosses the 90% threshold, the JK fl ipfl op is
reset, and the 3μA current source begins to charge the
timing capacitor. Once the voltage on the CT pin reaches
the V

CT(HIGH)

threshold (approximately 1.7V at 25°C), the
capacitor voltage is clamped and the PWRGD pin is set to
a high impedance state.

20

0

–20

–40

–60

CHANGE IN VALUE (%)

–80

–100

0

26

Figure 2. Ceramic Capacitor DC Bias Characteristics Figure 3. Ceramic Capacitor Temperature Characteristics

BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10MF

X5R

Y5V

4

8

DC BIAS VOLTAGE (V)

10

14

12

16

3011 F02

40

20

0

–20

–40

–60

CHANGE IN VALUE (%)

–80

BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10MF

–100

–50

–25 0

X5R

Y5V

50 100 125

25 75

TEMPERATURE (oC)

10

3011 F03

3011f

APPLICATIONS INFORMATION

LT3011

During normal operation, an internal glitch fi lter will ignore
short transients (<15μs). Longer transients below the 90%
threshold will reset the JK fl ip-fl op. This fl ip-fl op ensures
that the capacitor on the C
the way to the V

CT(LOW)

pin is quickly discharged all

T

threshold before restarting the
time delay. This provides a consistent time delay after the
ADJ pin is within 10% of the regulated voltage before the
PWRGD pin switches to high impedance.

Thermal Considerations

The power handling capability of the device will be limited by
the maximum rated junction temperature (125°C, LT3011E/
LT3011I or 150°C, LT3011H). The power dissipated by the
device will be made up of two components:

1. Output current multiplied by the input/output voltage

differential: I

• (VIN – V

OUT

OUT

) and,

2. GND pin current multiplied by the input voltage:

• V

I

GND

IN

The GND pin current is found by examining the GND pin
current curves in the Typical Performance Characteristics
section. Power dissipation will be equal to the sum of the
two components listed above.

The LT3011 series regulators have internal thermal limiting
designed to protect the device during overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 125°C (LT3011E/ LT3011I) or 150°C
(LT3011H) must not be exceeded. It is important to give
careful consideration to all sources of thermal resistance
from junction to ambient. Additional heat sources mounted
nearby must also be considered.

3μA

I

CT

ADJ

V

REF

• 90%

C

T

+

QJ

–

K

V

CT(HIGH)

– V
(z1.1V)

PWRGD

BE

For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener­ated by power devices.

The following table lists thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.

Table 1. MSOP Measured Thermal Resistance

COPPER AREA

BOARD AREA

2500 sq mm 2500 sq mm 2500 sq mm 52°C/W

1000 sq mm 2500 sq mm 2500 sq mm 54°C/W

225 sq mm 2500 sq mm 2500 sq mm 58°C/W

100 sq mm 2500 sq mm 2500 sq mm 64°C/W

Table 2. DFN Measured Thermal Resistance

COPPER AREA

BOARD AREA

2500 sq mm 2500 sq mm 2500 sq mm 52°C/W

1000 sq mm 2500 sq mm 2500 sq mm 54°C/W

225 sq mm 2500 sq mm 2500 sq mm 58°C/W

100 sq mm 2500 sq mm 2500 sq mm 64°C/W

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)TOPSIDE BACKSIDE

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)TOPSIDE BACKSIDE

The thermal resistance junction-to-case (θJC), measured
at the Exposed Pad on the back of the die, is 16°C/W.
Continuous operation at large input/output voltage dif­ferentials and maximum load current is not practical due
to thermal limitations. Transient operation at high input/
output differentials is possible. The approximate thermal
time-constant for a 2500sq mm 3/32" FR-4 board, with
maximum topside and backside area for one ounce cop­per, is three seconds. This time-constant will increase as
more thermal mass is added (i.e., vias, larger board and
other components).

–

+

V

CT(LOW)

z0.1V

Figure 4. PWRGD Circuit Block Diagram

3011 F04

For an application with transient high power peaks, average
power dissipation can be used for junction temperature
calculations as long as the pulse period is signifi cantly less
than the thermal time constant of the device and board.

3011f

11

LT3011

APPLICATIONS INFORMATION

Calculating Junction Temperature

Example 1: Given an output voltage of 5V, an input volt­age range of 24V to 30V, an output current range of 0mA
to 50mA, and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?

The power dissipated by the device will be equal to:

I

OUT(MAX)

• (V

IN(MAX)

– V

OUT

) + (I

GND

• V

IN(MAX)

)

Where:

at (I

= 50mA

= 30V

= 50mA, VIN = 30V) = 1mA

OUT

I

OUT(MAX)

V

IN(MAX)

I

GND

So:

P = 50mA • (30V – 5V) + (1mA • 30V) = 1.28W

The thermal resistance will be in the range of 52°C/W to
64°C/W depending on the copper area. So, the junction
temperature rise above ambient will be approximately
equal to:

1.28W • 58°C/W = 74°C

The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:

T

= 50°C + 74°C = 124°C

JMAX

Operation at the different power levels is as follows:

76% operation at P1, 19% for P2, 4% for P3,
and 1% for P4.

P

= 76%(0.23W) + 19%(2.20W) + 4%(0.35W)

EFF

+ 1%(3.42W) = 0.64W

With a thermal resistance in the range of 52°C/W to 64°C/W,
this translates to a junction temperature rise above ambi­ent of 33°C to 41°C.

High Temperature Operation

Care must be taken when designing LT3011 applications to
operate at high ambient temperatures. The LT3011 works
at elevated temperatures but erratic operation can occur
due to unforeseen variations in external components. Some
tantalum capacitors are available for high temperature
operation, but ESR is often several ohms; capacitor ESR
above 3Ω is unsuitable for use with the LT3011. Ceramic
capacitor manufacturers (Murata, AVX, TDK and Vishay
Vitramon at this writing) now offer ceramic capacitors that
are rated to 150°C using an X8R dielectric. Device instability
will occur if the output capacitor value and ESR are outside
design limits at elevated temperature and operating DC
voltage bias (see information on capacitor characteristics
under Output Capacitance and Transient Response). Check
each passive component for absolute value and voltage
ratings over the operating temperature range.

Example 2: Given an output voltage of 5V, an input voltage
of 48V that rises to 72V for 5ms (max) out of every 100ms,
and a 5mA load that steps to 50mA for 50ms out of every
250ms, what is the junction temperature rise above ambi­ent? Using a 500ms period (well under the time-constant
of the board), power dissipation is as follow:

P1 (48V

, 5mA load) = 5mA • (48V – 5V)

IN

+ (200μA • 48V) = 0.23W

P2 (48V

, 50mA load) = 50mA • (48V – 5V)

IN

+ (1mA • 48V) = 2.20W

P3 (72V

, 5mA load) = 5mA (72V – 5V)

IN

+ (200μA • 72V) = 0.35W

P1 (72V

, 50mA load) = 50mA (72V – 5V)

IN

+ (1mA • 72V) = 3.42W

12

Leakage in capacitors, or from solder fl ux left after insuf­fi cient board cleaning, adversely affects the low quies­cent current operation. Consider junction temperature
increase due to power dissipation in both the junction
and nearby components to ensure maximum specifi ca­tions are not violated for the LT3011E/LT3011H/LT3011I
or external components.

Protection Features

The LT3011 incorporates several protection features which
make it ideal for use in battery-powered circuits. In ad­dition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal
limiting, the device is protected against reverse-input
voltages, and reverse voltages from output-to-input.

3011f

APPLICATIONS INFORMATION

LT3011

Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera­tion, the junction temperature should not exceed 125°C
(LT3011E/LT3011I) or 150°C (LT3011H).

The input of the device will withstand reverse voltages
of 80V. Current fl ow into the device will be limited to less
than 6mA (typically less than 100μA) and no negative
voltage will appear at the output. The device will protect
both itself and the load. This provides protection against
batteries which can be plugged in backwards.

The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open-circuit or grounded, the ADJ
pin will act like an open-circuit when pulled below ground,
and like a large resistor (typically 100k) in series with a
diode when pulled above ground. If the input is powered by
a voltage source, pulling the ADJ pin below the reference
voltage will cause the device to try and force the current
limit out of the output. This will cause the output to go to
an unregulated high voltage. Pulling the ADJ pin above the
reference voltage will turn off all output current.

In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp volt­age if the output is pulled high, the ADJ pin input current
must be limited to less than 5mA. For example, a resistor

divider is used to provide a regulated 1.5V output from the

1.24V reference when the output is forced to 60V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 53V difference between the OUT and ADJ
pin is divided by the 5mA maximum current into the ADJ
pin yields a minimum top resistor value of 10.6k.

In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage, or is left
open-circuit. Current fl ow back into the output will follow
the curve shown in Figure 5. The rise in reverse output
current above 7V occurs from the breakdown of the 7V
clamp on the ADJ pin. With a resistor divider on the regula­tor output, this current will be reduced depending on the
size of the resistor divider.

When the IN pin of the LT3011 is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input cur­rent will typically drop to less than 2μA. This can happen
if the input of the LT3011 is connected to a discharged
(low voltage) battery and the output is held up by either
a backup battery or a second regulator circuit. The state
of the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.

160

140

120

100

80

60

40

REVERSE OUTPUT CURRENT (μA)

20

0

07

Figure 5. Reverse Output Current

ADJ PIN CLAMP

(SEE ABOVE)

TJ = 25°C

= 0V

V

IN

CURRENT FLOWS
INTO OUTPUT PIN

= V

V

OUT

ADJ

24

358610

19

OUTPUT VOLTAGE (V)

3011 F05

3011f

13

LT3011

TYPICAL APPLICATIONS

5V Buck Converter with Low Current Keep Alive Backup

6

V

5.5V*

TO 60V

IN

C3

4.7MF
100V
CERAMIC

BOOST

4

V

IN

LT1766

15

SHDN

14

SYNC

GND

BIAS

V

1, 8, 9, 16

SW

D2

D1N914

Buck Converter

C2

0.33MF

2

D1
10MQ060N

10

R1

15.4k

12

FB

C

11

C
1nF

R2

4.99k

C

L1

15MH

100MF 10V

SOLID

TANTALUM

†

V

OUT

5V
1A/250mA

C1

+

Effi ciency vs Load Current

100

EFFICIENCY (%)

90

80

70

60

= 5V

V

OUT

L = 68MH

VIN = 10V

VIN = 42V

OPERATING

CURRENT

HIGH

LOW

100k

V

(FUTURE 42V)

12V

OFF

10

8

5

SHDN

PWRGD

GND

LT3011

3, 11

1

OUTIN

2

ADJ

C

T

6

1000pF

*

FOR INPUT VOLTAGES BELOW 7.5V,

750k

SOME RESTRICTIONS MAY APPLY

†

INCREASE L1 TO 30MH FOR LOAD
CURRENTS ABOVE 0.6A AND TO

249k

60MH ABOVE 1A.

LT3011 PIN NUMBERS ARE FOR
THE DD PACKAGE.

3011 TA03

50

0.25

0

LOAD CURRENT (A)

0.50

0.75

1.00

1.25

3011 TA04

LT3011 Automotive Application

+

IN

ON

1MF

NO PROTECTION

DIODE NEEDED!

SHDN

LT3011

GND

OUTIN

ADJ

750k

249k

1MF

LOAD: CLOCK,

SECURITY SYSTEM

ETC

14

V

OFF

48V

ON

(72V TRANSIENT)

LT3011 Telecom Application

IN

1MF

SHDN

LT3011

GND

OUTIN

ADJ

750k

NO PROTECTION

DIODE NEEDED!

249k

1MF

LOAD:

SYSTEM MONITOR

ETC

3011 TA05

+

BACKUP
BATTERY

–

3011f

PACKAGE DESCRIPTION

DD Package

10-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1699)

0.675 ±0.05

R = 0.115

TYP

LT3011

0.38

± 0.10

106

3.50 ±0.05

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION
OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS
OF VARIATION ASSIGNMENT

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

1.65 ±0.05

(2 SIDES)

2.15 ±0.05

0.25 ± 0.05

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

2.38 ±0.05

(2 SIDES)

0.50
BSC

PACKAGE
OUTLINE

12-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1666 Rev B)

2.845 p 0.102
(.112 p .004)

5.23

(.206)

MIN

0.42 p 0.038

(.0165 p .0015)

TYP

RECOMMENDED SOLDER PAD LAYOUT

0.254

(.010)

GAUGE PLANE

0.18

(.007)

1.651 p 0.102
(.065 p .004)

(.0256)

DETAIL “A”

DETAIL “A”

0.65

BSC

o – 6o TYP

0

TOP MARK

(SEE NOTE 6)

MSE Package

0.889

p 0.127

(.035 p .005)

3.20 – 3.45

(.126 – .136)

0.53 p 0.152

(.021 p .006)

6

DETAIL “B”

7

(.118 p .004)

1.65 ± 0.10

(2 SIDES)

0.00 – 0.05

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

NO MEASUREMENT PURPOSE

0.406 p 0.076
(.016 p .003)

REF

3.00 p 0.102

(NOTE 4)

0.86

(.034)

REF

2.38 ±0.10

(2 SIDES)

BOTTOM VIEW—EXPOSED PAD

0.12 REF

DETAIL “B”

FOR REFERENCE ONLY

3.00 ±0.10

p 0.102

2.845
(.112 p .004)

4.039 p 0.102
(.159 p .004)

(NOTE 3)

(4 SIDES)

0.75 ±0.05

PIN 1

0.200 REF

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE

BOTTOM VIEW OF

EXPOSED PAD OPTION

1

12

12 11 10 9 8 7

4.90 p 0.152
(.193 p .006)

123456

1.10

(.043)

MAX

0.35
REF

15

0.25 ± 0.05

0.50 BSC

(DD) DFN 1103

SEATING

PLANE

0.22 –0.38

(.009 – .015)

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

TYP

0.650

(.0256)

BSC

0.1016 p 0.0508
(.004 p .002)

MSOP (MSE12) 0608 REV B

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa­tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

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15

LT3011

TYPICAL APPLICATION

Constant Brightness for Indicator LED over Wide Input Voltage Range

–48V CAN VARY
FROM –4V TO –80V

RETURN

OFF

–48V

ON

I

= 1.24V/R

LED

1MF

SET

IN

SHDN

LT 3 0 1 1

GND

OUT

ADJ

1MF

R

SET

3011 TA06

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1121/

150mA, Micropower, LDO V

LT1121HV
LT1676 60V, 440mA (I

), 100kHz, High

OUT

: 4.2V to 30V/36V, V

IN

Reverse Battery Protection, SOT-223, S8 and Z Packages
VIN: 7.4V to 60V, V

OUT(MIN)

Effi ciency Step-Down DC/DC Converter

LT1761 100mA, Low Noise Micropower, LDO V

LT1762 150mA, Low Noise Micropower, LDO V

LT1763 500mA, Low Noise Micropower, LDO V

LT1764/
LT1764A

3A, Low Noise, Fast Transient Response,
LDO

: 1.8V to 20V, V

IN

Low Noise < 20μV

: 1.8V to 20V, V

IN

Low Noise < 20μV

: 1.8V to 20V, V

IN

Low Noise < 20μV

: 2.7V to 20V, V

V

IN

Low Noise < 40μV

OUT(MIN)

RMS

OUT(MIN)

RMS

OUT(MIN)

RMS

OUT(MIN)

RMS

DD and TO220-5 Packages

LT1766 60V, 1.2A (I

), 200kHz, High Effi ciency

OUT

VIN: 5.5V to 60V, V

OUT(MIN)

Step-Down DC/DC Converter

LT1776 40V, 550mA (I

), 200kHz, High

OUT

VIN: 7.4V to 40V, V

OUT(MIN)

Effi ciency Step-Down DC/DC Converter

LT1956 60V, 1.2A (I

), 500kHz, High Effi ciency

OUT

VIN: 5.5V to 60V, V

OUT(MIN)

Step-Down DC/DC Converter

LT1962 300mA, Low Noise Micropower, LDO V

LT1963/
LT1963A

1.5A, Low Noise, Fast Transient Response,
LDO

: 1.8V to 20V, V

IN

Low Noise < 20μV

: 2.1V to 20V, V

V

IN

Low Noise < 40μV

OUT(MIN)

RMS

OUT(MIN)

RMS

DD, TO220-5, S0T-223 and S8 Packages

LT1965 1.1A, Low Noise, Low Dropout Linear

Regulator

310mV Dropout Voltage, Low Noise = 40μV
V

: 1.2V to 19.5V, Stable with Ceramic Capacitors, TO-220, DDPak,

OUT

MSOP and 3mm × 3mm DFN Packages
LT3009 20mA, 3μA IQ Micropower LDO 280mV Dropout Voltage, Low IQ = 3μA, VIN: 1.6V to 20V, ThinSOT and SC-70 Packages
LT3010/

LT3010H
LT3012/

LT3012H
LT3013/

LT3013H

50mA, 3V to 80V, Low Noise Micropower
LDO

250mA, 4V to 80V, Low Dropout
Micropower Linear Regulator

250mA, 4V to 80V, Low Dropout
Micropower Linear Regulator

LT3014/HV 20mA, 3V to 80V, Low Dropout

Micropower Linear Regulator

LT3080/
LT3080-1

1.1A, Parallelable, Low Noise, Low
Dropout Linear Regulator

: 3V to 8V, V

V

IN

Low Noise < 100μV

VIN: 4V to 80V, V

OUT(MIN)

RMS

: 1.24V to 60V, VDO = 0.4V, IQ = 40μA, ISD <1μA,

OUT

TSSOP-16E and 4mm × 3mm DFN-12 Packages, H Grade = +140°C T

VIN: 4V to 80V, V

: 1.24V to 60V, VDO = 0.4V, IQ = 65μA, ISD <1μA,

OUT

TSSOP-16E and 4mm × 3mm DFN-12 Packages, H Grade = +140°C T

: 3V to 80V (100V for 2ms, HV Version), V

V

IN

I

= 7μA, ISD <1μA, ThinSOT and 3mm × 3mm DFN-8 Packages

Q

300mV Dropout Voltage (2-Supply Operation), Low Noise = 40μV

V

: 0V to 35.7V, Current-Based Reference with One Resistor V

OUT

Parallelable (No Op Amp Required), Stable with Ceramic Capacitors, TO-220, SOT-223,

MSOP and 3mm × 3mm DFN Packages; LT3080-1 Features an Integrated Ballast Resistor
ThinSOT is a trademark of Linear Technology Corporation.

Linear Technology Corporation

16

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear.com

= 3.75V, VDO = 0.42V, IQ = 30μA, ISD = 16μA,

OUT(MIN)

= 1.24V, IQ = 3.2mA, ISD = 2.5μA, S8 Package

= 1.22V, VDO = 0.3V, IQ = 20μA, ISD <1μA,

, Stable with 1μF Ceramic Capacitors, ThinSOTTM Package

= 1.22V, VDO = 0.3V, IQ = 25μA, ISD <1μA,

, MS8 Package

= 1.22V, VDO = 0.3V, IQ = 30μA, ISD <1μA,

, S8 Package

= 1.21V, VDO = 0.34V, IQ = 1mA, ISD <1μA,

, “A” Version Stable with Ceramic Capacitors,

= 1.2V, IQ = 2.5mA, ISD = 25μA, TSSOP-16/E Package

= 1.24V, IQ = 3.2mA, ISD = 30μA, N8 and S8 Packages

= 1.2V, IQ = 2.5mA, ISD = 25μA, TSSOP-16/E Package

= 1.22V, VDO = 0.27V, IQ = 30μA, ISD <1μA,

, MS8 Package

= 1.21V, VDO = 0.34V, IQ = 1mA, ISD <1μA,

, “A” Version Stable with Ceramic Capacitors,

, VIN: 1.8V to 20V,

RMS

= 1.275V, VDO = 0.3V, IQ = 30μA, ISD = 1μA,

, MS8E Package, H Grade = +140°C T

: 1.22V to 60V, VDO = 0.35V,

OUT

JMAX

JMAX

, PWRGD Flag

JMAX

, VIN: 1.2V to 36V,

RMS

Set; Directly

OUT

LT 0808 • PRINTED IN USA

© LINEAR TECHNOLOGY CORPORATION 2008

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