QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1524A-A
200MHZ TO 6000MHZ QUADRATURE MODULATOR WITH ULTRAHIGH OIP3
DESCRIPTION
LTC5588-1
Demonstration circuit 1524A-A is a high linearity direct
quadrature modulator featuring the LTC®5588-1.
The LTC5588-1 is a direct conversion I/Q modulator
designed for high performance wireless applications. It
allows direct modulation of an RF signal using differential baseband I and Q signals. It supports LTE, GSM,
EDGE, TD-SCDMA, CDMA, CDMA2000, W-CDMA, WiMax and other communication standards. It can also be
configured as an image reject upconverting mixer, by
applying 90° phase-shifted signals to the I and Q inputs.
The LTC5588-1 accepts externally applied balanced I
and Q baseband input signals with a common-mode
voltage level of 0.5V. These voltage signals are converted to currents and translated to RF frequency by
means of double-balanced upconverting mixers. The
mixer outputs are combined to single-ended through an
on-chip RF output balun, which also transforms the
output impedance to 50Ω for a wide RF frequency
range. A single-ended or differential LO input signal
drives a precision quadrature phase shifter followed by
LO buffers, which in-turn drive the upconverting mixers.
The LTC5588-1 offers exceptional linearity performance.
An external voltage can be applied to the LINOPT pin to
further improve its output 3rd-order intercept. The
LTC5588-1’s supply voltage range is 3.15V to 3.45V,
and consumes about 303mA current.
Demonstration circuit 1524A-A is designed for evaluating the LTC5588-1 IC at RF frequencies from 700MHz
to 5GHz. With a few component changes, it can be easily optimized for evaluations at lower or higher frequencies. Refer to “Application Note” section and the
LTC5588-1 data sheet for details.
Design files for this circuit board are available. Call
the LTC factory.
, LT, LTC, and LTM are registered trademarks of Linear Technology Corp.
All other trademarks are the property of their respective owners.
Table 1. Typical Demo Circuit Performance Summary
TA = 25°C; VCC = 3.3V, EN = 3.3V; BBPI, BBMI, BBPQ, BBMQ common-mode DC Voltage V
1V
fLO – fBB, unless otherwise noted.
PARAMETER CONDITIONS TYPICAL PERFORMANCE
Supply Voltage
Supply Current I
Sleep Current I
Baseband Bandwidth -1dB Bandwidth, R
Baseband Input Current Single-Ended
Baseband Input Resistance Single-Ended
Baseband DC Common-Mode Voltage Externally Applied
Baseband Amplitude Swing No Hard Clipping, Single-Ended 0.86V
LO Match Frequency Range Standard Demo Board, S11 < -10dB
RF Match Frequency Range Standard Demo Board, S22 < -10dB 700MHz to 5000MHz
each (two-tone I and Q baseband input signal are at 4.5MHz and 5.5MHz), I and Q 90° shifted, lower side-band selection; P
P-P(DIFF)
CC1+ICC2
CC1+ICC2
, EN = High 303mA
, EN = 0V
= 25Ω, Single-ended
SOURCE
= 0.5VDC, I and Q baseband input signal = 100kHz CW,
CMBB
3.15V to 3.45V
33µA
430MHz
-136µA
-3kΩ
0.5V
P-P
600MHz to 6000MHz
= 0dBm; fRF =
LOM
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QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1524A-A
200MHZ TO 6000MHZ QUADRATURE MODULATOR WITH ULTRAHIGH OIP3
TA = 25°C; VCC = 3.3V, EN = 3.3V; BBPI, BBMI, BBPQ, BBMQ common-mode DC Voltage V
1V
fLO – fBB; LINOPT pin floating unless otherwise noted.
PARAMETER CONDITIONS TYPICAL PERFORMANCE
Conversion Voltage Gain 20 • Log (V
Absolute Output Power 1V
Output 1dB Compression 12.1dBm 12.4dBm 12.0dBm 11.4dBm
Output 2nd Order Inter-
Output 3rd Order Intercept IM3 is Measured at fLO – 3.5MHz and fLO – 6.5MHz
LINOPT pin floating 31.3dBm 30.3dBm 30.9dBm 29.2dBm
LINOPT pin voltage optimized for best OIP3 35.1dBm 32.7dBm 35.1dBm 39.5dBm
RF Output Noise Floor No Baseband AC Input Signal (6MHz offset) -161.6dBm/Hz -160.6dBm/Hz -160.6dBm/Hz -160.5dBm/Hz
Image Rejection Without nulling (unadjusted) -45.5dBc -54.4dBc -56.6dBc -48.8dBc
LO Feedthrough Without nulling (unadjusted) -43.1dBm -40.9dBm -39.6dBm -35.5dBm
each (two-tone I and Q baseband input signal are at 4.5MHz and 5.5MHz), I and Q 90° shifted, lower side-band selection; P
P-P(DIFF)
fLO = 900MHz
RF(OUT)(50
CW Signal, I and Q 4.0dBm 4.4dBm 4.2dBm 3.8dBm
P-P(DIFF)
IM2 is Measured at fLO – 10MHz 73.6dBm 58.8dBm 58.5dBm 61.1dBm
/ V
Ω)
IN(DIFF)(I OR Q)
) 0dB 0.4dB 0.2dB -0.2dB
= 0.5VDC, I and Q baseband input signal = 100kHz CW,
CMBB
LOM
fLO = 1900MHz
fLO = 2140MHz fLO = 2600MHz
= 0dBm; fRF =
2
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1524A-A
200MHZ TO 6000MHZ QUADRATURE MODULATOR WITH ULTRAHIGH OIP3
APPLICATION NOTE
ABSOLUTE MAXIMUM RATINGS
NOTE:
Stresses beyond Absolute Maximum Ratings may
cause permanent damage to the device. Exposure to
any Absolute Maximum Rating condition for extended
periods may affect device reliability and lifetime.
Supply Voltage ...................................................3.8V
Common Mode Level of BBPI, BBMI and
BBPQ, BBMQ ....................................................0.55V
Voltage on Any Pin ......................-0.3V to VCC + 0.3V
T
.............................................................. 150°C
JMAX
Operating Temperature Range ............. -40°C to 85°C
Storage Temperature Range .............. -65°C to 150°C
POWER SUPPLY CONSIDERATION
In demonstration circuit 1524A-A (see Figure 3 for
schematic), resistors R1 and R2 reduce the charging
current in the power supply bypass capacitors C1 and
C2 and reduce supply ringing during a fast power rampup in case an inductive cable is connected to the VCC
and GND. While the LTC5588-1 IC is enabled, the voltage drop across R1 and R2 is approximately 0.15V. The
supply voltages applied directly to the chip can be
monitored by measuring at the test points TP1 and TP2.
If the power supply used ramps up slower than 7V/µs
and limits its output overshoot to below 3.8V, R1 and
R2 can be omitted.
ENABLE INTERFACE
The EN input in demonstration circuit 1524A-A controls
the operation of the LTC5588-1 IC. When a voltage of
2V or higher is applied, the IC is turned on. When the
input voltage falls below 1V, the IC is turned off and enters sleep mode. If the EN input is not connected, the
LTC5588-1’s 100kΩ on-chip pull-up resistor assures
the IC is enabled. The voltage applied to the EN input
must never exceed VCC by more than 0.3V. Surpassing
this limit may cause permanent damage to the IC.
BASEBAND INPUT INTERFACE
Demonstration circuit 1524A-A has two channels of
high impedance differential inputs to which external I
and Q baseband signals can be applied. BBPI and BBMI
are the differential I-channel baseband inputs. BBPQ
and BBMQ are the differential Q-channel baseband inputs.
Because the LTC5588-1 baseband inputs’ single-ended
impedance is -3k each, it is important to keep the
source resistance low enough such that the parallel
value remains positive for the entire baseband frequency range.
A common-mode voltage of 0.5V (maximum 0.55V)
must be externally applied to the baseband inputs for
proper operation. In any case, the baseband inputs
must NOT be left floating to avoid damages to the
LTC5588-1 IC.
LO INPUT INTERFACE
The standard demonstration circuit 1524A-A can accept
either single-ended or differential LO inputs. If singleended LO input is used, the LO signal should be applied
to the LOM port, and the LOP port should be terminated
in 50Ω for best image rejection performance. In most
cases, single-ended LO drive should be sufficient.
However, the LOP and LOM inputs can also be driven
differentially when an exceptionally low large-signal
output noise floor is required.
Demonstration circuit 1524A-A’s LO inputs are optimized for 600MHz to 6GHz operations with better than
10dB input return loss. At lower LO frequencies, the
image rejection and the large-signal noise performance
can be improved with higher LO drive levels. However,
if the single-ended drive level causes internal clipping,
the LO leakage degrades. Using a balun such as the
Anaren B0310J50100A00 increases the LO drive level
without internal clipping and provides a relatively
broadband LO port impedance match. The balun (U2)
can be installed by removing the DC blocking capacitors
C5 and C6. However, for this particular balun, an external DC block is required.
Refer to the LTC5588-1 datasheet for more information
and impedance data.
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