3-2 INTERFACE CONNECTIONS
3-3 LVDS SIGNAL TIMING SPECIFICATIONS
3-4 SIGNAL TIMING SPECIFICATIONS
3-5 SIGNAL TIMING WAVEFORMS
3-6 COLOR INPUT DATA REFERNECE
3-7 POWER SEQUENCE
4 OPTICAL SFECIFICATIONS
Page
1
2
3
4
5
6
7
9
11
11
12
13
14
5 MECHANICAL CHARACTERISTICS
6 RELIABLITY
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
8 PACKING
8-1 DESIGNATION OF LOT MARK
8-2 PACKING FORM
9 PRECAUTIONS
A APPENDIX. Enhanced Extended Display Identification Data
The LP141WX5 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally white mode. This TFT-LCD has 14.1 inches diagonally measured active display area with
WXGA resolution (1280 horizontal by 800 vertical pixel array). Each pixel is divided into Red, Green and
Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel
color is determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than
262,144 colors. The LP141WX5 has been designed to apply the interface method that enables low power,
high speed, low EMI. The LP141WX5 is intended to support applications where thin thickness, low power
are critical factors and graphic displays are important. In combination with the vertical arrangement of the
sub-pixels, the LP141WX5 characteristics provide an excellent flat display for office automation products
such as Notebook PC.
Timing Control
(Tcon) Block
DVCC
Power
Block
EEPROM Block
for EDID
LED Driver
Block
TCLKs
DVCC, AVDD
VGH, VGL, GMA
GIP CLKs, DSC
VOUT_LED
FB1~6
1
800
Source Driver
(Top Bent)
1280
TFT-LCD Panel
(WXGA, GIP, TN)
LED Backlight Ass’y
EDID signal & Power
User connector
40
Pin
LVDS
1port
VCC
VLED
SMBus
LED_EN
PWM
Control & Data Power
General Features
Active Screen Size 14.1 inches diagonal
Outline Dimension
Pixel Pitch
Pixel Format 1280 horiz. By 800 vert. Pixels RGB strip arrangement
Color Depth 6-bit, 262,144 colors
Luminance, White 220 cd/m2(Typ.5 point)
Power Consumption Total 4.55 Watt(Typ.) @ LCM circuit 1.35 Watt (Typ._Mosaic), B/L 3.2Watt(Typ.)
Weight 390g(Typ.)
Display Operating Mode Transmissive mode, normally white
Surface Treatment Anti-Glare treatment of the front polarizer
RoHS / Low Halogen Comply Yes
BFR / PVC /As Free Yes of all
319.5(H,Typ.) × 205.5(V,Typ.) × 5.5(D,Max.) [mm]
0.2373mm × 0.2373 mm
Ver. 1.1 Oct. 15, 2010
4 / 33
LP141WX5
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
VCC -0.3 4.0 Vdc at 25 5C
TOP 0 50 C 1
HST -20 60 C 1
HOP 10 90 %RH 1
HST 10 90 %RH 1
Values
Units Notes
Min Max
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39C Max, and no condensation of water.
The LP141WX5 requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL with LED Driver.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Unit Notes
Min Typ Max
LOGIC :
Power Supply Input Voltage VCC 3.0 3.3 3.6 V 1
Power Supply Input Current Mosaic ICC - 410 470 mA 2
Power Consumption PCC - 1.35 1.55 W 3
Power Supply Inrush Current ICC_P - - 1500 mA 4
LVDS Impedance ZLVDS 90 100 110 Ω5
BACKLIGHT : ( with LED Driver)
LED Power Input Voltage VLED 7.0 12.0 21.0 V 6
LED Power Input Current ILED - 20.0 21.0 mA 6
LED Power Consumption PLED - 3.2 3.4 W 7
LED Power Inrush Current ILED_P - - 2000 mA 8
Values
PWM Duty Ratio 1.0 - 100 %
PWM Jitter
-
0 - 0.2 % 10
9
PWM Impedance ZPWM 20 40 60 kΩ
PWM Frequency FPWM
PWM High Level Voltage V
PWM Low Level Voltage V
PWM_H
PWM_L
200 - 1000 Hz
3.0 - 5.3 V
0 - 0.3 V
11
LED_EN Impedance ZPWM 20 40 60 kΩ
LED_EN High Voltage VLED_EN_H 3.0 - 5.3 V
LED_EN Low Voltage VLED_EN_L 0 - 0.3 V
Life Time 15,000 - - Hrs 12
Ver. 1.1 Oct. 15, 2010
6 / 33
LP141WX5
Liquid Crystal Display
Product Specification
Note)
1. The measuring position is the connector of LCM and the test conditions are under 25℃, fv = 60Hz,
Black pattern.
2. The specified Icc current and power consumption are under
the Vcc = 3.3V , 25℃, fv = 60Hz condition and Mosaic pattern.
3. This Spec. is the max load condition for the cable impedance designing.
4. The below figures are the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same as the minimum of T1 at Power on sequence.
Rising time
Vcc
0V
10%
90%
3.3V
0.5ms
5. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.
6. The measuring position is the connector of LCM and the test conditions are under 25℃.
7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25℃, Dimming of
Max luminance and White pattern with the normal frame frequency operated(60Hz).
8. The below figures are the measuring Vled condition
and the Vled control block LGD used.
VLED control block is same with Vcc control block.
Rising time
VLED
90%
12.0V
0V
10%
0.5ms
9. The operation of LED Driver below minimum dimming ratio
may cause flickering or reliability issue. LGD LED Driver guarantee 6.0% at PWM minimum dimming ratio.
Minimum dimming ratio 1.0% is based on Lenovo’s.
10. If Jitter of PWM is bigger than maximum, it may induce flickering.
11. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.
12. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum
value specified in table 7. under general user condition.
Ver. 1.1 Oct. 15, 2010
7 / 33
LP141WX5
Liquid Crystal Display
Product Specification
3-2. Interface Connections
This LCD employs two interface connections, a 40 pin connector is used for the module electronics interface
and the other connector is used for the integral backlight system.
The electronics interface connector is a model CABLINE-VS RECE ASS’Y manufactured by I-PEX.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
Pin Symbol Description Notes
1 GND Ground
2 VCC Power Supply, 3.3V Typ.
3 VCC Power Supply, 3.3V Typ.
4 V EEDID DDC 3.3V power
5 TEST Reserved for supplier test point
6 Clk EEDID DDC Clock
7 DATA EEDID DDC Data
8 Odd_RIN 0- Negative LVDS differential data input
9 Odd_RIN 0+ Positive LVDS differential data input
10 GND Ground
11 Odd_RIN 1- Negative LVDS differential data input
12 Odd_RIN 1+ Positive LVDS differential data input
13 GND Ground
14 Odd_RIN 2- Negative LVDS differential data input
15 Odd_RIN 2+ Positive LVDS differential data input
16 GND Ground
17 Odd_CLKIN- Negative LVDS differential clock input
18 Odd_CLKIN+ Positive LVDS differential clock input
19 GND Ground
20 NC No Connection
21 NC No Connection
19 GND Ground
23 NC No Connection
24 NC No Connection
19 GND Ground
26 NC No Connection
27 NC No Connection
19 GND Ground
29 NC No Connection
30 NC No Connection
31
32
33
34
35
36
37
38
39
40
VLED_GND LED Ground
VLED_GND LED Ground
VLED_GND LED Ground
NC No Connection (Reserved)
PWM PWM for luminance control (200Hz ~ 1000Hz)
LED_EN Backlight On/Off Control
NC No Connection (Reserved)
VLED LED Power Supply 7.0V-21.0V
VLED LED Power Supply 7.0V-21.0V
VLED LED Power Supply 7.0V-21.0V
1, Interface chips
1.1 LCD : SW, SW0624 (LCD Controller)
including LVDS Receiver
1.2 System : THC63LVDF823A
or equivalent
* Pin to Pin compatible with LVDS
2. Connector
2.1 LCD : CABLINE-VS(20455-040E, I-PEX)
2.2 Mating : CABLINE-VS PLUG CABLE
ASS’Y or equivalent.