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1. General Description
The LP140WH7 is a Color Active Matrix Liquid Crystal Display with an internal LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally white mode. This TFT-LCD has 14.0 inches diagonally measured active display area with HD
resolution (1366 horizontal by 768 vertical pixel array). Each pixel is divided into Red, Green and Blue subpixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors. The LP140WH7 has been designed to apply the interface method that enables low power, high
speed, low EMI. The LP140WH7 is intended to support applications where thin thickness, low power are
critical factors and graphic displays are important. In combination with the vertical arrangement of the subpixels, the LP140WH7 characteristics provide an excellent flat display for office automation products such
as Notebook PC.
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LP140WH7
Liquid Crystal Display
Product Specification
User connector
30
Pin
ڜڰڳ
esp.
1Lane
VCC
esp. Timing Control
esp. Timing Control
(Tcon) Block
(Tcon) Block
DVCC
Power
Block
TCLKs
Power
Block
VOUT_LED
FB1~3
E
P
I
DVCC, AVDD
VGH, VGL, GMA
GIP CLKs, DSC
1
768
LED Backlight Ass’y
Control & DataPowerEDID signal & Power
General Features
Active Screen Size14.0 inches diagonal
Outline Dimension
Pixel Pitch0.2265mm Ý 0.2265 mm
Pixel Format1366 horiz. by 768 vert. Pixels RGB strip arrangement
Color Depth6-bit, 262,144 colors
Power Consumption
Luminance, white
Weight320 g (Max.)
Display Operating ModeTransmissive mode, normally white
Surface TreatmentGlare treatment (3H) of the front Polarizer
RoHS ComplianceYes
BFR / PVC / As Free Yes for all
The LP140WH7 requires one power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal.
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LP140WH7
Liquid Crystal Display
Product Specification
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
MinTypMax
LOGIC :
Power Supply Input VoltageV
Power Supply Input Current
CC3.03.33.6V1
I
CC-226260mA
Mosaic
Power ConsumptionP
Power Supply Inrush CurrentI
esp. ImpedanceZ
CC-0.750.85W
CC_P--1500mA3
eDP90100110
LED : W/O LED Driver
LED Output VoltageV
LED Output CurrentI
LED Power ConsumptionFull DutyP
OUT3234V
OUT7273.5mA1string 24mA
OUT2.352.5W
Note)
1. The measuring position is the connector of Board Ass’y
and the test conditions are under 25, fv = 60Hz, Black pattern.
2. The specified Icc current and power consumption are under the
Vcc = 3.3V , 25, fv = 60Hz condition.
3. This Spec. is the max load condition for the cable impedance designing.
Values
UnitNotes
ȳ
Mosaic Pattern
2
4
4. This impedance value is needed for proper display and measured form esp. Tx to the mating connector.
** The below figures are the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same as the minimum of T1 at Power on sequence.
Rising time
Vcc
0V
10%
90%
3.3V
0.5ms
Ver. 1.0Apr. 09. 2012
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3-2. Interface Connections
This LCD employs two interface connections, a 30 pin connector is used for the module electronics interface
and the other connector is used for the integral backlight system.
The electronics interface connector is a model CABLINE-VS RECE ASS’Y.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
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LP140WH7
Liquid Crystal Display
Product Specification
PinSymbolDescription
1
NCNo Connection (Reserved)
2
H_GNDHigh Speed (Main Link) Ground
3
NCNo Connection (Reserved)
4
NCNo Connection (Reserved)
5
H_GNDHigh Speed (Main Link) Ground
6
ML0-Complement Signal-Lane 0
7
ML0+True Signal-Main Lane 0
8
H_GNDHigh Speed (Main Link) Ground
9
AUX+True Signal-Auxiliary Channel
10
AUX-Complement Signal-Auxiliary Channel
11
H_GNDHigh Speed (Main Link) Ground
12
VCCLCD Logic and driver power (3.3V Typ.)
13
VCCLCD Logic and driver power (3.3V Typ.)
14
BISTBuilt-In Self Test (active high)
15
GNDGround
16
GNDGround
17
HPDHPD signal pin
18
GNDGround
19
GNDGround
20
NCNo Connection (Reserved)
21
FB3Regulated Current sink
22
FB2Regulated Current sink
23
FB1Regulated Current sink
24
NCNo Connection (Reserved – Use P-vcom)
25
NCNo Connection (Reserved – Use P-vcom)
26
VOUTBoost output voltage
Notes
[Interface Chip]
1, Interface chips
1.1 LCD :SiW, SW0661 (LCD Controller)
including esp. Receiver
1.2 System : GM60028 or ANX9804
or equivalent
* Pin to Pin compatible with esp.
[Connector]
HD2S030HA1, JAE or I-PEX(CABLINE-VS)
[Mating Connector]
CABLINE-VS PLUG CABLE ASS’Y
or equivalent.
[LED Block]
LED block move to system set base
[Connector pin arrangement]
Check LCM drawing (Page 18)
27
VOUTBoost output voltage
28
VOUTBoost output voltage
29
NCNo Connection (Reserved)
30
NCNo Connection (Reserved)
Ver. 1.0Apr. 09. 2012
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3-3. esp. Signal Timing Specifications
3-3-1. DC Specification
The VESA Display Port related AC specification is compliant with the VESA Display Port Standard.
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LP140WH7
Liquid Crystal Display
Product Specification
DescriptionSymbolMinMaxUnitNotes
Differential peak-to-peak Input voltage
Rx DC common mode voltageV
VDIFF p-p
120-
mV
40-For reduced bit rate
CM02.0 V-
For high bit rate
3-3-2. AC Specification
The VESA Display Port related AC specification is compliant with the VESA Display Port Standard.
DescriptionSymbolMinTypMaxUnitNotes
Unit Interval for high bit rate
(2.7Gbps/lane)
Unit Interval for high bit rate
(1.62Gbps/lane)
Lane-to-Lane skew
UI_High_Rate-370-ps
UI_Low_Rate-617-ps
V Rx-SKEWINTER_PAIR
--5200ps -
Range is nominal ·350ppm.
DisplayPort Link Rx does not
require local crystal for link
clock generation
Lane intra-pair skew
Ver. 1.0Apr. 09. 2012
V Rx-SKEWINTRA_PAIR
--100ps For high bit rate
--300ps For reduced bit rate
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