LG Display LP133WH2-TLM2 Specification

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LP133WH2

Liquid Crystal Display

Product Specification

SPECIFICATION

FOR

APPROVAL

)

(

(

Preliminary Specification



)

Final Specification

13.3” HD TFT LCDTitle

LG Display Co., Ltd.SUPPLIER

LP133WH2*MODEL

TLM2Suffix

APPROVED BY

/

/

DELLBUYER

Ryu2MODEL

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY SIGNATURE

SIGNATURE

H. S. Kim / S.Manager

REVIEWED BY

M. J. Lee / Manager

PREPARED BY

/

K. Y. Kwon / Engineer

Product Engineering Dept.

Please return 1 copy for your confirmation with
your signature and comments.

Ver. 0.0 AUG. 09. 2010

LG Display Co., Ltd

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LP133WH2

Liquid Crystal Display

Product Specification

Contents

No

1

2

3

4

COVER

CONTENTS

RECORD OF REVISIONS

GENERAL DESCRIPTION

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL SPECIFICATIONS

ELECTRICAL CHARACTREISTICS

3-1

INTERFACE CONNECTIONS

3-2

LVDS SIGNAL TIMING SPECIFICATION

3-3

SIGNAL TIMING SPECIFICATIONS

3-4

SIGNAL TIMING WAVEFORMS

3-5

COLOR INPUT DATA REFERNECE

3-6

POWER SEQUENCE

3-7

OPTICAL SFECIFICATIONS

ITEM

Page

1

2

3

4

5

6-7

8

9-10

11

11

12

13

14-16

5

6

7

8

9

Ver. 0.0 AUG. 09. 2010

MECHANICAL CHARACTERISTICS

RELIABLITY

INTERNATIONAL STANDARDS

SAFETY

7-1

EMC

7-2

Environment

7-3

PACKING

DESIGNATION OF LOT MARK

8-1

PACKING FORM

8-2

PRECAUTIONS

APPENDIX. Enhanced Extended Display Identification Data A

17-20

21

22

22

22

23

23

24-25

26-28

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LP133WH2

Liquid Crystal Display

Product Specification

RECORD OF REVISIONS

DescriptionPageRevision DateRevision No

First Draft (Preliminary Specification)-Aug. 09. 20100.0

EDID

ver

-

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1. General Description

The LP133WH2 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally white mode. This TFT-LCD has 13.3 inches diagonally measured active display area with HD
resolution (1366 horizontal by 768 vertical pixel array). Each pixel is divided into Red, Green and Blue sub­pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors. The LP133WH2 has been designed to apply the interface method that enables low power, high
speed, low EMI. The LP133WH2 is intended to support applications where thin thickness, low power are
critical factors and graphic displays are important. In combination with the vertical arrangement of the sub­pixels, the LP133WH2 characteristics provide an excellent flat display for office automation products such
as Notebook PC.

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LP133WH2

Liquid Crystal Display

Product Specification

User connector

LVDS

1port

40

Pin

VCC

VLED

LED_EN

PWM

Control & Data Power

General Features

EEPROM Block

EEPROM Block

for EDID

for EDID

EEPROM Block

EEPROM Block

for Tcon Operating

for Tcon Operating

Timing Control

Timing Control

(Tcon) Block

(Tcon) Block

DVCC

Power

Block

LED Driver

LED Driver

Block

TCLKs

Power

Block

Block

13.3 inches diagonal Active Screen Size

306.3(Typ. H) Ý 177.7(Typ. V) Ý 3.6(D, Max.) mmOutline Dimension

0.2148 Ý 0.2148 mmPixel Pitch

1366 horiz. by 768 vert. Pixels RGB strip arrangementPixel Format

6-bit, 262,144 colorsColor Depth

200 cd/m

Total 3.2W(Max.) Logic : 1.2W (Max.@ Mosaic), B/L : 2.0W (Max.@ VLED 12V )Power Consumption

290g(Max.)Weight

Transmissive mode, normally whiteDisplay Operating Mode

Anti-Glare treatment of the front Polarizer Surface Treatment

YesRoHS Compliance

Yes for all. BFR / PVC / As Free

DVCC, AVDD

VGH, VGL, GMA

GIP CLKs, DSC

VOUT_LED

2

(Typ.)Luminance, White

M

i

n

i

FB1~4

1

1366

TFT-LCD Panel

(HD, GIP, TN)

-

L

V

D

S

768

Source Driver

(Bottom)

LED Backlight Ass’y

EDID signal & Power

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୅

2. Absolute Maximum Ratings

The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.

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LP133WH2

Liquid Crystal Display

Product Specification

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Notes

Symbol

Values

MaxMin

Units

Power Input Voltage

Operating Temperature

Storage Temperature

Operating Ambient Humidity

OP

Storage Humidity

Note : 1. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be 39

Wet Bulb

20

]

30

Temperature [

10

0

qC Max, and no condensation of water.

90% 80%

60

50

40

60%

Humidity[(%)RH]

40%

20%

10%

Storage

Operation

at 25 r 5qCVdc4.0-0.3VCC

1qC500TOP

1qC60-20HST

1%RH9010H

1%RH9010HST

-20

10

20 30 40 50

60 70 800

Dry Bulb Temperature [୅]

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3. Electrical Specifications
3-1. Electrical Characteristics

The LP133WH2 requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL with LED Driver.

Table 2. ELECTRICAL CHARACTERISTICS

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LP133WH2

Liquid Crystal Display

Product Specification

LOGIC :

BACKLIGHT : ( with LED Driver)

PWM Jitter

Values

SymbolParameter

NotesUnit

MaxTypMin

CCPower Supply Input Voltage

CCMosaicPower Supply Input Current

CCPower Consumption

CC_PPower Supply Inrush Current

LVDSLVDS Impedance

LEDLED Power Input Voltage

11010090Z

ȳ

170150-ILEDLED Power Input Current

LEDLED Power Consumption

LED_PLED Power Inrush Current

W2.01.8P

1V3.63.33.0V

2mA365315-I

2W1.21.0-P

3mA1500--I

4

5V21.012.07.0V

6mA

7mA1000--I

8%100-5PWM Duty Ratio

-

PWMPWM Impedance

kȳ604020Z

9%0.2-0

PWMPWM Frequency

PWM High Level Voltage

PWM Low Level Voltage

Ver. 0.0 AUG. 09. 2010

PWM_H

PWM_L

PWMLED_EN Impedance

LED_EN_HLED_EN High Voltage

LED_EN_LLED_EN Low Voltage

10Hz20001000200F

V5.3-3.0V

V0.3-0V

kȳ604020Z

V5.3-3.0V

V0.3-0V

V5.3-3.0DBC_EN High Voltage

V0.3-0DBC_EN Low Voltage

12,000Life Time

11Hrs--

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Note)

1. The measuring position is the connector of LCM and the test conditions are under 25୅, fv = 60Hz,

Black pattern.

2. The specified Icc current and power consumption are under

the Vcc = 3.3V , 25୅, fv = 60Hz condition and Mosaic pattern.

3. This Spec. is the max load condition for the cable impedance designing.

4. The below figures are the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same as the minimum of T1 at Power on sequence.

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LP133WH2

Liquid Crystal Display

Product Specification

Rising time
Vcc

0V

5. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.

6. The measuring position is the connector of LCM and the test conditions are under 25୅.

7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25୅, Dimming of

Max luminance and White pattern with the normal frame frequency operated(60Hz).

8. The below figures are the measuring Vled condition
and the Vled control block LGD used.
VLED control block is same with Vcc control block.

90%

10%

0.5ms

3.3V

Rising time

LED

V

0V

10%

12.0V

90%

0.1ms

9. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.

10. If Jitter of PWM is bigger than maximum, it may induce flickering.

11. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent

to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.

12. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum

value specified in table 7. under general user condition.

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3-2. Interface Connections

This LCD employs two interface connections, a 40 pin connector used for the module electronics interface and
the other connector used for the integral backlight system.

Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)

Diag pin for Dell testing. Pin 1& 34 must be connected
together on the PCB board

LCD Logic and driver power (3.3V Typ.)VCC2

LCD Logic and driver power (3.3V Typ.)VCC3

DDC Power (3.3V)V EEDID4

Built-In Self TestBIST5

DDC ClockClk EEDID6

DDC DataDATA EEDID7

Negative LVDS differential data inputORX0-8

Positive LVDS differential data inputORX0+9

High Speed GroundGND10

Negative LVDS differential data inputORX1-11

Positive LVDS differential data inputORX1+12

High Speed GroundGND13

Negative LVDS differential data inputORX2-14

Positive LVDS differential data inputORX2+15

High Speed GroundGND16

Negative LVDS differential clock inputORXC-17

Positive LVDS differential clock inputORXC+18

High Speed GroundGND19

No Connection

No Connection21

High Speed GroundGND22

No Connection

No Connection

High Speed GroundGND25

No Connection

No Connection

High Speed GroundGND28

No Connection

No Connection

LED Backlight GroundGND

LED Backlight GroundGND

LED Backlight GroundGND

Diag pin for Dell testing. DIAG_LOOP34
System PWM Signal input for dimmingPWM

LED Backlight On/Off

Dynamic Backlight Control enable DBC_EN37

LED Backlight Power (7V-21V)VLED

LED Backlight Power (7V-21V)VLED

LED Backlight Power (7V-21V)VLED

20

23

24

26

27

29

30

31

32

33

35

36

38

39

40

DIAG_LOOP1

NC

NC

NC

NC

NC

NC

NC

NC

LED_EN

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Product Specification

LP133WH2

Liquid Crystal Display

NotesDescriptionSymbolPin

[Interface Chip]

1. LCD :
SiW, SW0617(LCD Controller)
Including LVDS Receiver.

2. System : SiW LVDSRx or equivalent

* Pin to Pin compatible with LVDS

[Connector]

UJU IS050-L40B-C10 or equivalent

[Mating Connector]

20453-#40E-## series or equivalent

[Connector pin arrangement]

40

[LCD Module Rear View]

1

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3-3. LVDS Signal Timing Specifications

3-3-1. DC Specification

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LP133WH2

Liquid Crystal Display

Product Specification

VDD=1.8V

LVDS Common mode Voltage

LVDS Input Voltage Range

3-3-2. AC Specification

LVDS Clock to Data Skew Margin

ID

CM

IN

Typ

|LVDS Differential Voltage

-

1.2

|/2|VID| /2V

ID

-

NotesUnitMaxMinSymbolDescription

-mV600100|V

-VVDD- |V

-VVDD0.3V

NotesUnitMaxMinSymbolDescription

SKEW

SKEW

- 600

ps+ 400- 400t

ps+ 600t

85MHz > Fclk ˻

65MHz

65MHz > Fclk ˻

25MHz

LVDS Clock to Clock Skew Margin (Even
to Odd)

SKEW_EO

Maximum deviation
of input clock frequency during SSC

DEV

Maximum modulation frequency
of input clock during SSC

Ver. 0.0 AUG. 09. 2010

MOD

-1/7

+ 1/7t

T

clk

%· 3-F

KHz200-F

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Freq.

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LP133WH2

Liquid Crystal Display

Product Specification

< Clock skew margin between channel >

F

max

F

center

F

min

3-3-3. Data Format

1) LVDS 1 Port

RCLK+

RA+/-

RB+/-

R3 R2

G4 G3

R1 R0

G2 G1

X

m

tvk

< Spread Spectrum >

G0 R5 R4 R3 R2 R1 R0

B1 B0 G5 G4 G3 G2 G1

m

G0

B1



QGm

kl}

Time

R5 R4

B0 G5

RC+/-

RD+/-

B5 B4

G7 G6

Previous (N-1 )th Cycle Next (N+1 )th Cycle

B3 B2

R7 R6

DE VSYNC HSYNC B5 B4 B3 B2

X B7 B6 G7 G6 R7 R6

Current (Nth ) Cycle

DE

VSYNC HSYNC

X

< LVDS Data Format >

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