*When you obtain standard approval,
please use the above model name without suffix
APPROVED BYSIGNATURE
K. J. KWON / S.Manager
REVIEWED BY
G. J. Han / Manager
PREPARED BY
/
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 1.031, Mar., 2009
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C. Y. Kim / Engineer
S. C. Jung / Engineer
Product Engineering Dept.
LG Display Co., Ltd
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LP133WH2
Liquid Crystal Display
Product Specification
Contents
COVER
CONTENTS
RECORD OF REVISIONS
GENERAL DESCRIPTION1
ABSOLUTE MAXIMUM RATINGS2
ELECTRICAL SPECIFICATIONS3
ELECTRICAL CHARACTREISTICS 3-1
INTERFACE CONNECTIONS 3-2
SIGNAL TIMING SPECIFICATIONS 3-3
SIGNAL TIMING WAVEFORMS 3-4
COLOR INPUT DATA REFERNECE 3-5
POWER SEQUENCE 3-6
ITEMNo
Page
1
2
3
4
5
6
7
10
10
11
12
OPTICAL SFECIFICATIONS4
MECHANICAL CHARACTERISTICS5
RELIABLITY6
INTERNATIONAL STANDARDS7
SAFETY 7-1
EMC 7-2
PACKING8
DESIGNATION OF LOT MARK 8-1
PACKING FORM 8-2
PRECAUTIONS9
APPENDIX A. Enhanced Extended Display Identification DataA
13
16
21
22
22
23
23
24
26
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LP133WH2
Liquid Crystal Display
Product Specification
RECORD OF REVISIONS
DescriptionPageRevision DateRevision No
First Draft-4. Feb, 20090.0
Updated Gray scale14
Updated Rear view19
Updated EDID (Added Color Coordinates)25-27
EDID
ver
0.0
0.1 Updated Color Coordinates.1316. Mar, 20090.1
1.0 Final Draft-31. Mar, 20091.0
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LP133WH2
Liquid Crystal Display
Product Specification
1. General Description
The LP133WH2 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally white mode. This TFT-LCD has 13.3 inches diagonally measured active display area with HD
resolution(1366 horizontal by 768 vertical pixel array). Each pixel is divided into Red, Green and Blue subpixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors.
The LP133WH2 has been designed to apply the interface method that enables low power, high speed, low
EMI.
The LP133WH2 is intended to support applications where thin thickness, low power are critical factors and
graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the
LP133WH2 characteristics provide an excellent flat display for office automation products such as Notebook
PC.
0.2148 × 0.2148 mmPixel Pitch
1366 horiz. by 768 vert. Pixels RGB strip arrangementPixel Format
6-bit, 262,144 colorsColor Depth
2
220 cd/m
Logic : 0.8 W (Max.), Back Light : 2.7W (Max.) @ 200nit, white patternPower Consumption
300g(Max.)Weight
Transmissive mode, normally whiteDisplay Operating Mode
Hard coating(3H), Glare treatment of the front Polarizer (Haze 0%)Surface Treatment
(Typ., @I
LED
=16 mA)Luminance, White
(1366 x 768)
1366
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LP133WH2
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterNotes
Symbol
Values
Units
MaxMin
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
OP
Storage Humidity
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39
Wet Bulb
Temperature [
]
°C Max, and no condensation of water.
90% 80%
60
50
60%
Humidity[(%)RH]
Storage
at 25 ± 5°CVdc4.0-0.3VCC
1°C500TOP
1°C60-20HST
1%RH9010H
1%RH9010HST
40
30
20
10
0
-20
10
20304050
6070800
Dry Bulb Temperature []
Ver. 1.031, Mar., 2009
40%
Operation
20%
10%
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LP133WH2
Liquid Crystal Display
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
The LP33WH2 requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL.with LED Driver.
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
LOGIC :
BACKLIGHT : ( with LED Driver)
PWM High Level Voltage
PWM Low Level Voltage
LED_EN High Voltage
LED_EN Low Voltage
CC Power Supply Input Voltage
CC Power Supply Input Current
I
CC Power Consumption
CC_P Power Supply Inrush Current
LVDS LVDS Impedance
LED LED Power Input Voltage
LED LED Power Input Current
PLED LED Power Comsumption
LED_P LED Power Inrush Current
PWM PWM Frequency
PWM_H
PWM_L
LED_EN_H
LED_EN_L
Values
MaxTypMin
NotesUnit
V3.63.33.0V
1mA2452151W0.8--P
mA1800--I
2É11010090Z
V20127V
3mA230210 I
3W2.72.5-
mA1000--I
4%100-20- PWM Dimming (Duty) Ratio
5Hz1500200F
V5-3.0V
V0.5-0V
V5-3.0V
V0.5-0V
6Hrs--12,000 Life Time
Note)
1. The specified Icc current and power consumption are under the Vcc = 3.3V , 25, fv = 60Hz condition
whereas white pattern is displayed and fv is the frame frequency.
2. This impedance value is needed to proper display and measured form LVDS Tx to the mating connector.
3. The specified LED current and power consumption are under the Vled = 12.0V , 25, Dimming of Max
luminance whereas White pattern is displayed and fv is the frame frequency.
4. The operation of LED Driver below minimum dimming ratio may cause flikering or relaibility issue.
5. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.
6. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum
value at Table 7. These LED backlight has 6 strings on it and the typical current of LED’s
string is base on Table 2.
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LP133WH2
Liquid Crystal Display
Product Specification
3-2. Interface Connections
This LCD employs two interface connections, a 40 pin connector is used for the module electronics interface
and the other connector is used for the integral backlight system.
The electronics interface connector is a model IS050-L40B-C10 manufactured by UJU.
No ConnectionNC
Power Supply +3.3V VDD
Power Supply +3.3V VDD
EDID +3.3V Power VEDID
Reserved (BIST)NC
EDID Clock Input CLKEDID
EDID Data Input DATAEDID
-LVDS Differential Data INPUT(R0-R5,G0) Odd Rx IN0- 8
+LVDS Differential Data INPUT(R0-R5,G0)Odd Rx IN0+9
Ground 10
-LVDS Differential Data INPUT(G1-G5,B0-B1)Odd Rx IN1- 11
+LVDS Differential Data INPUT(G1-G5,B0-B1)Odd Rx IN1+12
Ground VSS 13
-LVDS Differential Data INPUT(B2-B5,HS,VS,DE)Odd Rx IN2- 14
+LVDS Differential Data INPUT(B2-B5,HS,VS,DE)Odd Rx IN2+ 15
Ground VSS 16
No Connection NC
No Connection NC
Ground GND
No Connection NC
No Connection NC
Ground GND
No Connection NC
No Connection NC
Ground GND
No Connection NC
No Connection NC
LED GroundVLED_GND
LED GroundVLED_GND
LED GroundVLED_GND
No ConnectionNC
PWM for luminance controlBLIM
Backlight On/Off Control (on: 2.5V~3.V, off: 0~0.5V)BL_on
Reserved NC
LED Power Supply 7V-20VVLED
LED Power Supply 7V-20VVLED
LED Power Supply 7V-20VVLED
1. LCD :
SW, Dual LVDS Receiver.
2. System : SiWLVDSRx or equivalent
* Pin to Pin compatible with LVDS
IS050-L40B-C10 or equivalent
20453-040T-0x, I-PEX
or equivalent.
-1%0
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Product Specification
3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
LVDS -
|VID|
LVDS +
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LP133WH2
Liquid Crystal Display
# | VID| = |( LVDS +) – (LVDS -)|
# V
0V
Description
LVDS Common mode Voltage
LVDS Input Voltage Range
3-3-2. AC Specification
LVDS Clock
LVDS Data
= {( LVDS +) + ( LVD S - )} /2
CM
t
SKEW
V
CM
Symbo
l
|LVDS Differential Voltage
ID
CM
IN
T
clk
t
SKEW (Fclk
1) 85MHz > Fclk 65 MHz : - 400 ~ +400
2) 65MHz > Fclk 25 MHz : - 600 ~ +600
= 1/T
)
clk
V
IN_MAXVIN_ MIN
NotesUnitMaxMin
-mV600100|V
-V1.80.6V
-V2.10.3V
SKEW
ps+ 400 400-t
85MHz > Fclk °
LVDS Clock to Data Skew Margin
SKEW
LVDS Clock to Clock Skew Margin (Even
to Odd)
SKEW_EO
Maximum deviation
of input clock frequency during SSC
DEV
Maximum modulation frequency
of input clock during SSC
Ver. 1.031, Mar., 2009
MOD
600-
- 1/7
ps+ 600t
+ 1/7t
T
clk
%± 3-F
KHz200-F
65MHz > Fclk °
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NotesUnitMaxMinSymbolDescription
65MHz
25MHz
-
-
-
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t
SKEW _ EO
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LP133WH2
Liquid Crystal Display
Product Specification
LVDS Odd Clock
LVDS Even Clock
LVDS Even Data
Freq.
F
max
F
center
F
min
T
clk
T
clk
< Clock skew margin between channel >
Time
3-3-3. Data Format
1) LVDS 1 Port
RCLK+
RA+/-
RB+/-
RC+/-
RD+/-
R3R2
G4G3
B5B4
G7G6
Previous (N-1 )th CycleNext (N+1)th Cycle
R1R0
G2G1
B3B2
R7R6
< Spread Spectrum >
G0R5R4R3R2R1R0
B1B0G5G4G3G2G1
DEVSYNC HSYNCB5B4B3B2
XB7B6G7G6R7R6
Current (Nth ) Cycle
< LVDS Data Format >
G0
B1
DE
VSYNC HSYNC
X
R5R4
B0G5
B7B6
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