LG Display LP133WD2-SLB2 Specification
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LP133WD2
Liquid Crystal Display
Product Specification
SPECIFICATION
FOR
APPROVAL
()Preliminary Specification
()Final Specification
Title 13.3” HD+ TFT LCD
Customer Fujitsu
MODEL
/
/
SUPPLIER LG Display Co., Ltd.
*MODEL LP133WD2
Suffix SLB2
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
SIGNATUREAPPROVED BY
APPROVED BY
J. Y. Lee / S.Manager
REVIEWED BY
REVIEWED BY
Y. S. Ha / Manager
SIGNATURE
SIGNATURE
PREPARED BY
/
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 1.0 Jun, 12, 2012
PREPARED BY
H. W. Lee / Engineer
J. K. Yoon / Engineer
Products Engineering Dept.
LG Display Co., Ltd
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LP133WD2
Liquid Crystal Display
Product Specification
Contents
No ITEM
COVER
CONTENTS
RECORD OF REVISIONS
1
2
3
4
GENERAL DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL SPECIFICATIONS
ELECTRICAL CHARACTREISTICS
3-1
INTERFACE CONNECTIONS
3-2
LVDS SIGNAL TIMING SPECIFICATION
3-3
SIGNAL TIMING SPECIFICATIONS
3-4
SIGNAL TIMING WAVEFORMS
3-5
COLOR INPUT DATA REFERNECE
3-6
POWER SEQUENCE
3-7
OPTICAL SFECIFICATIONS
Page
1
2
3
4
5
6-7
8
9-10
11
11
12
13
14-16
5
6 RELIABLITY
7 INTERNATIONAL STANDARDS
8 PACKING
9 PRECAUTIONS
Ver. 1.0 Jun, 12, 2012
MECHANICAL CHARACTERISTICS
7-1 SAFETY
7-2 EMC
7-3 Environment
8-1 DESIGNATION OF LOT MARK
8-2 PACKING FORM
A APPENDIX. Enhanced Extended Display Identification Data
17-19
20
21
21
21
22
22
23-24
25-27
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LP133WD2
Liquid Crystal Display
Product Specification
RECORD OF REVISIONS
Revision No Revision Date Page Description
0.0 Dec. 26. 2011 - First Draft (Preliminary Specification) 1.3
0.1 Jan. 30. 2012 18, 19 Front / Rear View Update 1.3
25,26,27 EDID Update (Ver 0.1)
0.2 Feb. 29. 2012 6 Update Electrical Characteristics
11 Update Signal Timing Specifications
15 Update Grayscale Specifications
18, 19 Front / Rear View Update
25,26,27 EDID Update (Ver 0.2) 1.3
1.0 Jun. 12. 2012 - Final Draft 1.3
EDID
ver
Ver. 1.0 Jun, 12, 2012
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1. General Description
The LP133WD2 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally Black mode. This TFT-LCD has 13.3 inches diagonally measured active display area with HD+
resolution (1600 horizontal by 900 vertical pixel array). Each pixel is divided into Red, Green and Blue subpixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors. The LP133WD2 has been designed to apply the interface method that enables low power, high
speed, low EMI. The LP133WD2 is intended to support applications where thin thickness, low power are
critical factors and graphic displays are important. In combination with the vertical arrangement of the subpixels, the LP133WD2 characteristics provide an excellent flat display for office automation products such
as Notebook PC.
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LP133WD2
Liquid Crystal Display
Product Specification
EEPROM Block
EEPROM Block
for EDID
for EDID
EEPROM Block
EEPROM Block
for Tcon Operating
User connector
for Tcon Operating
1
1600
TFT-LCD Panel
40
Pin
Timing Control
LVDS
2port
VCC
VLED
LED_EN
PWM
Timing Control
(Tcon) Block
(Tcon) Block
DVCC
Power
Block
LED Driver
LED Driver
Block
TCLKs
Power
Block
Block
VGH, VGL, GMA
Control & Data Power
A
V
D
S
DVCC, AVDD
GSP,GSC,GOE
VOUT_LED
FB1~4
900
(HD+,AH-IPS)
Source Driver Circuit
LED Backlight Ass’y
EDID signal & Power
General Features
Active Screen Size 13.3 inches diagonal
Outline Dimension 309.3(H, typ.) Ý 180.4(V, typ.) Ý 3.00(D,max) [mm]
Pixel Pitch 0.1836mm x 0.1836mm
Pixel Format 1600 horiz. By 900 vert. Pixels RGB strip arrangement
Color Depth 6-bit, 262,144 colors
2
Luminance, White 300 cd/m
Power Consumption Total 3.8 W(Typ.) Logic : 1.1 W (Typ.@ColorBar), B/L : 2.7 W (Typ.@VLED12V)
Weight 245g ( Max.) / 230g ( Typ.)
Display Operating Mode Normally Black
Surface Treatment Anti-Glare treatment (3H) of the front Polarizer
RoHS Compliance Yes
BFR / PVC / As Free Yes for all
(Typ.5 point)
COG(Chip On Glass)
`
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2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
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LP133WD2
Liquid Crystal Display
Product Specification
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
VCC -0.3 4.0 Vdc at 25 r 5qC
TOP 050qC1
HST -20 60 qC1
HOP 10 90 %RH 1
HST 10 90 %RH 1
Values
Units Notes
Min Max
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39
Note : 2. Storage Condition is guaranteed under packing condition
Wet Bulb
Temperature [
]
qC Max, and no condensation of water.
.
90% 80%
60
50
40
60%
Humidity[(%)RH]
40%
Storage
-20
30
20
10
0
10
20 30 40 50
60 70 800
20%
10%
Operation
Dry Bulb Temperature []
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3. Electrical Specifications
3-1. Electrical Characteristics
The LP133WD2 requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL with LED Driver.
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LP133WD2
Liquid Crystal Display
Product Specification
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Unit Notes
Min Typ Max
LOGIC :
Values
Power Supply Input Voltage V
Power Supply Input Current Color Bar I
Power Consumption P
Power Supply Inrush Current I
LVDS Impedance Z
CC 3.0 3.3 3.6 V 1
CC - 333 416 mA 2
CC -1.11.37W2
CC_P - - 1500 mA 3
LVDS 90 100 110
ȳ
BACKLIGHT : ( with LED Driver)
LED Power Input Voltage V
LED Power Input Current I
LED Power Consumption P
LED Power Inrush Current I
LED 7.0 12.0 21.0 V 5
LED - 225 258 mA 6
LED -2.73.1W6
LED_P - - 1500 mA 7
PWM Duty Ratio 5 - 100 % 8
PWM Jitter
PWM Impedance Z
-
PWM 20 40 60 kȳ
0-0.2%9
4
PWM Frequency F
PWM High Level Voltage V
PWM Low Level Voltage V
LED_EN Impedance Z
LED_EN High Voltage V
LED_EN Low Voltage V
PWM 200 - 1000 Hz 10
PWM_H
PWM_L
PWM 20 40 60 kȳ
LED_EN_H 3.0 - 5.3 V
LED_EN_L 0-0.3V
3.0 - 5.3 V
0-0.3V
Life Time 12,000 - - Hrs 12
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Note)
1. The measuring position is the connector of LCM and the test conditions are under 25, fv = 60Hz,
Black pattern.
2. The specified Icc current and power consumption are under
the Vcc = 3.3V , 25, fv = 60Hz condition and Mosaic pattern(8X6).
3. This Spec. is the max load condition for the cable impedance designing.
4. The below figures are the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same as the minimum of T1 at Power on sequence.
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LP133WD2
Liquid Crystal Display
Product Specification
Rising time
Vcc
0V
5. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.
6. The measuring position is the connector of LCM and the test conditions are under 25.
7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25, Dimming of
Max luminance and White pattern with the normal frame frequency operated(60Hz).
8. The below figures are the measuring Vled condition
and the Vled control block LGD used.
VLED control block is same with Vcc control block.
90%
10%
0.5ms
3.3V
Rising time
LED
V
0V
10%
12.0V
90%
0.5ms
9. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.
10. If Jitter of PWM is bigger than maximum, it may induce flickering.
11. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.
12. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum
value specified in table 7. under general user conditionU
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3-2. Interface Connections
This LCD employs two interface connections, a 40 pin connector used for the module electronics interface and
the other connector used for the integral backlight system.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
Pin Symbol Description Notes
1NC
2 VCC LCD Logic and driver power (3.3V Typ.)
3 VCC LCD Logic and driver power (3.3V Typ.)
4 V EEDID DDC Power (3.3V)
5 NC No Connection
6 Clk EEDID DDC Clock
7 DATA EEDID DDC Data
8 ORX0- Negative LVDS differential data input
9 ORX0+ Positive LVDS differential data input
10 GND High Speed Ground
11 ORX1- Negative LVDS differential data input
12 ORX1+ Positive LVDS differential data input
13 GND High Speed Ground
14 ORX2- Negative LVDS differential data input
15 ORX2+ Positive LVDS differential data input
16 GND High Speed Ground
17 ORXC- Negative LVDS differential clock input
18 ORXC+ Positive LVDS differential clock input
19 GND High Speed Ground
20 ERX0- Negative LVDS differential data input
21 ERX0+ Positive LVDS differential data input
19 GND High Speed Ground
23 ERX1- Negative LVDS differential data input
24 ERX1+ Positive LVDS differential data input
19 GND High Speed Ground
26 ERX2- Negative LVDS differential data input
27 ERX2+ Positive LVDS differential data input
19 GND High Speed Ground
29 ERXC- Negative LVDS differential clock input
30 ERXC+ Positive LVDS differential clock input
31
32
33
34 NC No Connection
35
36
37
38
39
40
GND LED Backlight Ground
GND LED Backlight Ground
GND LED Backlight Ground
PWM System PWM Signal input for dimming
LED_EN
NC
VLED LED Backlight Power (7V-21V)
VLED LED Backlight Power (7V-21V)
VLED LED Backlight Power (7V-21V)
No Connection
LED Backlight On/Off
No Connection
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Product Specification
LP133WD2
Liquid Crystal Display
[Interface Chip]
1. LCD :
SiW, SW0636A (LCD Controller)
Including LVDS Receiver.
2. System : SiW LVDSRx or equivalent
* Pin to Pin compatible with LVDS
[Connector]
IS050-L40B-C10, UJU or equivalent
[Mating Connector]
20453-040T-0x, I-PEX or equivalent.
[Connector pin arrangement]
[LCD Module Rear View]
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3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
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LP133WD2
Liquid Crystal Display
Product Specification
Description
LVDS Differential Voltage |V
LVDS Common mode Voltage V
LVDS Input Voltage Range V
3-3-2. AC Specification
Description Symbol Min Max Unit Notes
LVDS Clock to Data Skew Margin
Symb
ol
| 100 600 mV -
ID
CM
IN
t
SKEW
t
SKEW
Min Max Unit Notes
0.6 1.8 V -
0.3 2.1 V -
- 400 + 400 ps
- 600 + 600 ps
85MHz > Fclk ˻
65MHz > Fclk ˻
65MHz
25MHz
LVDS Clock to Clock Skew Margin (Even
to Odd)
Maximum deviation
of input clock frequency during SSC
Maximum modulation frequency
of input clock during SSC
Ver. 1.0 Jun, 12, 2012
t
SKEW_EO
F
DEV
F
MOD
-1/7 + 1/7 T
clk
- · 3% -
- 200 KHz -
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