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Ver. 0.509, Feb., 2011
PREPARED BY
J. T. Kim / Engineer
S. M. Woo / Engineer
Products Engineering Dept.
LG Display Co., Ltd
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LP125WH2
Liquid Crystal Display
Product Specification
Contents
NoITEM
COVER
CONTENTS
RECORD OF REVISIONS
1GENERAL DESCRIPTION
2ABSOLUTE MAXIMUM RATINGS
3ELECTRICAL SPECIFICATIONS
3-1ELECTRICAL CHARACTREISTICS
3-2INTERFACE CONNECTIONS
LVDS SIGNAL TIMING SPECIFICATION
3-3
SIGNAL TIMING SPECIFICATIONS
3-3
SIGNAL TIMING WAVEFORMS
3-4
COLOR INPUT DATA REFERNECE
3-5
POWER SEQUENCE
3-6
4
OPTICAL SFECIFICATIONS
Page
1
2
3
4
5
6-7
8
9-10
11
11
12
13
14-16
5
6RELIABLITY
7INTERNATIONAL STANDARDS
8PACKING
Ver. 0.509, Feb., 2011
MECHANICAL CHARACTERISTICS
7-1SAFETY
7-2EMC
8-1DESIGNATION OF LOT MARK
8-2PACKING FORM
8-3LABEL DESCRIPTION
PRECAUTIONS9
APPENDIX. Enhanced Extended Display Identification Data A
17-29
20
21
21
22
22
23-24
24-25
26-28
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LP125WH2
Liquid Crystal Display
Product Specification
RECORD OF REVISIONS
Revision No Revision DatePageDescription
0.02. Jun. 2010-First Specification-
6Update the Electrical Characteristics
9Update the DC Specification of the LVDS Signal Timing Spec.
0.123. Aug. 2010
0.226. Aug. 201013Update T7 time of the Power Sequence (3ms ˧ 0ms)0.0
0.302. Dec. 2010
0.421. Jan. 2011
1.009. Feb. 2011
18, 19Update the Drawing
22Update the Packing Form
25 ~ 27Update the EDID data
14Update the Color Coordination
15Update the Gray scale specification
Update the Packing form
22
25~27
6Change the PWM Duty Ratio (5% ˧ 1%)
11Update the Signal Timing Specifications (DCLK 74.8Mhz)
14Add the Typ. Value of Viewing Angle,
18~19Update the Front & Back View of Drawing
22~23Update the Packing Information
26~28Update the EDID Data (Checksum : 94 ˧ F7)
4, 17Update the Outline Dimension (Thickness 3.6 ˧3.7D,Max.)
6
8Delete “or Equivalent” at Connector
11Change the Timing Description
14Update the Luminance Variation 5point
18-19Update the Drawing of Front view, Rear view
-. Change the Packing quantity (30pcs Æ 20pcs)
-. Change the Box size (473X364X338 Æ 422X340X257)
Update the EDID Data (Checksum: 4B ˧ 94)
-. Update the Color Coordination
Change the Backlight PWM High Level Voltage (Min 3.0 ˧ 2.7)
Change the Backlight LED_EN High Level Voltage (Min 3.0 ˧ 2.7)
Update Label Description 23
EDID
ver
0.0
0.2
0.3
1.0
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1. General Description
The LP125WH2 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally white mode. This TFT-LCD has 12.5 inches diagonally measured active display area with HD
resolution (1366 horizontal by 768 vertical pixel array). Each pixel is divided into Red, Green and Blue subpixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors. The LP125WH2 has been designed to apply the interface method that enables low power, high
speed, low EMI. The LP125WH2 is intended to support applications where thin thickness, low power are
critical factors and graphic displays are important. In combination with the vertical arrangement of the subpixels, the LP125WH2 characteristics provide an excellent flat display for office automation products such
as Notebook PC.
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LP125WH2
Liquid Crystal Display
Product Specification
EEPROM Block
I²C
User connector
EEPROM Block
for EDID
for EDID
EEPROM Block
EEPROM Block
for Tcon Operating
for TconOperating
1
TFT-LCD Panel
40
Pin
Timing Control
LVDS
1port
VCC
VLED
LED_EN
PWM
Timing Control
(Tcon) Block
(Tcon) Block
DVCC
Power
Block
LED Driver
LED Driver
Block
TCLKs
Power
Block
Block
VGH, VGL, GMA
Control & DataPower
M
i
n
i
-
L
V
D
S
DVCC, AVDD
GIP CLKs, DSC
VOUT_LED
FB1~4
768
(HD, GIP+DRD, TN)
Source Driver
(Bottom Bent)
LED Backlight Ass’y
EDID signal & Power
General Features
Active Screen Size12.5 inches diagonal
Outline Dimension290.5(H, Typ.) Ý 179.5(V, Typ.) Ý 3.7(D, Max.) mm
Pixel Pitch0.2025 X 0.2025 mm
Pixel Format1366 horiz. by 768 vert. Pixels RGB strip arrangement
Color Depth6-bit, 262,144 colors
2
Luminance, White200 cd/m
Power ConsumptionTotal 3.9 W (Typ.) Logic : 1.1 W (Typ.@ Mosaic), B/L : 2.8W (Typ.@ VLED 12V )
Weight270g (Max.)
Display Operating ModeTransmissive mode, normally white
Surface TreatmentAnti-glare treatment of the front Polarizer
RoHS ComplianceYes
BFR / PVC / As Free Yes for all
(Typ.5 point @ PWM Duty = 100%)
1366
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2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
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LP125WH2
Liquid Crystal Display
Product Specification
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterSymbol
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
VCC-0.34.0Vdcat 25 r 5qC
TOP050qC1
HST-2060qC1
HOP1090%RH1
HST1090%RH1
Values
UnitsNotes
MinMax
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39
Wet Bulb
20
]
30
Temperature [
10
0
qC Max, and no condensation of water.
90% 80%
60
50
40
60%
Humidity[(%)RH]
40%
20%
10%
Storage
Operation
-20
10
20304050
6070800
Dry Bulb Temperature []
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3. Electrical Specifications
3-1. Electrical Characteristics
The LP33WH2 requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL.with LED Driver.
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
LOGIC :
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LP125WH2
Liquid Crystal Display
Product Specification
Values
UnitNotes
MinTypMax
Power Supply Input VoltageV
Power Supply Input CurrentMosaicI
Power ConsumptionP
Power Supply Inrush CurrentI
LVDS ImpedanceZ
CC3.03.33.6V1
CC-330380mA2
CC-1.11.3W3
CC_P-2000mA4
LVDS90100110
ȳ
BACKLIGHT : ( with LED Driver)
LED Power Input VoltageV
LED Power Input CurrentI
LED Power ConsumptionP
LED Power Inrush CurrentI
LED7.012.021.0V6
LED-235250mA7
LED-2.83.0W7
LED_P-2000mA8
PWM Duty Ratio1-100%9
PWM Jitter
PWM ImpedanceZ
PWM FrequencyF
-
PWM204060kȳ
PWM200-1000Hz11
0-0.2%10
5
PWM High Level VoltageV
PWM Low Level VoltageV
LED_EN ImpedanceZ
LED_EN High VoltageV
LED_EN Low VoltageV
LED_EN_H2.7-3.6V
LED_EN_L0-0.3V
PWM_H
PWM_L
PWM204060kȳ
2.7-3.6V
0-0.3V
Life Time12,000--Hrs12
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Product Specification
Note)
1. The measuring position is the connector of LCM and the test conditions are under 25, fv = 60Hz,
Black pattern.
2. The specified Icc current and power consumption are under
the Vcc = 3.3V , 25, fv = 60Hz condition and Mosaic pattern.
3. This Power Consumption Spec. is measured for the Mosaic Pattern condition.
4. The below figures are the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same as the minimum of T1 at Power on sequence.
LP125WH2
Liquid Crystal Display
Rising time
Vcc
0V
5. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.
6. The measuring position is the connector of LCM and the test conditions are under 25.
7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25, Dimming of
Max luminance and White pattern with the normal frame frequency operated(60Hz).
8. The below figures are the measuring Vled condition
and the Vled control block LGD used.
VLED control block is same with Vcc control block.
90%
10%
0.5ms
3.3V
Rising time
LED
V
0V
10%
12.0V
90%
0.5ms
9. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.
10. If Jitter of PWM is bigger than maximum, it may induce flickering.
11. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.
12. The life time is determined as the sum of the continuous operation time at which brightness of LCD at the
typical LED current is 50% compare to that of minimum value specified in table 7 under general user
condition.
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3-2. Interface Connections
This LCD employs two interface connections, a 40 pin connector is used for the module electronics interface
and the other connector is used for the integral backlight system.
The electronics interface connector is a model GT05Q-40S-H10 manufactured by LSMtron.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
PinSymbolDescriptionNotes
1NCNo Connection
2VCCLCD Logic and driver power (3.3V Typ.)
3VCCLCD Logic and driver power (3.3V Typ.)
4V EEDIDDDC Power (3.3V)
5NCNo Connection
6Clk EEDIDDDC Clock
7DATA EEDIDDDC Data
8ORX0-Negative LVDS differential data input
9ORX0+Positive LVDS differential data input
10GNDHigh Speed Ground
11ORX1-Negative LVDS differential data input
12ORX1+Positive LVDS differential data input
13GNDHigh Speed Ground
14ORX2-Negative LVDS differential data input
15ORX2+Positive LVDS differential data input
16GNDHigh Speed Ground
17ORXC-Negative LVDS differential clock input
18ORXC+Positive LVDS differential clock input
19VSSGround
20
21
22GNDGround
23
24
25GNDGround
26
27
28GNDGround
29
30
31
32
33
34
35
36
37NCReserved
38
39
40
NC
NC
NC
NC
NC
NC
NC
NC
GNDLED Backlight Ground
GNDLED Backlight Ground
GNDLED Backlight Ground
NC
PWMSystem PWM Signal input for dimming
LED_EN
VLEDLED Backlight Power (7V-21V)
VLEDLED Backlight Power (7V-21V)
VLEDLED Backlight Power (7V-21V)
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
LED Backlight On/Off
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LP125WH2
Liquid Crystal Display
Product Specification
[Interface Chip]
1. LCD :
SiW, SW0641(LCD Controller)
Including LVDS Receiver.
2. System : SiW LVDSRx or equivalent
* Pin to Pin compatible with LVDS
[Connector]
LSMtron GT05Q-40S-H10
[Mating Connector]
20345-#40E-## series or equivalent
[Connector pin arrangement]
140
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3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
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LP125WH2
Liquid Crystal Display
Product Specification
VDD=1.8V
DescriptionSymbolMinTypMaxUnitNotes
LVDS Differential Voltage|V
LVDS Common mode VoltageV
LVDS Input Voltage RangeV
3-3-2. AC Specification
DescriptionSymbolMinMaxUnitNotes
LVDS Clock to Data Skew Margin
|100-600mV-
ID
CM
IN
|VID| /21.2VDD- |VID|/2V-
0.3-VDDV-
t
SKEW
t
SKEW
- 400+ 400ps
- 600+ 600ps
85MHz > Fclk ˻
65MHz
65MHz > Fclk ˻
25MHz
LVDS Clock to Clock Skew Margin (Even
to Odd)
Maximum deviation
of input clock frequency during SSC
Maximum modulation frequency
of input clock during SSC
Ver. 0.509, Feb., 2011
t
SKEW_EO
F
DEV
F
MOD
-1/7+ 1/7T
clk
-· 3%-
-200KHz-
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